1*7ebd8b66SMauro Carvalho ChehabKernel driver nsa320_hwmon 2*7ebd8b66SMauro Carvalho Chehab========================== 3*7ebd8b66SMauro Carvalho Chehab 4*7ebd8b66SMauro Carvalho ChehabSupported chips: 5*7ebd8b66SMauro Carvalho Chehab 6*7ebd8b66SMauro Carvalho Chehab * Holtek HT46R065 microcontroller with onboard firmware that configures 7*7ebd8b66SMauro Carvalho Chehab 8*7ebd8b66SMauro Carvalho Chehab it to act as a hardware monitor. 9*7ebd8b66SMauro Carvalho Chehab 10*7ebd8b66SMauro Carvalho Chehab Prefix: 'nsa320' 11*7ebd8b66SMauro Carvalho Chehab 12*7ebd8b66SMauro Carvalho Chehab Addresses scanned: none 13*7ebd8b66SMauro Carvalho Chehab 14*7ebd8b66SMauro Carvalho Chehab Datasheet: Not available, driver was reverse engineered based upon the 15*7ebd8b66SMauro Carvalho Chehab 16*7ebd8b66SMauro Carvalho Chehab Zyxel kernel source 17*7ebd8b66SMauro Carvalho Chehab 18*7ebd8b66SMauro Carvalho Chehab 19*7ebd8b66SMauro Carvalho Chehab 20*7ebd8b66SMauro Carvalho ChehabAuthor: 21*7ebd8b66SMauro Carvalho Chehab 22*7ebd8b66SMauro Carvalho Chehab Adam Baker <linux@baker-net.org.uk> 23*7ebd8b66SMauro Carvalho Chehab 24*7ebd8b66SMauro Carvalho ChehabDescription 25*7ebd8b66SMauro Carvalho Chehab----------- 26*7ebd8b66SMauro Carvalho Chehab 27*7ebd8b66SMauro Carvalho ChehabThis chip is known to be used in the Zyxel NSA320 and NSA325 NAS Units and 28*7ebd8b66SMauro Carvalho Chehabalso in some variants of the NSA310 but the driver has only been tested 29*7ebd8b66SMauro Carvalho Chehabon the NSA320. In all of these devices it is connected to the same 3 GPIO 30*7ebd8b66SMauro Carvalho Chehablines which are used to provide chip select, clock and data lines. The 31*7ebd8b66SMauro Carvalho Chehabinterface behaves similarly to SPI but at much lower speeds than are normally 32*7ebd8b66SMauro Carvalho Chehabused for SPI. 33*7ebd8b66SMauro Carvalho Chehab 34*7ebd8b66SMauro Carvalho ChehabFollowing each chip select pulse the chip will generate a single 32 bit word 35*7ebd8b66SMauro Carvalho Chehabthat contains 0x55 as a marker to indicate that data is being read correctly, 36*7ebd8b66SMauro Carvalho Chehabfollowed by an 8 bit fan speed in 100s of RPM and a 16 bit temperature in 37*7ebd8b66SMauro Carvalho Chehabtenths of a degree. 38*7ebd8b66SMauro Carvalho Chehab 39*7ebd8b66SMauro Carvalho Chehab 40*7ebd8b66SMauro Carvalho Chehabsysfs-Interface 41*7ebd8b66SMauro Carvalho Chehab--------------- 42*7ebd8b66SMauro Carvalho Chehab 43*7ebd8b66SMauro Carvalho Chehab============= ================= 44*7ebd8b66SMauro Carvalho Chehabtemp1_input temperature input 45*7ebd8b66SMauro Carvalho Chehabfan1_input fan speed 46*7ebd8b66SMauro Carvalho Chehab============= ================= 47*7ebd8b66SMauro Carvalho Chehab 48*7ebd8b66SMauro Carvalho ChehabNotes 49*7ebd8b66SMauro Carvalho Chehab----- 50*7ebd8b66SMauro Carvalho Chehab 51*7ebd8b66SMauro Carvalho ChehabThe access timings used in the driver are the same as used in the Zyxel 52*7ebd8b66SMauro Carvalho Chehabprovided kernel. Testing has shown that if the delay between chip select and 53*7ebd8b66SMauro Carvalho Chehabthe first clock pulse is reduced from 100 ms to just under 10ms then the chip 54*7ebd8b66SMauro Carvalho Chehabwill not produce any output. If the duration of either phase of the clock 55*7ebd8b66SMauro Carvalho Chehabis reduced from 100 us to less than 15 us then data pulses are likely to be 56*7ebd8b66SMauro Carvalho Chehabread twice corrupting the output. The above analysis is based upon a sample 57*7ebd8b66SMauro Carvalho Chehabof one unit but suggests that the Zyxel provided delay values include a 58*7ebd8b66SMauro Carvalho Chehabreasonable tolerance. 59*7ebd8b66SMauro Carvalho Chehab 60*7ebd8b66SMauro Carvalho ChehabThe driver incorporates a limit that it will not check for updated values 61*7ebd8b66SMauro Carvalho Chehabfaster than once a second. This is because the hardware takes a relatively long 62*7ebd8b66SMauro Carvalho Chehabtime to read the data from the device and when it does it reads both temp and 63*7ebd8b66SMauro Carvalho Chehabfan speed. As the most likely case for two accesses in quick succession is 64*7ebd8b66SMauro Carvalho Chehabto read both of these values avoiding a second read delay is desirable. 65