xref: /openbmc/linux/Documentation/gpu/rfc/xe.rst (revision 0791faebfe750292a8a842b64795a390ca4a3b51)
1*40aeab04SRodrigo Vivi==========================
2*40aeab04SRodrigo ViviXe – Merge Acceptance Plan
3*40aeab04SRodrigo Vivi==========================
4*40aeab04SRodrigo ViviXe is a new driver for Intel GPUs that supports both integrated and
5*40aeab04SRodrigo Vividiscrete platforms starting with Tiger Lake (first Intel Xe Architecture).
6*40aeab04SRodrigo Vivi
7*40aeab04SRodrigo ViviThis document aims to establish a merge plan for the Xe, by writing down clear
8*40aeab04SRodrigo Vivipre-merge goals, in order to avoid unnecessary delays.
9*40aeab04SRodrigo Vivi
10*40aeab04SRodrigo ViviXe – Overview
11*40aeab04SRodrigo Vivi=============
12*40aeab04SRodrigo ViviThe main motivation of Xe is to have a fresh base to work from that is
13*40aeab04SRodrigo Viviunencumbered by older platforms, whilst also taking the opportunity to
14*40aeab04SRodrigo Vivirearchitect our driver to increase sharing across the drm subsystem, both
15*40aeab04SRodrigo Vivileveraging and allowing us to contribute more towards other shared components
16*40aeab04SRodrigo Vivilike TTM and drm/scheduler.
17*40aeab04SRodrigo Vivi
18*40aeab04SRodrigo ViviThis is also an opportunity to start from the beginning with a clean uAPI that is
19*40aeab04SRodrigo Viviextensible by design and already aligned with the modern userspace needs. For
20*40aeab04SRodrigo Vivithis reason, the memory model is solely based on GPU Virtual Address space
21*40aeab04SRodrigo Vivibind/unbind (‘VM_BIND’) of GEM buffer objects (BOs) and execution only supporting
22*40aeab04SRodrigo Viviexplicit synchronization. With persistent mapping across the execution, the
23*40aeab04SRodrigo Viviuserspace does not need to provide a list of all required mappings during each
24*40aeab04SRodrigo Vivisubmission.
25*40aeab04SRodrigo Vivi
26*40aeab04SRodrigo ViviThe new driver leverages a lot from i915. As for display, the intent is to share
27*40aeab04SRodrigo Vivithe display code with the i915 driver so that there is maximum reuse there.
28*40aeab04SRodrigo Vivi
29*40aeab04SRodrigo ViviAs for the power management area, the goal is to have a much-simplified support
30*40aeab04SRodrigo Vivifor the system suspend states (S-states), PCI device suspend states (D-states),
31*40aeab04SRodrigo ViviGPU/Render suspend states (R-states) and frequency management. It should leverage
32*40aeab04SRodrigo Vivias much as possible all the existent PCI-subsystem infrastructure (pm and
33*40aeab04SRodrigo Viviruntime_pm) and underlying firmware components such PCODE and GuC for the power
34*40aeab04SRodrigo Vivistates and frequency decisions.
35*40aeab04SRodrigo Vivi
36*40aeab04SRodrigo ViviRepository:
37*40aeab04SRodrigo Vivi
38*40aeab04SRodrigo Vivihttps://gitlab.freedesktop.org/drm/xe/kernel (branch drm-xe-next)
39*40aeab04SRodrigo Vivi
40*40aeab04SRodrigo ViviXe – Platforms
41*40aeab04SRodrigo Vivi==============
42*40aeab04SRodrigo ViviCurrently, Xe is already functional and has experimental support for multiple
43*40aeab04SRodrigo Viviplatforms starting from Tiger Lake, with initial support in userspace implemented
44*40aeab04SRodrigo Viviin Mesa (for Iris and Anv, our OpenGL and Vulkan drivers), as well as in NEO
45*40aeab04SRodrigo Vivi(for OpenCL and Level0).
46*40aeab04SRodrigo Vivi
47*40aeab04SRodrigo ViviDuring a transition period, platforms will be supported by both Xe and i915.
48*40aeab04SRodrigo ViviHowever, the force_probe mechanism existent in both drivers will allow only one
49*40aeab04SRodrigo Viviofficial and by-default probe at a given time.
50*40aeab04SRodrigo Vivi
51*40aeab04SRodrigo ViviFor instance, in order to probe a DG2 which PCI ID is 0x5690 by Xe instead of
52*40aeab04SRodrigo Vivii915, the following set of parameters need to be used:
53*40aeab04SRodrigo Vivi
54*40aeab04SRodrigo Vivi```
55*40aeab04SRodrigo Vivii915.force_probe=!5690 xe.force_probe=5690
56*40aeab04SRodrigo Vivi```
57*40aeab04SRodrigo Vivi
58*40aeab04SRodrigo ViviIn both drivers, the ‘.require_force_probe’ protection forces the user to use the
59*40aeab04SRodrigo Viviforce_probe parameter while the driver is under development. This protection is
60*40aeab04SRodrigo Vivionly removed when the support for the platform and the uAPI are stable. Stability
61*40aeab04SRodrigo Viviwhich needs to be demonstrated by CI results.
62*40aeab04SRodrigo Vivi
63*40aeab04SRodrigo ViviIn order to avoid user space regressions, i915 will continue to support all the
64*40aeab04SRodrigo Vivicurrent platforms that are already out of this protection. Xe support will be
65*40aeab04SRodrigo Viviforever experimental and dependent on the usage of force_probe for these
66*40aeab04SRodrigo Viviplatforms.
67*40aeab04SRodrigo Vivi
68*40aeab04SRodrigo ViviWhen the time comes for Xe, the protection will be lifted on Xe and kept in i915.
69*40aeab04SRodrigo Vivi
70*40aeab04SRodrigo ViviXe driver will be protected with both STAGING Kconfig and force_probe. Changes in
71*40aeab04SRodrigo Vivithe uAPI are expected while the driver is behind these protections. STAGING will
72*40aeab04SRodrigo Vivibe removed when the driver uAPI gets to a mature state where we can guarantee the
73*40aeab04SRodrigo Vivi‘no regression’ rule. Then force_probe will be lifted only for future platforms
74*40aeab04SRodrigo Vivithat will be productized with Xe driver, but not with i915.
75*40aeab04SRodrigo Vivi
76*40aeab04SRodrigo ViviXe – Pre-Merge Goals
77*40aeab04SRodrigo Vivi====================
78*40aeab04SRodrigo Vivi
79*40aeab04SRodrigo ViviDrm_scheduler
80*40aeab04SRodrigo Vivi-------------
81*40aeab04SRodrigo ViviXe primarily uses Firmware based scheduling (GuC FW). However, it will use
82*40aeab04SRodrigo Vividrm_scheduler as the scheduler ‘frontend’ for userspace submission in order to
83*40aeab04SRodrigo Viviresolve syncobj and dma-buf implicit sync dependencies. However, drm_scheduler is
84*40aeab04SRodrigo Vivinot yet prepared to handle the 1-to-1 relationship between drm_gpu_scheduler and
85*40aeab04SRodrigo Vividrm_sched_entity.
86*40aeab04SRodrigo Vivi
87*40aeab04SRodrigo ViviDeeper changes to drm_scheduler should *not* be required to get Xe accepted, but
88*40aeab04SRodrigo Vivisome consensus needs to be reached between Xe and other community drivers that
89*40aeab04SRodrigo Vivicould also benefit from this work, for coupling FW based/assisted submission such
90*40aeab04SRodrigo Vivias the ARM’s new Mali GPU driver, and others.
91*40aeab04SRodrigo Vivi
92*40aeab04SRodrigo ViviAs a key measurable result, the patch series introducing Xe itself shall not
93*40aeab04SRodrigo Vividepend on any other patch touching drm_scheduler itself that was not yet merged
94*40aeab04SRodrigo Vivithrough drm-misc. This, by itself, already includes the reach of an agreement for
95*40aeab04SRodrigo Viviuniform 1 to 1 relationship implementation / usage across drivers.
96*40aeab04SRodrigo Vivi
97*40aeab04SRodrigo ViviGPU VA
98*40aeab04SRodrigo Vivi------
99*40aeab04SRodrigo ViviTwo main goals of Xe are meeting together here:
100*40aeab04SRodrigo Vivi
101*40aeab04SRodrigo Vivi1) Have an uAPI that aligns with modern UMD needs.
102*40aeab04SRodrigo Vivi
103*40aeab04SRodrigo Vivi2) Early upstream engagement.
104*40aeab04SRodrigo Vivi
105*40aeab04SRodrigo ViviRedHat engineers working on Nouveau proposed a new DRM feature to handle keeping
106*40aeab04SRodrigo Vivitrack of GPU virtual address mappings. This is still not merged upstream, but
107*40aeab04SRodrigo Vivithis aligns very well with our goals and with our VM_BIND. The engagement with
108*40aeab04SRodrigo Viviupstream and the port of Xe towards GPUVA is already ongoing.
109*40aeab04SRodrigo Vivi
110*40aeab04SRodrigo ViviAs a key measurable result, Xe needs to be aligned with the GPU VA and working in
111*40aeab04SRodrigo Viviour tree. Missing Nouveau patches should *not* block Xe and any needed GPUVA
112*40aeab04SRodrigo Vivirelated patch should be independent and present on dri-devel or acked by
113*40aeab04SRodrigo Vivimaintainers to go along with the first Xe pull request towards drm-next.
114*40aeab04SRodrigo Vivi
115*40aeab04SRodrigo ViviDRM_VM_BIND
116*40aeab04SRodrigo Vivi-----------
117*40aeab04SRodrigo ViviNouveau, and Xe are all implementing ‘VM_BIND’ and new ‘Exec’ uAPIs in order to
118*40aeab04SRodrigo Vivifulfill the needs of the modern uAPI. Xe merge should *not* be blocked on the
119*40aeab04SRodrigo Vividevelopment of a common new drm_infrastructure. However, the Xe team needs to
120*40aeab04SRodrigo Viviengage with the community to explore the options of a common API.
121*40aeab04SRodrigo Vivi
122*40aeab04SRodrigo ViviAs a key measurable result, the DRM_VM_BIND needs to be documented in this file
123*40aeab04SRodrigo Vivibelow, or this entire block deleted if the consensus is for independent drivers
124*40aeab04SRodrigo Vivivm_bind ioctls.
125*40aeab04SRodrigo Vivi
126*40aeab04SRodrigo ViviAlthough having a common DRM level IOCTL for VM_BIND is not a requirement to get
127*40aeab04SRodrigo ViviXe merged, it is mandatory to enforce the overall locking scheme for all major
128*40aeab04SRodrigo Vivistructs and list (so vm and vma). So, a consensus is needed, and possibly some
129*40aeab04SRodrigo Vivicommon helpers. If helpers are needed, they should be also documented in this
130*40aeab04SRodrigo Vividocument.
131*40aeab04SRodrigo Vivi
132*40aeab04SRodrigo ViviASYNC VM_BIND
133*40aeab04SRodrigo Vivi-------------
134*40aeab04SRodrigo ViviAlthough having a common DRM level IOCTL for VM_BIND is not a requirement to get
135*40aeab04SRodrigo ViviXe merged, it is mandatory to have a consensus with other drivers and Mesa.
136*40aeab04SRodrigo ViviIt needs to be clear how to handle async VM_BIND and interactions with userspace
137*40aeab04SRodrigo Vivimemory fences. Ideally with helper support so people don't get it wrong in all
138*40aeab04SRodrigo Vivipossible ways.
139*40aeab04SRodrigo Vivi
140*40aeab04SRodrigo ViviAs a key measurable result, the benefits of ASYNC VM_BIND and a discussion of
141*40aeab04SRodrigo Vivivarious flavors, error handling and a sample API should be documented here or in
142*40aeab04SRodrigo Vivia separate document pointed to by this document.
143*40aeab04SRodrigo Vivi
144*40aeab04SRodrigo ViviUserptr integration and vm_bind
145*40aeab04SRodrigo Vivi-------------------------------
146*40aeab04SRodrigo ViviDifferent drivers implement different ways of dealing with execution of userptr.
147*40aeab04SRodrigo ViviWith multiple drivers currently introducing support to VM_BIND, the goal is to
148*40aeab04SRodrigo Viviaim for a DRM consensus on what’s the best way to have that support. To some
149*40aeab04SRodrigo Viviextent this is already getting addressed itself with the GPUVA where likely the
150*40aeab04SRodrigo Viviuserptr will be a GPUVA with a NULL GEM call VM bind directly on the userptr.
151*40aeab04SRodrigo ViviHowever, there are more aspects around the rules for that and the usage of
152*40aeab04SRodrigo Vivimmu_notifiers, locking and other aspects.
153*40aeab04SRodrigo Vivi
154*40aeab04SRodrigo ViviThis task here has the goal of introducing a documentation of the basic rules.
155*40aeab04SRodrigo Vivi
156*40aeab04SRodrigo ViviThe documentation *needs* to first live in this document (API session below) and
157*40aeab04SRodrigo Vivithen moved to another more specific document or at Xe level or at DRM level.
158*40aeab04SRodrigo Vivi
159*40aeab04SRodrigo ViviDocumentation should include:
160*40aeab04SRodrigo Vivi
161*40aeab04SRodrigo Vivi * The userptr part of the VM_BIND api.
162*40aeab04SRodrigo Vivi
163*40aeab04SRodrigo Vivi * Locking, including the page-faulting case.
164*40aeab04SRodrigo Vivi
165*40aeab04SRodrigo Vivi * O(1) complexity under VM_BIND.
166*40aeab04SRodrigo Vivi
167*40aeab04SRodrigo ViviSome parts of userptr like mmu_notifiers should become GPUVA or DRM helpers when
168*40aeab04SRodrigo Vivithe second driver supporting VM_BIND+userptr appears. Details to be defined when
169*40aeab04SRodrigo Vivithe time comes.
170*40aeab04SRodrigo Vivi
171*40aeab04SRodrigo ViviLong running compute: minimal data structure/scaffolding
172*40aeab04SRodrigo Vivi--------------------------------------------------------
173*40aeab04SRodrigo ViviThe generic scheduler code needs to include the handling of endless compute
174*40aeab04SRodrigo Vivicontexts, with the minimal scaffolding for preempt-ctx fences (probably on the
175*40aeab04SRodrigo Vividrm_sched_entity) and making sure drm_scheduler can cope with the lack of job
176*40aeab04SRodrigo Vivicompletion fence.
177*40aeab04SRodrigo Vivi
178*40aeab04SRodrigo ViviThe goal is to achieve a consensus ahead of Xe initial pull-request, ideally with
179*40aeab04SRodrigo Vivithis minimal drm/scheduler work, if needed, merged to drm-misc in a way that any
180*40aeab04SRodrigo Vividrm driver, including Xe, could re-use and add their own individual needs on top
181*40aeab04SRodrigo Viviin a next stage. However, this should not block the initial merge.
182*40aeab04SRodrigo Vivi
183*40aeab04SRodrigo ViviThis is a non-blocker item since the driver without the support for the long
184*40aeab04SRodrigo Vivirunning compute enabled is not a showstopper.
185*40aeab04SRodrigo Vivi
186*40aeab04SRodrigo ViviDisplay integration with i915
187*40aeab04SRodrigo Vivi-----------------------------
188*40aeab04SRodrigo ViviIn order to share the display code with the i915 driver so that there is maximum
189*40aeab04SRodrigo Vivireuse, the i915/display/ code is built twice, once for i915.ko and then for
190*40aeab04SRodrigo Vivixe.ko. Currently, the i915/display code in Xe tree is polluted with many 'ifdefs'
191*40aeab04SRodrigo Vividepending on the build target. The goal is to refactor both Xe and i915/display
192*40aeab04SRodrigo Vivicode simultaneously in order to get a clean result before they land upstream, so
193*40aeab04SRodrigo Vivithat display can already be part of the initial pull request towards drm-next.
194*40aeab04SRodrigo Vivi
195*40aeab04SRodrigo ViviHowever, display code should not gate the acceptance of Xe in upstream. Xe
196*40aeab04SRodrigo Vivipatches will be refactored in a way that display code can be removed, if needed,
197*40aeab04SRodrigo Vivifrom the first pull request of Xe towards drm-next. The expectation is that when
198*40aeab04SRodrigo Viviboth drivers are part of the drm-tip, the introduction of cleaner patches will be
199*40aeab04SRodrigo Vivieasier and speed up.
200*40aeab04SRodrigo Vivi
201*40aeab04SRodrigo ViviDrm_exec
202*40aeab04SRodrigo Vivi--------
203*40aeab04SRodrigo ViviHelper to make dma_resv locking for a big number of buffers is getting removed in
204*40aeab04SRodrigo Vivithe drm_exec series proposed in https://patchwork.freedesktop.org/patch/524376/
205*40aeab04SRodrigo ViviIf that happens, Xe needs to change and incorporate the changes in the driver.
206*40aeab04SRodrigo ViviThe goal is to engage with the Community to understand if the best approach is to
207*40aeab04SRodrigo Vivimove that to the drivers that are using it or if we should keep the helpers in
208*40aeab04SRodrigo Viviplace waiting for Xe to get merged.
209*40aeab04SRodrigo Vivi
210*40aeab04SRodrigo ViviThis item ties into the GPUVA, VM_BIND, and even long-running compute support.
211*40aeab04SRodrigo Vivi
212*40aeab04SRodrigo ViviAs a key measurable result, we need to have a community consensus documented in
213*40aeab04SRodrigo Vivithis document and the Xe driver prepared for the changes, if necessary.
214*40aeab04SRodrigo Vivi
215*40aeab04SRodrigo ViviDev_coredump
216*40aeab04SRodrigo Vivi------------
217*40aeab04SRodrigo Vivi
218*40aeab04SRodrigo ViviXe needs to align with other drivers on the way that the error states are
219*40aeab04SRodrigo Vividumped, avoiding a Xe only error_state solution. The goal is to use devcoredump
220*40aeab04SRodrigo Viviinfrastructure to report error states, since it produces a standardized way
221*40aeab04SRodrigo Viviby exposing a virtual and temporary /sys/class/devcoredump device.
222*40aeab04SRodrigo Vivi
223*40aeab04SRodrigo ViviAs the key measurable result, Xe driver needs to provide GPU snapshots captured
224*40aeab04SRodrigo Viviat hang time through devcoredump, but without depending on any core modification
225*40aeab04SRodrigo Viviof devcoredump infrastructure itself.
226*40aeab04SRodrigo Vivi
227*40aeab04SRodrigo ViviLater, when we are in-tree, the goal is to collaborate with devcoredump
228*40aeab04SRodrigo Viviinfrastructure with overall possible improvements, like multiple file support
229*40aeab04SRodrigo Vivifor better organization of the dumps, snapshot support, dmesg extra print,
230*40aeab04SRodrigo Viviand whatever may make sense and help the overall infrastructure.
231*40aeab04SRodrigo Vivi
232*40aeab04SRodrigo ViviXe – uAPI high level overview
233*40aeab04SRodrigo Vivi=============================
234*40aeab04SRodrigo Vivi
235*40aeab04SRodrigo Vivi...Warning: To be done in follow up patches after/when/where the main consensus in various items are individually reached.
236