1*89634f99SSanyog Kale======================== 2*89634f99SSanyog KaleSoundWire Error Handling 3*89634f99SSanyog Kale======================== 4*89634f99SSanyog Kale 5*89634f99SSanyog KaleThe SoundWire PHY was designed with care and errors on the bus are going to 6*89634f99SSanyog Kalebe very unlikely, and if they happen it should be limited to single bit 7*89634f99SSanyog Kaleerrors. Examples of this design can be found in the synchronization 8*89634f99SSanyog Kalemechanism (sync loss after two errors) and short CRCs used for the Bulk 9*89634f99SSanyog KaleRegister Access. 10*89634f99SSanyog Kale 11*89634f99SSanyog KaleThe errors can be detected with multiple mechanisms: 12*89634f99SSanyog Kale 13*89634f99SSanyog Kale1. Bus clash or parity errors: This mechanism relies on low-level detectors 14*89634f99SSanyog Kale that are independent of the payload and usages, and they cover both control 15*89634f99SSanyog Kale and audio data. The current implementation only logs such errors. 16*89634f99SSanyog Kale Improvements could be invalidating an entire programming sequence and 17*89634f99SSanyog Kale restarting from a known position. In the case of such errors outside of a 18*89634f99SSanyog Kale control/command sequence, there is no concealment or recovery for audio 19*89634f99SSanyog Kale data enabled by the SoundWire protocol, the location of the error will also 20*89634f99SSanyog Kale impact its audibility (most-significant bits will be more impacted in PCM), 21*89634f99SSanyog Kale and after a number of such errors are detected the bus might be reset. Note 22*89634f99SSanyog Kale that bus clashes due to programming errors (two streams using the same bit 23*89634f99SSanyog Kale slots) or electrical issues during the transmit/receive transition cannot 24*89634f99SSanyog Kale be distinguished, although a recurring bus clash when audio is enabled is a 25*89634f99SSanyog Kale indication of a bus allocation issue. The interrupt mechanism can also help 26*89634f99SSanyog Kale identify Slaves which detected a Bus Clash or a Parity Error, but they may 27*89634f99SSanyog Kale not be responsible for the errors so resetting them individually is not a 28*89634f99SSanyog Kale viable recovery strategy. 29*89634f99SSanyog Kale 30*89634f99SSanyog Kale2. Command status: Each command is associated with a status, which only 31*89634f99SSanyog Kale covers transmission of the data between devices. The ACK status indicates 32*89634f99SSanyog Kale that the command was received and will be executed by the end of the 33*89634f99SSanyog Kale current frame. A NAK indicates that the command was in error and will not 34*89634f99SSanyog Kale be applied. In case of a bad programming (command sent to non-existent 35*89634f99SSanyog Kale Slave or to a non-implemented register) or electrical issue, no response 36*89634f99SSanyog Kale signals the command was ignored. Some Master implementations allow for a 37*89634f99SSanyog Kale command to be retransmitted several times. If the retransmission fails, 38*89634f99SSanyog Kale backtracking and restarting the entire programming sequence might be a 39*89634f99SSanyog Kale solution. Alternatively some implementations might directly issue a bus 40*89634f99SSanyog Kale reset and re-enumerate all devices. 41*89634f99SSanyog Kale 42*89634f99SSanyog Kale3. Timeouts: In a number of cases such as ChannelPrepare or 43*89634f99SSanyog Kale ClockStopPrepare, the bus driver is supposed to poll a register field until 44*89634f99SSanyog Kale it transitions to a NotFinished value of zero. The MIPI SoundWire spec 1.1 45*89634f99SSanyog Kale does not define timeouts but the MIPI SoundWire DisCo document adds 46*89634f99SSanyog Kale recommendation on timeouts. If such configurations do not complete, the 47*89634f99SSanyog Kale driver will return a -ETIMEOUT. Such timeouts are symptoms of a faulty 48*89634f99SSanyog Kale Slave device and are likely impossible to recover from. 49*89634f99SSanyog Kale 50*89634f99SSanyog KaleErrors during global reconfiguration sequences are extremely difficult to 51*89634f99SSanyog Kalehandle: 52*89634f99SSanyog Kale 53*89634f99SSanyog Kale1. BankSwitch: An error during the last command issuing a BankSwitch is 54*89634f99SSanyog Kale difficult to backtrack from. Retransmitting the Bank Switch command may be 55*89634f99SSanyog Kale possible in a single segment setup, but this can lead to synchronization 56*89634f99SSanyog Kale problems when enabling multiple bus segments (a command with side effects 57*89634f99SSanyog Kale such as frame reconfiguration would be handled at different times). A global 58*89634f99SSanyog Kale hard-reset might be the best solution. 59*89634f99SSanyog Kale 60*89634f99SSanyog KaleNote that SoundWire does not provide a mechanism to detect illegal values 61*89634f99SSanyog Kalewritten in valid registers. In a number of cases the standard even mentions 62*89634f99SSanyog Kalethat the Slave might behave in implementation-defined ways. The bus 63*89634f99SSanyog Kaleimplementation does not provide a recovery mechanism for such errors, Slave 64*89634f99SSanyog Kaleor Master driver implementers are responsible for writing valid values in 65*89634f99SSanyog Kalevalid registers and implement additional range checking if needed. 66