xref: /openbmc/linux/Documentation/driver-api/media/drivers/cx88-devel.rst (revision 4b4193256c8d3bc3a5397b5cd9494c2ad386317d)
1*577a7ad3SMauro Carvalho Chehab.. SPDX-License-Identifier: GPL-2.0
2*577a7ad3SMauro Carvalho Chehab
3*577a7ad3SMauro Carvalho ChehabThe cx88 driver
4*577a7ad3SMauro Carvalho Chehab===============
5*577a7ad3SMauro Carvalho Chehab
6*577a7ad3SMauro Carvalho ChehabAuthor:  Gerd Hoffmann
7*577a7ad3SMauro Carvalho Chehab
8*577a7ad3SMauro Carvalho ChehabDocumentation missing at the cx88 datasheet
9*577a7ad3SMauro Carvalho Chehab-------------------------------------------
10*577a7ad3SMauro Carvalho Chehab
11*577a7ad3SMauro Carvalho ChehabMO_OUTPUT_FORMAT (0x310164)
12*577a7ad3SMauro Carvalho Chehab
13*577a7ad3SMauro Carvalho Chehab.. code-block:: none
14*577a7ad3SMauro Carvalho Chehab
15*577a7ad3SMauro Carvalho Chehab  Previous default from DScaler: 0x1c1f0008
16*577a7ad3SMauro Carvalho Chehab  Digit 8: 31-28
17*577a7ad3SMauro Carvalho Chehab  28: PREVREMOD = 1
18*577a7ad3SMauro Carvalho Chehab
19*577a7ad3SMauro Carvalho Chehab  Digit 7: 27-24 (0xc = 12 = b1100 )
20*577a7ad3SMauro Carvalho Chehab  27: COMBALT = 1
21*577a7ad3SMauro Carvalho Chehab  26: PAL_INV_PHASE
22*577a7ad3SMauro Carvalho Chehab    (DScaler apparently set this to 1, resulted in sucky picture)
23*577a7ad3SMauro Carvalho Chehab
24*577a7ad3SMauro Carvalho Chehab  Digits 6,5: 23-16
25*577a7ad3SMauro Carvalho Chehab  25-16: COMB_RANGE = 0x1f [default] (9 bits -> max 512)
26*577a7ad3SMauro Carvalho Chehab
27*577a7ad3SMauro Carvalho Chehab  Digit 4: 15-12
28*577a7ad3SMauro Carvalho Chehab  15: DISIFX = 0
29*577a7ad3SMauro Carvalho Chehab  14: INVCBF = 0
30*577a7ad3SMauro Carvalho Chehab  13: DISADAPT = 0
31*577a7ad3SMauro Carvalho Chehab  12: NARROWADAPT = 0
32*577a7ad3SMauro Carvalho Chehab
33*577a7ad3SMauro Carvalho Chehab  Digit 3: 11-8
34*577a7ad3SMauro Carvalho Chehab  11: FORCE2H
35*577a7ad3SMauro Carvalho Chehab  10: FORCEREMD
36*577a7ad3SMauro Carvalho Chehab  9: NCHROMAEN
37*577a7ad3SMauro Carvalho Chehab  8: NREMODEN
38*577a7ad3SMauro Carvalho Chehab
39*577a7ad3SMauro Carvalho Chehab  Digit 2: 7-4
40*577a7ad3SMauro Carvalho Chehab  7-6: YCORE
41*577a7ad3SMauro Carvalho Chehab  5-4: CCORE
42*577a7ad3SMauro Carvalho Chehab
43*577a7ad3SMauro Carvalho Chehab  Digit 1: 3-0
44*577a7ad3SMauro Carvalho Chehab  3: RANGE = 1
45*577a7ad3SMauro Carvalho Chehab  2: HACTEXT
46*577a7ad3SMauro Carvalho Chehab  1: HSFMT
47*577a7ad3SMauro Carvalho Chehab
48*577a7ad3SMauro Carvalho Chehab0x47 is the sync byte for MPEG-2 transport stream packets.
49*577a7ad3SMauro Carvalho ChehabDatasheet incorrectly states to use 47 decimal. 188 is the length.
50*577a7ad3SMauro Carvalho ChehabAll DVB compliant frontends output packets with this start code.
51*577a7ad3SMauro Carvalho Chehab
52*577a7ad3SMauro Carvalho ChehabHauppauge WinTV cx88 IR information
53*577a7ad3SMauro Carvalho Chehab-----------------------------------
54*577a7ad3SMauro Carvalho Chehab
55*577a7ad3SMauro Carvalho ChehabThe controls for the mux are GPIO [0,1] for source, and GPIO 2 for muting.
56*577a7ad3SMauro Carvalho Chehab
57*577a7ad3SMauro Carvalho Chehab====== ======== =================================================
58*577a7ad3SMauro Carvalho ChehabGPIO0  GPIO1
59*577a7ad3SMauro Carvalho Chehab====== ======== =================================================
60*577a7ad3SMauro Carvalho Chehab  0        0    TV Audio
61*577a7ad3SMauro Carvalho Chehab  1        0    FM radio
62*577a7ad3SMauro Carvalho Chehab  0        1    Line-In
63*577a7ad3SMauro Carvalho Chehab  1        1    Mono tuner bypass or CD passthru (tuner specific)
64*577a7ad3SMauro Carvalho Chehab====== ======== =================================================
65*577a7ad3SMauro Carvalho Chehab
66*577a7ad3SMauro Carvalho ChehabGPIO 16(I believe) is tied to the IR port (if present).
67*577a7ad3SMauro Carvalho Chehab
68*577a7ad3SMauro Carvalho Chehab
69*577a7ad3SMauro Carvalho ChehabFrom the data sheet:
70*577a7ad3SMauro Carvalho Chehab
71*577a7ad3SMauro Carvalho Chehab- Register 24'h20004  PCI Interrupt Status
72*577a7ad3SMauro Carvalho Chehab
73*577a7ad3SMauro Carvalho Chehab - bit [18]  IR_SMP_INT Set when 32 input samples have been collected over
74*577a7ad3SMauro Carvalho Chehab - gpio[16] pin into GP_SAMPLE register.
75*577a7ad3SMauro Carvalho Chehab
76*577a7ad3SMauro Carvalho ChehabWhat's missing from the data sheet:
77*577a7ad3SMauro Carvalho Chehab
78*577a7ad3SMauro Carvalho Chehab- Setup 4KHz sampling rate (roughly 2x oversampled; good enough for our RC5
79*577a7ad3SMauro Carvalho Chehab  compat remote)
80*577a7ad3SMauro Carvalho Chehab- set register 0x35C050 to  0xa80a80
81*577a7ad3SMauro Carvalho Chehab- enable sampling
82*577a7ad3SMauro Carvalho Chehab- set register 0x35C054 to 0x5
83*577a7ad3SMauro Carvalho Chehab- enable the IRQ bit 18 in the interrupt mask register (and
84*577a7ad3SMauro Carvalho Chehab  provide for a handler)
85*577a7ad3SMauro Carvalho Chehab
86*577a7ad3SMauro Carvalho ChehabGP_SAMPLE register is at 0x35C058
87*577a7ad3SMauro Carvalho Chehab
88*577a7ad3SMauro Carvalho ChehabBits are then right shifted into the GP_SAMPLE register at the specified
89*577a7ad3SMauro Carvalho Chehabrate; you get an interrupt when a full DWORD is received.
90*577a7ad3SMauro Carvalho ChehabYou need to recover the actual RC5 bits out of the (oversampled) IR sensor
91*577a7ad3SMauro Carvalho Chehabbits. (Hint: look for the 0/1and 1/0 crossings of the RC5 bi-phase data)  An
92*577a7ad3SMauro Carvalho Chehabactual raw RC5 code will span 2-3 DWORDS, depending on the actual alignment.
93*577a7ad3SMauro Carvalho Chehab
94*577a7ad3SMauro Carvalho ChehabI'm pretty sure when no IR signal is present the receiver is always in a
95*577a7ad3SMauro Carvalho Chehabmarking state(1); but stray light, etc can cause intermittent noise values
96*577a7ad3SMauro Carvalho Chehabas well.  Remember, this is a free running sample of the IR receiver state
97*577a7ad3SMauro Carvalho Chehabover time, so don't assume any sample starts at any particular place.
98*577a7ad3SMauro Carvalho Chehab
99*577a7ad3SMauro Carvalho ChehabAdditional info
100*577a7ad3SMauro Carvalho Chehab~~~~~~~~~~~~~~~
101*577a7ad3SMauro Carvalho Chehab
102*577a7ad3SMauro Carvalho ChehabThis data sheet (google search) seems to have a lovely description of the
103*577a7ad3SMauro Carvalho ChehabRC5 basics:
104*577a7ad3SMauro Carvalho Chehabhttp://www.atmel.com/dyn/resources/prod_documents/doc2817.pdf
105*577a7ad3SMauro Carvalho Chehab
106*577a7ad3SMauro Carvalho ChehabThis document has more data:
107*577a7ad3SMauro Carvalho Chehabhttp://www.nenya.be/beor/electronics/rc5.htm
108*577a7ad3SMauro Carvalho Chehab
109*577a7ad3SMauro Carvalho ChehabThis document has a  how to decode a bi-phase data stream:
110*577a7ad3SMauro Carvalho Chehabhttp://www.ee.washington.edu/circuit_archive/text/ir_decode.txt
111*577a7ad3SMauro Carvalho Chehab
112*577a7ad3SMauro Carvalho ChehabThis document has still more info:
113*577a7ad3SMauro Carvalho Chehabhttp://www.xs4all.nl/~sbp/knowledge/ir/rc5.htm
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