xref: /openbmc/linux/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml (revision 9a87ffc99ec8eb8d35eed7c4f816d75f5cc9662e)
1*2648f68bSWayne Chang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*2648f68bSWayne Chang%YAML 1.2
3*2648f68bSWayne Chang---
4*2648f68bSWayne Chang$id: http://devicetree.org/schemas/usb/nvidia,tegra234-xusb.yaml#
5*2648f68bSWayne Chang$schema: http://devicetree.org/meta-schemas/core.yaml#
6*2648f68bSWayne Chang
7*2648f68bSWayne Changtitle: NVIDIA Tegra234 xHCI controller
8*2648f68bSWayne Chang
9*2648f68bSWayne Changmaintainers:
10*2648f68bSWayne Chang  - Thierry Reding <thierry.reding@gmail.com>
11*2648f68bSWayne Chang  - Jon Hunter <jonathanh@nvidia.com>
12*2648f68bSWayne Chang
13*2648f68bSWayne Changdescription: |
14*2648f68bSWayne Chang  The Tegra xHCI controller supports both USB2 and USB3 interfaces exposed by
15*2648f68bSWayne Chang  the Tegra XUSB pad controller. The xHCI controller controls up to eight
16*2648f68bSWayne Chang  ports; there are four USB 2.0 ports and four USB 3.2 Gen1 x1 ports.
17*2648f68bSWayne Chang
18*2648f68bSWayne Changproperties:
19*2648f68bSWayne Chang  compatible:
20*2648f68bSWayne Chang    const: nvidia,tegra234-xusb
21*2648f68bSWayne Chang
22*2648f68bSWayne Chang  reg:
23*2648f68bSWayne Chang    items:
24*2648f68bSWayne Chang      - description: xHCI host registers
25*2648f68bSWayne Chang      - description: XUSB FPCI registers
26*2648f68bSWayne Chang      - description: XUSB bar2 registers
27*2648f68bSWayne Chang
28*2648f68bSWayne Chang  reg-names:
29*2648f68bSWayne Chang    items:
30*2648f68bSWayne Chang      - const: hcd
31*2648f68bSWayne Chang      - const: fpci
32*2648f68bSWayne Chang      - const: bar2
33*2648f68bSWayne Chang
34*2648f68bSWayne Chang  interrupts:
35*2648f68bSWayne Chang    items:
36*2648f68bSWayne Chang      - description: xHCI host interrupt
37*2648f68bSWayne Chang      - description: mailbox interrupt
38*2648f68bSWayne Chang
39*2648f68bSWayne Chang  clocks:
40*2648f68bSWayne Chang    items:
41*2648f68bSWayne Chang      - description: XUSB host clock
42*2648f68bSWayne Chang      - description: XUSB Falcon source clock
43*2648f68bSWayne Chang      - description: XUSB SuperSpeed clock
44*2648f68bSWayne Chang      - description: XUSB SuperSpeed source clock
45*2648f68bSWayne Chang      - description: XUSB HighSpeed clock source
46*2648f68bSWayne Chang      - description: XUSB FullSpeed clock source
47*2648f68bSWayne Chang      - description: USB PLL
48*2648f68bSWayne Chang      - description: reference clock
49*2648f68bSWayne Chang      - description: I/O PLL
50*2648f68bSWayne Chang
51*2648f68bSWayne Chang  clock-names:
52*2648f68bSWayne Chang    items:
53*2648f68bSWayne Chang      - const: xusb_host
54*2648f68bSWayne Chang      - const: xusb_falcon_src
55*2648f68bSWayne Chang      - const: xusb_ss
56*2648f68bSWayne Chang      - const: xusb_ss_src
57*2648f68bSWayne Chang      - const: xusb_hs_src
58*2648f68bSWayne Chang      - const: xusb_fs_src
59*2648f68bSWayne Chang      - const: pll_u_480m
60*2648f68bSWayne Chang      - const: clk_m
61*2648f68bSWayne Chang      - const: pll_e
62*2648f68bSWayne Chang
63*2648f68bSWayne Chang  interconnects:
64*2648f68bSWayne Chang    items:
65*2648f68bSWayne Chang      - description: read client
66*2648f68bSWayne Chang      - description: write client
67*2648f68bSWayne Chang
68*2648f68bSWayne Chang  interconnect-names:
69*2648f68bSWayne Chang    items:
70*2648f68bSWayne Chang      - const: dma-mem # read
71*2648f68bSWayne Chang      - const: write
72*2648f68bSWayne Chang
73*2648f68bSWayne Chang  iommus:
74*2648f68bSWayne Chang    maxItems: 1
75*2648f68bSWayne Chang
76*2648f68bSWayne Chang  nvidia,xusb-padctl:
77*2648f68bSWayne Chang    $ref: /schemas/types.yaml#/definitions/phandle
78*2648f68bSWayne Chang    description: phandle to the XUSB pad controller that is used to configure
79*2648f68bSWayne Chang      the USB pads used by the XHCI controller
80*2648f68bSWayne Chang
81*2648f68bSWayne Chang  phys:
82*2648f68bSWayne Chang    minItems: 1
83*2648f68bSWayne Chang    maxItems: 8
84*2648f68bSWayne Chang
85*2648f68bSWayne Chang  phy-names:
86*2648f68bSWayne Chang    minItems: 1
87*2648f68bSWayne Chang    maxItems: 8
88*2648f68bSWayne Chang    items:
89*2648f68bSWayne Chang      enum:
90*2648f68bSWayne Chang        - usb2-0
91*2648f68bSWayne Chang        - usb2-1
92*2648f68bSWayne Chang        - usb2-2
93*2648f68bSWayne Chang        - usb2-3
94*2648f68bSWayne Chang        - usb3-0
95*2648f68bSWayne Chang        - usb3-1
96*2648f68bSWayne Chang        - usb3-2
97*2648f68bSWayne Chang        - usb3-3
98*2648f68bSWayne Chang
99*2648f68bSWayne Chang  power-domains:
100*2648f68bSWayne Chang    items:
101*2648f68bSWayne Chang      - description: XUSBC power domain (for Host and USB 2.0)
102*2648f68bSWayne Chang      - description: XUSBA power domain (for SuperSpeed)
103*2648f68bSWayne Chang
104*2648f68bSWayne Chang  power-domain-names:
105*2648f68bSWayne Chang    items:
106*2648f68bSWayne Chang      - const: xusb_host
107*2648f68bSWayne Chang      - const: xusb_ss
108*2648f68bSWayne Chang
109*2648f68bSWayne Chang  dma-coherent: true
110*2648f68bSWayne Chang
111*2648f68bSWayne ChangallOf:
112*2648f68bSWayne Chang  - $ref: usb-xhci.yaml
113*2648f68bSWayne Chang
114*2648f68bSWayne ChangunevaluatedProperties: false
115*2648f68bSWayne Chang
116*2648f68bSWayne Changexamples:
117*2648f68bSWayne Chang  - |
118*2648f68bSWayne Chang    #include <dt-bindings/clock/tegra234-clock.h>
119*2648f68bSWayne Chang    #include <dt-bindings/interrupt-controller/arm-gic.h>
120*2648f68bSWayne Chang    #include <dt-bindings/memory/tegra234-mc.h>
121*2648f68bSWayne Chang    #include <dt-bindings/power/tegra234-powergate.h>
122*2648f68bSWayne Chang
123*2648f68bSWayne Chang    usb@3610000 {
124*2648f68bSWayne Chang        compatible = "nvidia,tegra234-xusb";
125*2648f68bSWayne Chang        reg = <0x03610000 0x40000>,
126*2648f68bSWayne Chang              <0x03600000 0x10000>,
127*2648f68bSWayne Chang              <0x03650000 0x10000>;
128*2648f68bSWayne Chang        reg-names = "hcd", "fpci", "bar2";
129*2648f68bSWayne Chang
130*2648f68bSWayne Chang        interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>,
131*2648f68bSWayne Chang                     <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
132*2648f68bSWayne Chang
133*2648f68bSWayne Chang        clocks = <&bpmp TEGRA234_CLK_XUSB_CORE_HOST>,
134*2648f68bSWayne Chang                 <&bpmp TEGRA234_CLK_XUSB_FALCON>,
135*2648f68bSWayne Chang                 <&bpmp TEGRA234_CLK_XUSB_CORE_SS>,
136*2648f68bSWayne Chang                 <&bpmp TEGRA234_CLK_XUSB_SS>,
137*2648f68bSWayne Chang                 <&bpmp TEGRA234_CLK_CLK_M>,
138*2648f68bSWayne Chang                 <&bpmp TEGRA234_CLK_XUSB_FS>,
139*2648f68bSWayne Chang                 <&bpmp TEGRA234_CLK_UTMIP_PLL>,
140*2648f68bSWayne Chang                 <&bpmp TEGRA234_CLK_CLK_M>,
141*2648f68bSWayne Chang                 <&bpmp TEGRA234_CLK_PLLE>;
142*2648f68bSWayne Chang        clock-names = "xusb_host", "xusb_falcon_src",
143*2648f68bSWayne Chang                      "xusb_ss", "xusb_ss_src", "xusb_hs_src",
144*2648f68bSWayne Chang                      "xusb_fs_src", "pll_u_480m", "clk_m",
145*2648f68bSWayne Chang                      "pll_e";
146*2648f68bSWayne Chang        interconnects = <&mc TEGRA234_MEMORY_CLIENT_XUSB_HOSTR &emc>,
147*2648f68bSWayne Chang                        <&mc TEGRA234_MEMORY_CLIENT_XUSB_HOSTW &emc>;
148*2648f68bSWayne Chang        interconnect-names = "dma-mem", "write";
149*2648f68bSWayne Chang        iommus = <&smmu_niso1 TEGRA234_SID_XUSB_HOST>;
150*2648f68bSWayne Chang
151*2648f68bSWayne Chang        power-domains = <&bpmp TEGRA234_POWER_DOMAIN_XUSBC>,
152*2648f68bSWayne Chang                        <&bpmp TEGRA234_POWER_DOMAIN_XUSBA>;
153*2648f68bSWayne Chang        power-domain-names = "xusb_host", "xusb_ss";
154*2648f68bSWayne Chang
155*2648f68bSWayne Chang        nvidia,xusb-padctl = <&xusb_padctl>;
156*2648f68bSWayne Chang
157*2648f68bSWayne Chang        phys = <&pad_lanes_usb2_0>;
158*2648f68bSWayne Chang        phy-names = "usb2-0";
159*2648f68bSWayne Chang    };
160