1*68989fe1SRoger Quadros# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2*68989fe1SRoger Quadros%YAML 1.2 3*68989fe1SRoger Quadros--- 4*68989fe1SRoger Quadros$id: http://devicetree.org/schemas/usb/cdns,usb3.yaml# 5*68989fe1SRoger Quadros$schema: http://devicetree.org/meta-schemas/core.yaml# 6*68989fe1SRoger Quadros 7*68989fe1SRoger Quadrostitle: Cadence USBSS-DRD controller bindings 8*68989fe1SRoger Quadros 9*68989fe1SRoger Quadrosmaintainers: 10*68989fe1SRoger Quadros - Pawel Laszczak <pawell@cadence.com> 11*68989fe1SRoger Quadros 12*68989fe1SRoger Quadrosproperties: 13*68989fe1SRoger Quadros compatible: 14*68989fe1SRoger Quadros const: cdns,usb3 15*68989fe1SRoger Quadros 16*68989fe1SRoger Quadros reg: 17*68989fe1SRoger Quadros items: 18*68989fe1SRoger Quadros - description: OTG controller registers 19*68989fe1SRoger Quadros - description: XHCI Host controller registers 20*68989fe1SRoger Quadros - description: DEVICE controller registers 21*68989fe1SRoger Quadros 22*68989fe1SRoger Quadros reg-names: 23*68989fe1SRoger Quadros items: 24*68989fe1SRoger Quadros - const: otg 25*68989fe1SRoger Quadros - const: xhci 26*68989fe1SRoger Quadros - const: dev 27*68989fe1SRoger Quadros 28*68989fe1SRoger Quadros interrupts: 29*68989fe1SRoger Quadros items: 30*68989fe1SRoger Quadros - description: OTG/DRD controller interrupt 31*68989fe1SRoger Quadros - description: XHCI host controller interrupt 32*68989fe1SRoger Quadros - description: Device controller interrupt 33*68989fe1SRoger Quadros 34*68989fe1SRoger Quadros interrupt-names: 35*68989fe1SRoger Quadros items: 36*68989fe1SRoger Quadros - const: host 37*68989fe1SRoger Quadros - const: peripheral 38*68989fe1SRoger Quadros - const: otg 39*68989fe1SRoger Quadros 40*68989fe1SRoger Quadros dr_mode: 41*68989fe1SRoger Quadros enum: [host, otg, peripheral] 42*68989fe1SRoger Quadros 43*68989fe1SRoger Quadros maximum-speed: 44*68989fe1SRoger Quadros enum: [super-speed, high-speed, full-speed] 45*68989fe1SRoger Quadros 46*68989fe1SRoger Quadros phys: 47*68989fe1SRoger Quadros minItems: 1 48*68989fe1SRoger Quadros maxItems: 2 49*68989fe1SRoger Quadros 50*68989fe1SRoger Quadros phy-names: 51*68989fe1SRoger Quadros minItems: 1 52*68989fe1SRoger Quadros maxItems: 2 53*68989fe1SRoger Quadros items: 54*68989fe1SRoger Quadros anyOf: 55*68989fe1SRoger Quadros - const: cdns3,usb2-phy 56*68989fe1SRoger Quadros - const: cdns3,usb3-phy 57*68989fe1SRoger Quadros 58*68989fe1SRoger Quadros cdns,on-chip-buff-size: 59*68989fe1SRoger Quadros description: 60*68989fe1SRoger Quadros size of memory intended as internal memory for endpoints 61*68989fe1SRoger Quadros buffers expressed in KB 62*68989fe1SRoger Quadros $ref: /schemas/types.yaml#/definitions/uint32 63*68989fe1SRoger Quadros 64*68989fe1SRoger Quadrosrequired: 65*68989fe1SRoger Quadros - compatible 66*68989fe1SRoger Quadros - reg 67*68989fe1SRoger Quadros - reg-names 68*68989fe1SRoger Quadros - interrupts 69*68989fe1SRoger Quadros 70*68989fe1SRoger QuadrosadditionalProperties: false 71*68989fe1SRoger Quadros 72*68989fe1SRoger Quadrosexamples: 73*68989fe1SRoger Quadros - | 74*68989fe1SRoger Quadros #include <dt-bindings/interrupt-controller/arm-gic.h> 75*68989fe1SRoger Quadros bus { 76*68989fe1SRoger Quadros #address-cells = <2>; 77*68989fe1SRoger Quadros #size-cells = <2>; 78*68989fe1SRoger Quadros 79*68989fe1SRoger Quadros usb@6000000 { 80*68989fe1SRoger Quadros compatible = "cdns,usb3"; 81*68989fe1SRoger Quadros reg = <0x00 0x6000000 0x00 0x10000>, 82*68989fe1SRoger Quadros <0x00 0x6010000 0x00 0x10000>, 83*68989fe1SRoger Quadros <0x00 0x6020000 0x00 0x10000>; 84*68989fe1SRoger Quadros reg-names = "otg", "xhci", "dev"; 85*68989fe1SRoger Quadros interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, 86*68989fe1SRoger Quadros <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 87*68989fe1SRoger Quadros <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 88*68989fe1SRoger Quadros interrupt-names = "host", "peripheral", "otg"; 89*68989fe1SRoger Quadros maximum-speed = "super-speed"; 90*68989fe1SRoger Quadros dr_mode = "otg"; 91*68989fe1SRoger Quadros }; 92*68989fe1SRoger Quadros }; 93