xref: /openbmc/linux/Documentation/devicetree/bindings/timer/renesas,tmu.yaml (revision fa7fc5243f9e7d64ea7e73c247218f22499c3479)
1b7c0fed5SGeert Uytterhoeven# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2b7c0fed5SGeert Uytterhoeven%YAML 1.2
3b7c0fed5SGeert Uytterhoeven---
4b7c0fed5SGeert Uytterhoeven$id: http://devicetree.org/schemas/timer/renesas,tmu.yaml#
5b7c0fed5SGeert Uytterhoeven$schema: http://devicetree.org/meta-schemas/core.yaml#
6b7c0fed5SGeert Uytterhoeven
7b7c0fed5SGeert Uytterhoeventitle: Renesas R-Mobile/R-Car Timer Unit (TMU)
8b7c0fed5SGeert Uytterhoeven
9b7c0fed5SGeert Uytterhoevenmaintainers:
10b7c0fed5SGeert Uytterhoeven  - Geert Uytterhoeven <geert+renesas@glider.be>
11b7c0fed5SGeert Uytterhoeven  - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
12b7c0fed5SGeert Uytterhoeven
13b7c0fed5SGeert Uytterhoevendescription:
14b7c0fed5SGeert Uytterhoeven  The TMU is a 32-bit timer/counter with configurable clock inputs and
15b7c0fed5SGeert Uytterhoeven  programmable compare match.
16b7c0fed5SGeert Uytterhoeven
17b7c0fed5SGeert Uytterhoeven  Channels share hardware resources but their counter and compare match value
18b7c0fed5SGeert Uytterhoeven  are independent. The TMU hardware supports up to three channels.
19b7c0fed5SGeert Uytterhoeven
20b7c0fed5SGeert Uytterhoevenproperties:
21b7c0fed5SGeert Uytterhoeven  compatible:
22b7c0fed5SGeert Uytterhoeven    items:
23b7c0fed5SGeert Uytterhoeven      - enum:
24b7c0fed5SGeert Uytterhoeven          - renesas,tmu-r8a7740  # R-Mobile A1
25b7c0fed5SGeert Uytterhoeven          - renesas,tmu-r8a774a1 # RZ/G2M
26b7c0fed5SGeert Uytterhoeven          - renesas,tmu-r8a774b1 # RZ/G2N
27b7c0fed5SGeert Uytterhoeven          - renesas,tmu-r8a774c0 # RZ/G2E
28b7c0fed5SGeert Uytterhoeven          - renesas,tmu-r8a774e1 # RZ/G2H
29b7c0fed5SGeert Uytterhoeven          - renesas,tmu-r8a7778  # R-Car M1A
30b7c0fed5SGeert Uytterhoeven          - renesas,tmu-r8a7779  # R-Car H1
31c4d81441SNiklas Söderlund          - renesas,tmu-r8a7795  # R-Car H3
32c4d81441SNiklas Söderlund          - renesas,tmu-r8a7796  # R-Car M3-W
33c4d81441SNiklas Söderlund          - renesas,tmu-r8a77961 # R-Car M3-W+
34c4d81441SNiklas Söderlund          - renesas,tmu-r8a77965 # R-Car M3-N
35b7c0fed5SGeert Uytterhoeven          - renesas,tmu-r8a77970 # R-Car V3M
36b7c0fed5SGeert Uytterhoeven          - renesas,tmu-r8a77980 # R-Car V3H
37c4d81441SNiklas Söderlund          - renesas,tmu-r8a77990 # R-Car E3
38c4d81441SNiklas Söderlund          - renesas,tmu-r8a77995 # R-Car D3
39cdbbe6ceSWolfram Sang          - renesas,tmu-r8a779a0 # R-Car V3U
40*fa7fc524SWolfram Sang          - renesas,tmu-r8a779f0 # R-Car S4-8
41b7c0fed5SGeert Uytterhoeven      - const: renesas,tmu
42b7c0fed5SGeert Uytterhoeven
43b7c0fed5SGeert Uytterhoeven  reg:
44b7c0fed5SGeert Uytterhoeven    maxItems: 1
45b7c0fed5SGeert Uytterhoeven
46b7c0fed5SGeert Uytterhoeven  interrupts:
47b7c0fed5SGeert Uytterhoeven    minItems: 2
48b7c0fed5SGeert Uytterhoeven    maxItems: 3
49b7c0fed5SGeert Uytterhoeven
50b7c0fed5SGeert Uytterhoeven  clocks:
51b7c0fed5SGeert Uytterhoeven    maxItems: 1
52b7c0fed5SGeert Uytterhoeven
53b7c0fed5SGeert Uytterhoeven  clock-names:
54b7c0fed5SGeert Uytterhoeven    const: fck
55b7c0fed5SGeert Uytterhoeven
56b7c0fed5SGeert Uytterhoeven  power-domains:
57b7c0fed5SGeert Uytterhoeven    maxItems: 1
58b7c0fed5SGeert Uytterhoeven
59b7c0fed5SGeert Uytterhoeven  resets:
60b7c0fed5SGeert Uytterhoeven    maxItems: 1
61b7c0fed5SGeert Uytterhoeven
62b7c0fed5SGeert Uytterhoeven  '#renesas,channels':
63b7c0fed5SGeert Uytterhoeven    description:
64b7c0fed5SGeert Uytterhoeven      Number of channels implemented by the timer.
65b7c0fed5SGeert Uytterhoeven    $ref: /schemas/types.yaml#/definitions/uint32
66b7c0fed5SGeert Uytterhoeven    enum: [ 2, 3 ]
67b7c0fed5SGeert Uytterhoeven    default: 3
68b7c0fed5SGeert Uytterhoeven
69b7c0fed5SGeert Uytterhoevenrequired:
70b7c0fed5SGeert Uytterhoeven  - compatible
71b7c0fed5SGeert Uytterhoeven  - reg
72b7c0fed5SGeert Uytterhoeven  - interrupts
73b7c0fed5SGeert Uytterhoeven  - clocks
74b7c0fed5SGeert Uytterhoeven  - clock-names
75b7c0fed5SGeert Uytterhoeven  - power-domains
76b7c0fed5SGeert Uytterhoeven
77b7c0fed5SGeert Uytterhoevenif:
78b7c0fed5SGeert Uytterhoeven  not:
79b7c0fed5SGeert Uytterhoeven    properties:
80b7c0fed5SGeert Uytterhoeven      compatible:
81b7c0fed5SGeert Uytterhoeven        contains:
82b7c0fed5SGeert Uytterhoeven          enum:
83b7c0fed5SGeert Uytterhoeven            - renesas,tmu-r8a7740
84b7c0fed5SGeert Uytterhoeven            - renesas,tmu-r8a7778
85b7c0fed5SGeert Uytterhoeven            - renesas,tmu-r8a7779
86b7c0fed5SGeert Uytterhoeventhen:
87b7c0fed5SGeert Uytterhoeven  required:
88b7c0fed5SGeert Uytterhoeven    - resets
89b7c0fed5SGeert Uytterhoeven
90b7c0fed5SGeert UytterhoevenadditionalProperties: false
91b7c0fed5SGeert Uytterhoeven
92b7c0fed5SGeert Uytterhoevenexamples:
93b7c0fed5SGeert Uytterhoeven  - |
94b7c0fed5SGeert Uytterhoeven    #include <dt-bindings/clock/r8a7779-clock.h>
95b7c0fed5SGeert Uytterhoeven    #include <dt-bindings/interrupt-controller/arm-gic.h>
96b7c0fed5SGeert Uytterhoeven    #include <dt-bindings/power/r8a7779-sysc.h>
97b7c0fed5SGeert Uytterhoeven    tmu0: timer@ffd80000 {
98b7c0fed5SGeert Uytterhoeven            compatible = "renesas,tmu-r8a7779", "renesas,tmu";
99b7c0fed5SGeert Uytterhoeven            reg = <0xffd80000 0x30>;
100b7c0fed5SGeert Uytterhoeven            interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>,
101b7c0fed5SGeert Uytterhoeven                         <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>,
102b7c0fed5SGeert Uytterhoeven                         <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
103b7c0fed5SGeert Uytterhoeven            clocks = <&mstp0_clks R8A7779_CLK_TMU0>;
104b7c0fed5SGeert Uytterhoeven            clock-names = "fck";
105b7c0fed5SGeert Uytterhoeven            power-domains = <&sysc R8A7779_PD_ALWAYS_ON>;
106b7c0fed5SGeert Uytterhoeven            #renesas,channels = <3>;
107b7c0fed5SGeert Uytterhoeven    };
108