1*b7c0fed5SGeert Uytterhoeven# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*b7c0fed5SGeert Uytterhoeven%YAML 1.2 3*b7c0fed5SGeert Uytterhoeven--- 4*b7c0fed5SGeert Uytterhoeven$id: http://devicetree.org/schemas/timer/renesas,tmu.yaml# 5*b7c0fed5SGeert Uytterhoeven$schema: http://devicetree.org/meta-schemas/core.yaml# 6*b7c0fed5SGeert Uytterhoeven 7*b7c0fed5SGeert Uytterhoeventitle: Renesas R-Mobile/R-Car Timer Unit (TMU) 8*b7c0fed5SGeert Uytterhoeven 9*b7c0fed5SGeert Uytterhoevenmaintainers: 10*b7c0fed5SGeert Uytterhoeven - Geert Uytterhoeven <geert+renesas@glider.be> 11*b7c0fed5SGeert Uytterhoeven - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> 12*b7c0fed5SGeert Uytterhoeven 13*b7c0fed5SGeert Uytterhoevendescription: 14*b7c0fed5SGeert Uytterhoeven The TMU is a 32-bit timer/counter with configurable clock inputs and 15*b7c0fed5SGeert Uytterhoeven programmable compare match. 16*b7c0fed5SGeert Uytterhoeven 17*b7c0fed5SGeert Uytterhoeven Channels share hardware resources but their counter and compare match value 18*b7c0fed5SGeert Uytterhoeven are independent. The TMU hardware supports up to three channels. 19*b7c0fed5SGeert Uytterhoeven 20*b7c0fed5SGeert Uytterhoevenproperties: 21*b7c0fed5SGeert Uytterhoeven compatible: 22*b7c0fed5SGeert Uytterhoeven items: 23*b7c0fed5SGeert Uytterhoeven - enum: 24*b7c0fed5SGeert Uytterhoeven - renesas,tmu-r8a7740 # R-Mobile A1 25*b7c0fed5SGeert Uytterhoeven - renesas,tmu-r8a774a1 # RZ/G2M 26*b7c0fed5SGeert Uytterhoeven - renesas,tmu-r8a774b1 # RZ/G2N 27*b7c0fed5SGeert Uytterhoeven - renesas,tmu-r8a774c0 # RZ/G2E 28*b7c0fed5SGeert Uytterhoeven - renesas,tmu-r8a774e1 # RZ/G2H 29*b7c0fed5SGeert Uytterhoeven - renesas,tmu-r8a7778 # R-Car M1A 30*b7c0fed5SGeert Uytterhoeven - renesas,tmu-r8a7779 # R-Car H1 31*b7c0fed5SGeert Uytterhoeven - renesas,tmu-r8a77970 # R-Car V3M 32*b7c0fed5SGeert Uytterhoeven - renesas,tmu-r8a77980 # R-Car V3H 33*b7c0fed5SGeert Uytterhoeven - const: renesas,tmu 34*b7c0fed5SGeert Uytterhoeven 35*b7c0fed5SGeert Uytterhoeven reg: 36*b7c0fed5SGeert Uytterhoeven maxItems: 1 37*b7c0fed5SGeert Uytterhoeven 38*b7c0fed5SGeert Uytterhoeven interrupts: 39*b7c0fed5SGeert Uytterhoeven minItems: 2 40*b7c0fed5SGeert Uytterhoeven maxItems: 3 41*b7c0fed5SGeert Uytterhoeven 42*b7c0fed5SGeert Uytterhoeven clocks: 43*b7c0fed5SGeert Uytterhoeven maxItems: 1 44*b7c0fed5SGeert Uytterhoeven 45*b7c0fed5SGeert Uytterhoeven clock-names: 46*b7c0fed5SGeert Uytterhoeven const: fck 47*b7c0fed5SGeert Uytterhoeven 48*b7c0fed5SGeert Uytterhoeven power-domains: 49*b7c0fed5SGeert Uytterhoeven maxItems: 1 50*b7c0fed5SGeert Uytterhoeven 51*b7c0fed5SGeert Uytterhoeven resets: 52*b7c0fed5SGeert Uytterhoeven maxItems: 1 53*b7c0fed5SGeert Uytterhoeven 54*b7c0fed5SGeert Uytterhoeven '#renesas,channels': 55*b7c0fed5SGeert Uytterhoeven description: 56*b7c0fed5SGeert Uytterhoeven Number of channels implemented by the timer. 57*b7c0fed5SGeert Uytterhoeven $ref: /schemas/types.yaml#/definitions/uint32 58*b7c0fed5SGeert Uytterhoeven enum: [ 2, 3 ] 59*b7c0fed5SGeert Uytterhoeven default: 3 60*b7c0fed5SGeert Uytterhoeven 61*b7c0fed5SGeert Uytterhoevenrequired: 62*b7c0fed5SGeert Uytterhoeven - compatible 63*b7c0fed5SGeert Uytterhoeven - reg 64*b7c0fed5SGeert Uytterhoeven - interrupts 65*b7c0fed5SGeert Uytterhoeven - clocks 66*b7c0fed5SGeert Uytterhoeven - clock-names 67*b7c0fed5SGeert Uytterhoeven - power-domains 68*b7c0fed5SGeert Uytterhoeven 69*b7c0fed5SGeert Uytterhoevenif: 70*b7c0fed5SGeert Uytterhoeven not: 71*b7c0fed5SGeert Uytterhoeven properties: 72*b7c0fed5SGeert Uytterhoeven compatible: 73*b7c0fed5SGeert Uytterhoeven contains: 74*b7c0fed5SGeert Uytterhoeven enum: 75*b7c0fed5SGeert Uytterhoeven - renesas,tmu-r8a7740 76*b7c0fed5SGeert Uytterhoeven - renesas,tmu-r8a7778 77*b7c0fed5SGeert Uytterhoeven - renesas,tmu-r8a7779 78*b7c0fed5SGeert Uytterhoeventhen: 79*b7c0fed5SGeert Uytterhoeven required: 80*b7c0fed5SGeert Uytterhoeven - resets 81*b7c0fed5SGeert Uytterhoeven 82*b7c0fed5SGeert UytterhoevenadditionalProperties: false 83*b7c0fed5SGeert Uytterhoeven 84*b7c0fed5SGeert Uytterhoevenexamples: 85*b7c0fed5SGeert Uytterhoeven - | 86*b7c0fed5SGeert Uytterhoeven #include <dt-bindings/clock/r8a7779-clock.h> 87*b7c0fed5SGeert Uytterhoeven #include <dt-bindings/interrupt-controller/arm-gic.h> 88*b7c0fed5SGeert Uytterhoeven #include <dt-bindings/power/r8a7779-sysc.h> 89*b7c0fed5SGeert Uytterhoeven tmu0: timer@ffd80000 { 90*b7c0fed5SGeert Uytterhoeven compatible = "renesas,tmu-r8a7779", "renesas,tmu"; 91*b7c0fed5SGeert Uytterhoeven reg = <0xffd80000 0x30>; 92*b7c0fed5SGeert Uytterhoeven interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>, 93*b7c0fed5SGeert Uytterhoeven <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>, 94*b7c0fed5SGeert Uytterhoeven <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; 95*b7c0fed5SGeert Uytterhoeven clocks = <&mstp0_clks R8A7779_CLK_TMU0>; 96*b7c0fed5SGeert Uytterhoeven clock-names = "fck"; 97*b7c0fed5SGeert Uytterhoeven power-domains = <&sysc R8A7779_PD_ALWAYS_ON>; 98*b7c0fed5SGeert Uytterhoeven #renesas,channels = <3>; 99*b7c0fed5SGeert Uytterhoeven }; 100