xref: /openbmc/linux/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml (revision 1ac731c529cd4d6adbce134754b51ff7d822b145)

# SPDX-License-Identifier: (GPL-2.0 OR MIT)
# Copyright 2019 Linaro Ltd.
%YAML 1.2
---
$id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: QCOM SoC Temperature Sensor (TSENS)

maintainers:
  - Amit Kucheria <amitk@kernel.org>

description: |
  QCOM SoCs have TSENS IP to allow temperature measurement. There are currently
  three distinct major versions of the IP that is supported by a single driver.
  The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures
  everything before v1 when there was no versioning information.

properties:
  compatible:
    oneOf:
      - description: msm8960 TSENS based
        items:
          - enum:
              - qcom,ipq8064-tsens
              - qcom,msm8960-tsens

      - description: v0.1 of TSENS
        items:
          - enum:
              - qcom,mdm9607-tsens
              - qcom,msm8226-tsens
              - qcom,msm8909-tsens
              - qcom,msm8916-tsens
              - qcom,msm8939-tsens
              - qcom,msm8974-tsens
          - const: qcom,tsens-v0_1

      - description: v1 of TSENS
        items:
          - enum:
              - qcom,msm8956-tsens
              - qcom,msm8976-tsens
              - qcom,qcs404-tsens
          - const: qcom,tsens-v1

      - description: v2 of TSENS
        items:
          - enum:
              - qcom,msm8953-tsens
              - qcom,msm8996-tsens
              - qcom,msm8998-tsens
              - qcom,qcm2290-tsens
              - qcom,sc7180-tsens
              - qcom,sc7280-tsens
              - qcom,sc8180x-tsens
              - qcom,sc8280xp-tsens
              - qcom,sdm630-tsens
              - qcom,sdm845-tsens
              - qcom,sm6115-tsens
              - qcom,sm6350-tsens
              - qcom,sm6375-tsens
              - qcom,sm8150-tsens
              - qcom,sm8250-tsens
              - qcom,sm8350-tsens
              - qcom,sm8450-tsens
              - qcom,sm8550-tsens
          - const: qcom,tsens-v2

      - description: v2 of TSENS with combined interrupt
        enum:
          - qcom,ipq8074-tsens

      - description: v2 of TSENS with combined interrupt
        items:
          - enum:
              - qcom,ipq9574-tsens
          - const: qcom,ipq8074-tsens

  reg:
    items:
      - description: TM registers
      - description: SROT registers

  interrupts:
    minItems: 1
    maxItems: 2

  interrupt-names:
    minItems: 1
    maxItems: 2

  nvmem-cells:
    oneOf:
      - minItems: 1
        maxItems: 2
        description:
          Reference to an nvmem node for the calibration data
      - minItems: 5
        maxItems: 35
        description: |
          Reference to nvmem cells for the calibration mode, two calibration
          bases and two cells per each sensor
        # special case for msm8974 / apq8084
      - maxItems: 51
        description: |
          Reference to nvmem cells for the calibration mode, two calibration
          bases and two cells per each sensor, main and backup copies, plus use_backup cell

  nvmem-cell-names:
    oneOf:
      - minItems: 1
        items:
          - const: calib
          - enum:
              - calib_backup
              - calib_sel
      - minItems: 5
        items:
          - const: mode
          - const: base1
          - const: base2
          - pattern: '^s[0-9]+_p1$'
          - pattern: '^s[0-9]+_p2$'
          - pattern: '^s[0-9]+_p1$'
          - pattern: '^s[0-9]+_p2$'
          - pattern: '^s[0-9]+_p1$'
          - pattern: '^s[0-9]+_p2$'
          - pattern: '^s[0-9]+_p1$'
          - pattern: '^s[0-9]+_p2$'
          - pattern: '^s[0-9]+_p1$'
          - pattern: '^s[0-9]+_p2$'
          - pattern: '^s[0-9]+_p1$'
          - pattern: '^s[0-9]+_p2$'
          - pattern: '^s[0-9]+_p1$'
          - pattern: '^s[0-9]+_p2$'
          - pattern: '^s[0-9]+_p1$'
          - pattern: '^s[0-9]+_p2$'
          - pattern: '^s[0-9]+_p1$'
          - pattern: '^s[0-9]+_p2$'
          - pattern: '^s[0-9]+_p1$'
          - pattern: '^s[0-9]+_p2$'
          - pattern: '^s[0-9]+_p1$'
          - pattern: '^s[0-9]+_p2$'
          - pattern: '^s[0-9]+_p1$'
          - pattern: '^s[0-9]+_p2$'
          - pattern: '^s[0-9]+_p1$'
          - pattern: '^s[0-9]+_p2$'
          - pattern: '^s[0-9]+_p1$'
          - pattern: '^s[0-9]+_p2$'
          - pattern: '^s[0-9]+_p1$'
          - pattern: '^s[0-9]+_p2$'
          - pattern: '^s[0-9]+_p1$'
          - pattern: '^s[0-9]+_p2$'
        # special case for msm8974 / apq8084
      - items:
          - const: mode
          - const: base1
          - const: base2
          - const: use_backup
          - const: mode_backup
          - const: base1_backup
          - const: base2_backup
          - const: s0_p1
          - const: s0_p2
          - const: s1_p1
          - const: s1_p2
          - const: s2_p1
          - const: s2_p2
          - const: s3_p1
          - const: s3_p2
          - const: s4_p1
          - const: s4_p2
          - const: s5_p1
          - const: s5_p2
          - const: s6_p1
          - const: s6_p2
          - const: s7_p1
          - const: s7_p2
          - const: s8_p1
          - const: s8_p2
          - const: s9_p1
          - const: s9_p2
          - const: s10_p1
          - const: s10_p2
          - const: s0_p1_backup
          - const: s0_p2_backup
          - const: s1_p1_backup
          - const: s1_p2_backup
          - const: s2_p1_backup
          - const: s2_p2_backup
          - const: s3_p1_backup
          - const: s3_p2_backup
          - const: s4_p1_backup
          - const: s4_p2_backup
          - const: s5_p1_backup
          - const: s5_p2_backup
          - const: s6_p1_backup
          - const: s6_p2_backup
          - const: s7_p1_backup
          - const: s7_p2_backup
          - const: s8_p1_backup
          - const: s8_p2_backup
          - const: s9_p1_backup
          - const: s9_p2_backup
          - const: s10_p1_backup
          - const: s10_p2_backup

  "#qcom,sensors":
    description:
      Number of sensors enabled on this platform
    $ref: /schemas/types.yaml#/definitions/uint32
    minimum: 1
    maximum: 16

  "#thermal-sensor-cells":
    const: 1
    description:
      Number of cells required to uniquely identify the thermal sensors. Since
      we have multiple sensors this is set to 1

required:
  - compatible
  - interrupts
  - interrupt-names
  - "#thermal-sensor-cells"
  - "#qcom,sensors"

allOf:
  - if:
      properties:
        compatible:
          contains:
            enum:
              - qcom,ipq8064-tsens
              - qcom,msm8960-tsens
              - qcom,tsens-v0_1
              - qcom,tsens-v1
    then:
      properties:
        interrupts:
          items:
            - description: Combined interrupt if upper or lower threshold crossed
        interrupt-names:
          items:
            - const: uplow

  - if:
      properties:
        compatible:
          contains:
            const: qcom,tsens-v2
    then:
      properties:
        interrupts:
          items:
            - description: Combined interrupt if upper or lower threshold crossed
            - description: Interrupt if critical threshold crossed
        interrupt-names:
          items:
            - const: uplow
            - const: critical

  - if:
      properties:
        compatible:
          contains:
            enum:
              - qcom,ipq8074-tsens
    then:
      properties:
        interrupts:
          items:
            - description: Combined interrupt if upper, lower or critical thresholds crossed
        interrupt-names:
          items:
            - const: combined

  - if:
      properties:
        compatible:
          contains:
            enum:
              - qcom,ipq8074-tsens
              - qcom,tsens-v0_1
              - qcom,tsens-v1
              - qcom,tsens-v2

    then:
      required:
        - reg

additionalProperties: false

examples:
  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    // Example msm9860 based SoC (ipq8064):
    gcc: clock-controller {

           /* ... */

           tsens: thermal-sensor {
                compatible = "qcom,ipq8064-tsens";

                 nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
                 nvmem-cell-names = "calib", "calib_backup";
                 interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
                 interrupt-names = "uplow";

                 #qcom,sensors = <11>;
                 #thermal-sensor-cells = <1>;
          };
    };

  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    // Example 1 (new calbiration data: for pre v1 IP):
    thermal-sensor@4a9000 {
        compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
        reg = <0x4a9000 0x1000>, /* TM */
              <0x4a8000 0x1000>; /* SROT */

        nvmem-cells = <&tsens_mode>,
                      <&tsens_base1>, <&tsens_base2>,
                      <&tsens_s0_p1>, <&tsens_s0_p2>,
                      <&tsens_s1_p1>, <&tsens_s1_p2>,
                      <&tsens_s2_p1>, <&tsens_s2_p2>,
                      <&tsens_s4_p1>, <&tsens_s4_p2>,
                      <&tsens_s5_p1>, <&tsens_s5_p2>;
        nvmem-cell-names = "mode",
                           "base1", "base2",
                           "s0_p1", "s0_p2",
                           "s1_p1", "s1_p2",
                           "s2_p1", "s2_p2",
                           "s4_p1", "s4_p2",
                           "s5_p1", "s5_p2";

        interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
        interrupt-names = "uplow";

        #qcom,sensors = <5>;
        #thermal-sensor-cells = <1>;
    };

  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    // Example 1 (legacy: for pre v1 IP):
    tsens1: thermal-sensor@4a9000 {
           compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
           reg = <0x4a9000 0x1000>, /* TM */
                 <0x4a8000 0x1000>; /* SROT */

           nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
           nvmem-cell-names = "calib", "calib_sel";

           interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
           interrupt-names = "uplow";

           #qcom,sensors = <5>;
           #thermal-sensor-cells = <1>;
    };

  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    // Example 2 (for any platform containing v1 of the TSENS IP):
    tsens2: thermal-sensor@4a9000 {
          compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
          reg = <0x004a9000 0x1000>, /* TM */
                <0x004a8000 0x1000>; /* SROT */

          nvmem-cells = <&tsens_caldata>;
          nvmem-cell-names = "calib";

          interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
          interrupt-names = "uplow";

          #qcom,sensors = <10>;
          #thermal-sensor-cells = <1>;
    };

  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    // Example 3 (for any platform containing v2 of the TSENS IP):
    tsens3: thermal-sensor@c263000 {
           compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
           reg = <0xc263000 0x1ff>,
                 <0xc222000 0x1ff>;

           interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
                        <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
           interrupt-names = "uplow", "critical";

           #qcom,sensors = <13>;
           #thermal-sensor-cells = <1>;
    };

  - |
    #include <dt-bindings/interrupt-controller/arm-gic.h>
    // Example 4 (for any IPQ8074 based SoC-s):
    tsens4: thermal-sensor@4a9000 {
           compatible = "qcom,ipq8074-tsens";
           reg = <0x4a9000 0x1000>,
                 <0x4a8000 0x1000>;

           interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
           interrupt-names = "combined";

           #qcom,sensors = <16>;
           #thermal-sensor-cells = <1>;
    };
...