1025f272fSSascha Hauer* Mediatek Thermal 2025f272fSSascha Hauer 3025f272fSSascha HauerThis describes the device tree binding for the Mediatek thermal controller 4025f272fSSascha Hauerwhich measures the on-SoC temperatures. This device does not have its own ADC, 5025f272fSSascha Hauerinstead it directly controls the AUXADC via AHB bus accesses. For this reason 6025f272fSSascha Hauerthis device needs phandles to the AUXADC. Also it controls a mux in the 7025f272fSSascha Hauerapmixedsys register space via AHB bus accesses, so a phandle to the APMIXEDSYS 8025f272fSSascha Haueris also needed. 9025f272fSSascha Hauer 10025f272fSSascha HauerRequired properties: 1177d6e721Sdawei.chien@mediatek.com- compatible: 1277d6e721Sdawei.chien@mediatek.com - "mediatek,mt8173-thermal" : For MT8173 family of SoCs 1377d6e721Sdawei.chien@mediatek.com - "mediatek,mt2701-thermal" : For MT2701 family of SoCs 14f09517abSLouis Yu - "mediatek,mt2712-thermal" : For MT2712 family of SoCs 150f8487f2SSean Wang - "mediatek,mt7622-thermal" : For MT7622 SoC 16c464856eSDaniel Golle - "mediatek,mt7981-thermal", "mediatek,mt7986-thermal" : For MT7981 SoC 17c464856eSDaniel Golle - "mediatek,mt7986-thermal" : For MT7986 SoC 18c0d7c861SMichael Kao - "mediatek,mt8183-thermal" : For MT8183 family of SoCs 19*dfd7956fSFabien Parent - "mediatek,mt8365-thermal" : For MT8365 family of SoCs 20c707f973SFabien Parent - "mediatek,mt8516-thermal", "mediatek,mt2701-thermal : For MT8516 family of SoCs 21025f272fSSascha Hauer- reg: Address range of the thermal controller 22025f272fSSascha Hauer- interrupts: IRQ for the thermal controller 23025f272fSSascha Hauer- clocks, clock-names: Clocks needed for the thermal controller. required 24025f272fSSascha Hauer clocks are: 25025f272fSSascha Hauer "therm": Main clock needed for register access 26025f272fSSascha Hauer "auxadc": The AUXADC clock 27025f272fSSascha Hauer- mediatek,auxadc: A phandle to the AUXADC which the thermal controller uses 28025f272fSSascha Hauer- mediatek,apmixedsys: A phandle to the APMIXEDSYS controller. 29cff1d293SAmit Kucheria- #thermal-sensor-cells : Should be 0. See Documentation/devicetree/bindings/thermal/thermal-sensor.yaml for a description. 30025f272fSSascha Hauer 31025f272fSSascha HauerOptional properties: 3207df39d0SFabien Parent- resets: Reference to the reset controller controlling the thermal controller. 33025f272fSSascha Hauer- nvmem-cells: A phandle to the calibration data provided by a nvmem device. If 34025f272fSSascha Hauer unspecified default values shall be used. 35025f272fSSascha Hauer- nvmem-cell-names: Should be "calibration-data" 36025f272fSSascha Hauer 37025f272fSSascha HauerExample: 38025f272fSSascha Hauer 39025f272fSSascha Hauer thermal: thermal@1100b000 { 40025f272fSSascha Hauer #thermal-sensor-cells = <1>; 41025f272fSSascha Hauer compatible = "mediatek,mt8173-thermal"; 42025f272fSSascha Hauer reg = <0 0x1100b000 0 0x1000>; 43025f272fSSascha Hauer interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>; 44025f272fSSascha Hauer clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>; 45025f272fSSascha Hauer clock-names = "therm", "auxadc"; 46025f272fSSascha Hauer resets = <&pericfg MT8173_PERI_THERM_SW_RST>; 47025f272fSSascha Hauer reset-names = "therm"; 48025f272fSSascha Hauer mediatek,auxadc = <&auxadc>; 49025f272fSSascha Hauer mediatek,apmixedsys = <&apmixedsys>; 50025f272fSSascha Hauer nvmem-cells = <&thermal_calibration_data>; 51025f272fSSascha Hauer nvmem-cell-names = "calibration-data"; 52025f272fSSascha Hauer }; 53