xref: /openbmc/linux/Documentation/devicetree/bindings/spi/sqi-pic32.txt (revision f26e8817b235d8764363bffcc9cbfc61867371f2)
1*0a4afaaeSPurna Chandra MandalMicrochip PIC32 Quad SPI controller
2*0a4afaaeSPurna Chandra Mandal-----------------------------------
3*0a4afaaeSPurna Chandra MandalRequired properties:
4*0a4afaaeSPurna Chandra Mandal- compatible: Should be "microchip,pic32mzda-sqi".
5*0a4afaaeSPurna Chandra Mandal- reg: Address and length of SQI controller register space.
6*0a4afaaeSPurna Chandra Mandal- interrupts: Should contain SQI interrupt.
7*0a4afaaeSPurna Chandra Mandal- clocks: Should contain phandle of two clocks in sequence, one that drives
8*0a4afaaeSPurna Chandra Mandal          clock on SPI bus and other that drives SQI controller.
9*0a4afaaeSPurna Chandra Mandal- clock-names: Should be "spi_ck" and "reg_ck" in order.
10*0a4afaaeSPurna Chandra Mandal
11*0a4afaaeSPurna Chandra MandalExample:
12*0a4afaaeSPurna Chandra Mandal	sqi1: spi@1f8e2000 {
13*0a4afaaeSPurna Chandra Mandal		compatible = "microchip,pic32mzda-sqi";
14*0a4afaaeSPurna Chandra Mandal		reg = <0x1f8e2000 0x200>;
15*0a4afaaeSPurna Chandra Mandal		clocks = <&rootclk REF2CLK>, <&rootclk PB5CLK>;
16*0a4afaaeSPurna Chandra Mandal		clock-names = "spi_ck", "reg_ck";
17*0a4afaaeSPurna Chandra Mandal		interrupts = <169 IRQ_TYPE_LEVEL_HIGH>;
18*0a4afaaeSPurna Chandra Mandal	};
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