xref: /openbmc/linux/Documentation/devicetree/bindings/spi/spi-sifive.yaml (revision 29e1c1ad3ff7f345d80c7b81b08175f5a8c84122) 
1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/spi-sifive.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: SiFive SPI controller
8
9maintainers:
10  - Pragnesh Patel <pragnesh.patel@sifive.com>
11  - Paul Walmsley  <paul.walmsley@sifive.com>
12  - Palmer Dabbelt <palmer@sifive.com>
13
14allOf:
15  - $ref: "spi-controller.yaml#"
16
17properties:
18  compatible:
19    items:
20      - enum:
21          - sifive,fu540-c000-spi
22          - sifive,fu740-c000-spi
23      - const: sifive,spi0
24
25    description:
26      Should be "sifive,<chip>-spi" and "sifive,spi<version>".
27      Supported compatible strings are -
28      "sifive,fu540-c000-spi" and "sifive,fu740-c000-spi" for the SiFive SPI v0
29      as integrated onto the SiFive FU540 and FU740 chip resp, and "sifive,spi0"
30      for the SiFive SPI v0 IP block with no chip integration tweaks.
31      Please refer to sifive-blocks-ip-versioning.txt for details
32
33      SPI RTL that corresponds to the IP block version numbers can be found here -
34      https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/spi
35
36  reg:
37    minItems: 1
38    items:
39      - description: SPI registers region
40      - description: Memory mapped flash region
41
42  interrupts:
43    maxItems: 1
44
45  clocks:
46    maxItems: 1
47
48    description:
49      Must reference the frequency given to the controller
50
51  sifive,fifo-depth:
52    description:
53      Depth of hardware queues; defaults to 8
54    $ref: "/schemas/types.yaml#/definitions/uint32"
55    enum: [8]
56    default: 8
57
58  sifive,max-bits-per-word:
59    description:
60      Maximum bits per word; defaults to 8
61    $ref: "/schemas/types.yaml#/definitions/uint32"
62    enum: [0, 1, 2, 3, 4, 5, 6, 7, 8]
63    default: 8
64
65required:
66  - compatible
67  - reg
68  - interrupts
69  - clocks
70
71unevaluatedProperties: false
72
73examples:
74  - |
75    spi: spi@10040000 {
76      compatible = "sifive,fu540-c000-spi", "sifive,spi0";
77      reg = <0x10040000 0x1000>, <0x20000000 0x10000000>;
78      interrupt-parent = <&plic>;
79      interrupts = <51>;
80      clocks = <&tlclk>;
81      #address-cells = <1>;
82      #size-cells = <0>;
83      sifive,fifo-depth = <8>;
84      sifive,max-bits-per-word = <8>;
85    };
86
87...
88