xref: /openbmc/linux/Documentation/devicetree/bindings/spi/spi-pl022.yaml (revision cc0f6e96c4fd01fe1f935014c8c87ac6e994324c)
1*cc0f6e96SRob Herring# SPDX-License-Identifier: GPL-2.0
2*cc0f6e96SRob Herring%YAML 1.2
3*cc0f6e96SRob Herring---
4*cc0f6e96SRob Herring$id: http://devicetree.org/schemas/spi/spi-pl022.yaml#
5*cc0f6e96SRob Herring$schema: http://devicetree.org/meta-schemas/core.yaml#
6*cc0f6e96SRob Herring
7*cc0f6e96SRob Herringtitle: ARM PL022 SPI controller
8*cc0f6e96SRob Herring
9*cc0f6e96SRob Herringmaintainers:
10*cc0f6e96SRob Herring  - Linus Walleij <linus.walleij@linaro.org>
11*cc0f6e96SRob Herring
12*cc0f6e96SRob HerringallOf:
13*cc0f6e96SRob Herring  - $ref: "spi-controller.yaml#"
14*cc0f6e96SRob Herring
15*cc0f6e96SRob Herring# We need a select here so we don't match all nodes with 'arm,primecell'
16*cc0f6e96SRob Herringselect:
17*cc0f6e96SRob Herring  properties:
18*cc0f6e96SRob Herring    compatible:
19*cc0f6e96SRob Herring      contains:
20*cc0f6e96SRob Herring        const: arm,pl022
21*cc0f6e96SRob Herring  required:
22*cc0f6e96SRob Herring    - compatible
23*cc0f6e96SRob Herring
24*cc0f6e96SRob Herringproperties:
25*cc0f6e96SRob Herring  compatible:
26*cc0f6e96SRob Herring    items:
27*cc0f6e96SRob Herring      - const: arm,pl022
28*cc0f6e96SRob Herring      - const: arm,primecell
29*cc0f6e96SRob Herring
30*cc0f6e96SRob Herring  reg:
31*cc0f6e96SRob Herring    maxItems: 1
32*cc0f6e96SRob Herring
33*cc0f6e96SRob Herring  interrupts:
34*cc0f6e96SRob Herring    maxItems: 1
35*cc0f6e96SRob Herring
36*cc0f6e96SRob Herring  clocks:
37*cc0f6e96SRob Herring    maxItems: 2
38*cc0f6e96SRob Herring
39*cc0f6e96SRob Herring  clock-names:
40*cc0f6e96SRob Herring    items:
41*cc0f6e96SRob Herring      - enum:
42*cc0f6e96SRob Herring          - SSPCLK
43*cc0f6e96SRob Herring          - sspclk
44*cc0f6e96SRob Herring      - const: apb_pclk
45*cc0f6e96SRob Herring
46*cc0f6e96SRob Herring  pl022,autosuspend-delay:
47*cc0f6e96SRob Herring    description: delay in ms following transfer completion before the
48*cc0f6e96SRob Herring      runtime power management system suspends the device. A setting of 0
49*cc0f6e96SRob Herring      indicates no delay and the device will be suspended immediately.
50*cc0f6e96SRob Herring    $ref: "/schemas/types.yaml#/definitions/uint32"
51*cc0f6e96SRob Herring
52*cc0f6e96SRob Herring  pl022,rt:
53*cc0f6e96SRob Herring    description: indicates the controller should run the message pump with realtime
54*cc0f6e96SRob Herring               priority to minimise the transfer latency on the bus (boolean)
55*cc0f6e96SRob Herring    type: boolean
56*cc0f6e96SRob Herring
57*cc0f6e96SRob Herring  dmas:
58*cc0f6e96SRob Herring    description:
59*cc0f6e96SRob Herring      Two or more DMA channel specifiers following the convention outlined
60*cc0f6e96SRob Herring      in bindings/dma/dma.txt
61*cc0f6e96SRob Herring    minItems: 2
62*cc0f6e96SRob Herring    maxItems: 32
63*cc0f6e96SRob Herring
64*cc0f6e96SRob Herring  dma-names:
65*cc0f6e96SRob Herring    description:
66*cc0f6e96SRob Herring      There must be at least one channel named "tx" for transmit and named "rx"
67*cc0f6e96SRob Herring      for receive.
68*cc0f6e96SRob Herring    minItems: 2
69*cc0f6e96SRob Herring    maxItems: 32
70*cc0f6e96SRob Herring    additionalItems: true
71*cc0f6e96SRob Herring    items:
72*cc0f6e96SRob Herring      - const: rx
73*cc0f6e96SRob Herring      - const: tx
74*cc0f6e96SRob Herring
75*cc0f6e96SRob HerringpatternProperties:
76*cc0f6e96SRob Herring  "^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}@[0-9a-f]+$":
77*cc0f6e96SRob Herring    type: object
78*cc0f6e96SRob Herring    # SPI slave nodes must be children of the SPI master node and can
79*cc0f6e96SRob Herring    # contain the following properties.
80*cc0f6e96SRob Herring    properties:
81*cc0f6e96SRob Herring      pl022,interface:
82*cc0f6e96SRob Herring        description: SPI interface type
83*cc0f6e96SRob Herring        allOf:
84*cc0f6e96SRob Herring          - $ref: "/schemas/types.yaml#/definitions/uint32"
85*cc0f6e96SRob Herring          - enum:
86*cc0f6e96SRob Herring              - 0  # SPI
87*cc0f6e96SRob Herring              - 1  # Texas Instruments Synchronous Serial Frame Format
88*cc0f6e96SRob Herring              - 2  # Microwire (Half Duplex)
89*cc0f6e96SRob Herring
90*cc0f6e96SRob Herring      pl022,com-mode:
91*cc0f6e96SRob Herring        description: Specifies the transfer mode
92*cc0f6e96SRob Herring        allOf:
93*cc0f6e96SRob Herring          - $ref: "/schemas/types.yaml#/definitions/uint32"
94*cc0f6e96SRob Herring          - enum:
95*cc0f6e96SRob Herring              - 0  # interrupt mode
96*cc0f6e96SRob Herring              - 1  # polling mode
97*cc0f6e96SRob Herring              - 2  # DMA mode
98*cc0f6e96SRob Herring            default: 1
99*cc0f6e96SRob Herring
100*cc0f6e96SRob Herring      pl022,rx-level-trig:
101*cc0f6e96SRob Herring        description: Rx FIFO watermark level
102*cc0f6e96SRob Herring        allOf:
103*cc0f6e96SRob Herring          - $ref: "/schemas/types.yaml#/definitions/uint32"
104*cc0f6e96SRob Herring          - minimum: 0
105*cc0f6e96SRob Herring            maximum: 4
106*cc0f6e96SRob Herring
107*cc0f6e96SRob Herring      pl022,tx-level-trig:
108*cc0f6e96SRob Herring        description: Tx FIFO watermark level
109*cc0f6e96SRob Herring        allOf:
110*cc0f6e96SRob Herring          - $ref: "/schemas/types.yaml#/definitions/uint32"
111*cc0f6e96SRob Herring          - minimum: 0
112*cc0f6e96SRob Herring            maximum: 4
113*cc0f6e96SRob Herring
114*cc0f6e96SRob Herring      pl022,ctrl-len:
115*cc0f6e96SRob Herring        description: Microwire interface - Control length
116*cc0f6e96SRob Herring        allOf:
117*cc0f6e96SRob Herring          - $ref: "/schemas/types.yaml#/definitions/uint32"
118*cc0f6e96SRob Herring          - minimum: 0x03
119*cc0f6e96SRob Herring            maximum: 0x1f
120*cc0f6e96SRob Herring
121*cc0f6e96SRob Herring      pl022,wait-state:
122*cc0f6e96SRob Herring        description: Microwire interface - Wait state
123*cc0f6e96SRob Herring        allOf:
124*cc0f6e96SRob Herring          - $ref: "/schemas/types.yaml#/definitions/uint32"
125*cc0f6e96SRob Herring          - enum: [ 0, 1 ]
126*cc0f6e96SRob Herring
127*cc0f6e96SRob Herring      pl022,duplex:
128*cc0f6e96SRob Herring        description: Microwire interface - Full/Half duplex
129*cc0f6e96SRob Herring        allOf:
130*cc0f6e96SRob Herring          - $ref: "/schemas/types.yaml#/definitions/uint32"
131*cc0f6e96SRob Herring          - enum: [ 0, 1 ]
132*cc0f6e96SRob Herring
133*cc0f6e96SRob Herringrequired:
134*cc0f6e96SRob Herring  - compatible
135*cc0f6e96SRob Herring  - reg
136*cc0f6e96SRob Herring  - interrupts
137*cc0f6e96SRob Herring
138*cc0f6e96SRob Herringexamples:
139*cc0f6e96SRob Herring  - |
140*cc0f6e96SRob Herring    spi@e0100000 {
141*cc0f6e96SRob Herring      compatible = "arm,pl022", "arm,primecell";
142*cc0f6e96SRob Herring      reg = <0xe0100000 0x1000>;
143*cc0f6e96SRob Herring      #address-cells = <1>;
144*cc0f6e96SRob Herring      #size-cells = <0>;
145*cc0f6e96SRob Herring      interrupts = <0 31 0x4>;
146*cc0f6e96SRob Herring      dmas = <&dma_controller 23 1>,
147*cc0f6e96SRob Herring        <&dma_controller 24 0>;
148*cc0f6e96SRob Herring      dma-names = "rx", "tx";
149*cc0f6e96SRob Herring
150*cc0f6e96SRob Herring      m25p80@1 {
151*cc0f6e96SRob Herring        compatible = "st,m25p80";
152*cc0f6e96SRob Herring        reg = <1>;
153*cc0f6e96SRob Herring        spi-max-frequency = <12000000>;
154*cc0f6e96SRob Herring        spi-cpol;
155*cc0f6e96SRob Herring        spi-cpha;
156*cc0f6e96SRob Herring        pl022,interface = <0>;
157*cc0f6e96SRob Herring        pl022,com-mode = <0x2>;
158*cc0f6e96SRob Herring        pl022,rx-level-trig = <0>;
159*cc0f6e96SRob Herring        pl022,tx-level-trig = <0>;
160*cc0f6e96SRob Herring        pl022,ctrl-len = <0x11>;
161*cc0f6e96SRob Herring        pl022,wait-state = <0>;
162*cc0f6e96SRob Herring        pl022,duplex = <0>;
163*cc0f6e96SRob Herring      };
164*cc0f6e96SRob Herring    };
165*cc0f6e96SRob Herring...
166