1e2391782SKrishna Yarlagadda# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2e2391782SKrishna Yarlagadda%YAML 1.2 3e2391782SKrishna Yarlagadda--- 4e2391782SKrishna Yarlagadda$id: http://devicetree.org/schemas/spi/nvidia,tegra210-quad-peripheral-props.yaml# 5e2391782SKrishna Yarlagadda$schema: http://devicetree.org/meta-schemas/core.yaml# 6e2391782SKrishna Yarlagadda 7e2391782SKrishna Yarlagaddatitle: Peripheral properties for Tegra Quad SPI Controller 8e2391782SKrishna Yarlagadda 9e2391782SKrishna Yarlagaddamaintainers: 10e2391782SKrishna Yarlagadda - Thierry Reding <thierry.reding@gmail.com> 11e2391782SKrishna Yarlagadda - Jonathan Hunter <jonathanh@nvidia.com> 12e2391782SKrishna Yarlagadda 13e2391782SKrishna Yarlagaddaproperties: 14e2391782SKrishna Yarlagadda nvidia,tx-clk-tap-delay: 15e2391782SKrishna Yarlagadda description: 16e2391782SKrishna Yarlagadda Delays the clock going out to device with this tap value. 17e2391782SKrishna Yarlagadda Tap value varies based on platform design trace lengths from Tegra 18e2391782SKrishna Yarlagadda QSPI to corresponding slave device. 19e2391782SKrishna Yarlagadda $ref: /schemas/types.yaml#/definitions/uint32 20e2391782SKrishna Yarlagadda minimum: 0 21e2391782SKrishna Yarlagadda maximum: 31 22e2391782SKrishna Yarlagadda 23e2391782SKrishna Yarlagadda nvidia,rx-clk-tap-delay: 24e2391782SKrishna Yarlagadda description: 25e2391782SKrishna Yarlagadda Delays the clock coming in from the device with this tap value. 26e2391782SKrishna Yarlagadda Tap value varies based on platform design trace lengths from Tegra 27e2391782SKrishna Yarlagadda QSPI to corresponding slave device. 28e2391782SKrishna Yarlagadda $ref: /schemas/types.yaml#/definitions/uint32 29e2391782SKrishna Yarlagadda minimum: 0 30e2391782SKrishna Yarlagadda maximum: 255 31e2391782SKrishna Yarlagadda 32*63e2df2dSKrzysztof KozlowskiadditionalProperties: true 33