xref: /openbmc/linux/Documentation/devicetree/bindings/spi/nuvoton,npcm-fiu.txt (revision 7ae9fb1b7ecbb5d85d07857943f677fd1a559b18)
191d0c59fSTomer Maimon* Nuvoton FLASH Interface Unit (FIU) SPI Controller
291d0c59fSTomer Maimon
391d0c59fSTomer MaimonNPCM FIU supports single, dual and quad communication interface.
491d0c59fSTomer Maimon
591d0c59fSTomer MaimonThe NPCM7XX supports three FIU modules,
691d0c59fSTomer MaimonFIU0 and FIUx supports two chip selects,
791d0c59fSTomer MaimonFIU3 support four chip select.
891d0c59fSTomer Maimon
9d50fef8aSTomer MaimonThe NPCM8XX supports four FIU modules,
10d50fef8aSTomer MaimonFIU0 and FIUx supports two chip selects,
11d50fef8aSTomer MaimonFIU1 and FIU3 supports four chip selects.
12d50fef8aSTomer Maimon
1391d0c59fSTomer MaimonRequired properties:
14d50fef8aSTomer Maimon  - compatible : "nuvoton,npcm750-fiu" for Poleg NPCM7XX BMC
15d50fef8aSTomer Maimon			     "nuvoton,npcm845-fiu" for Arbel NPCM8XX BMC
1691d0c59fSTomer Maimon  - #address-cells : should be 1.
1791d0c59fSTomer Maimon  - #size-cells : should be 0.
1891d0c59fSTomer Maimon  - reg : the first contains the register location and length,
1991d0c59fSTomer Maimon          the second contains the memory mapping address and length
2091d0c59fSTomer Maimon  - reg-names: Should contain the reg names "control" and "memory"
2191d0c59fSTomer Maimon  - clocks : phandle of FIU reference clock.
2291d0c59fSTomer Maimon
2391d0c59fSTomer MaimonRequired properties in case the pins can be muxed:
2491d0c59fSTomer Maimon  - pinctrl-names : a pinctrl state named "default" must be defined.
2591d0c59fSTomer Maimon  - pinctrl-0 : phandle referencing pin configuration of the device.
2691d0c59fSTomer Maimon
2791d0c59fSTomer MaimonOptional property:
2891d0c59fSTomer Maimon  - nuvoton,spix-mode: enable spix-mode for an expansion bus to an ASIC or CPLD.
2991d0c59fSTomer Maimon
3091d0c59fSTomer MaimonAliases:
3191d0c59fSTomer Maimon- All the FIU controller nodes should be represented in the aliases node using
3291d0c59fSTomer Maimon  the following format 'fiu{n}' where n is a unique number for the alias.
3391d0c59fSTomer Maimon  In the NPCM7XX BMC:
3491d0c59fSTomer Maimon  		fiu0 represent fiu 0 controller
3591d0c59fSTomer Maimon  		fiu1 represent fiu 3 controller
3691d0c59fSTomer Maimon  		fiu2 represent fiu x controller
3791d0c59fSTomer Maimon
38d50fef8aSTomer Maimon  In the NPCM8XX BMC:
39d50fef8aSTomer Maimon  		fiu0 represent fiu 0 controller
40d50fef8aSTomer Maimon  		fiu1 represent fiu 1 controller
41d50fef8aSTomer Maimon  		fiu2 represent fiu 3 controller
42d50fef8aSTomer Maimon  		fiu3 represent fiu x controller
43d50fef8aSTomer Maimon
4491d0c59fSTomer MaimonExample:
4591d0c59fSTomer Maimonfiu3: spi@c00000000 {
4691d0c59fSTomer Maimon	compatible = "nuvoton,npcm750-fiu";
4791d0c59fSTomer Maimon	#address-cells = <1>;
4891d0c59fSTomer Maimon	#size-cells = <0>;
4991d0c59fSTomer Maimon	reg = <0xfb000000 0x1000>, <0x80000000 0x10000000>;
5091d0c59fSTomer Maimon	reg-names = "control", "memory";
5191d0c59fSTomer Maimon	clocks = <&clk NPCM7XX_CLK_AHB>;
5291d0c59fSTomer Maimon	pinctrl-names = "default";
5391d0c59fSTomer Maimon	pinctrl-0 = <&spi3_pins>;
54*e8d6e1ddSJonathan Neuschäfer	flash@0 {
5591d0c59fSTomer Maimon			...
5691d0c59fSTomer Maimon	};
5791d0c59fSTomer Maimon};
5891d0c59fSTomer Maimon
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