xref: /openbmc/linux/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-snfi.yaml (revision 9a87ffc99ec8eb8d35eed7c4f816d75f5cc9662e)
169bb9b29SChuanhong Guo# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
269bb9b29SChuanhong Guo%YAML 1.2
369bb9b29SChuanhong Guo---
469bb9b29SChuanhong Guo$id: http://devicetree.org/schemas/spi/mediatek,spi-mtk-snfi.yaml#
569bb9b29SChuanhong Guo$schema: http://devicetree.org/meta-schemas/core.yaml#
669bb9b29SChuanhong Guo
769bb9b29SChuanhong Guotitle: SPI-NAND flash controller for MediaTek ARM SoCs
869bb9b29SChuanhong Guo
969bb9b29SChuanhong Guomaintainers:
1069bb9b29SChuanhong Guo  - Chuanhong Guo <gch981213@gmail.com>
1169bb9b29SChuanhong Guo
1269bb9b29SChuanhong Guodescription: |
1369bb9b29SChuanhong Guo  The Mediatek SPI-NAND flash controller is an extended version of
1469bb9b29SChuanhong Guo  the Mediatek NAND flash controller. It can perform standard SPI
1569bb9b29SChuanhong Guo  instructions with one continuous write and one read for up-to 0xa0
1669bb9b29SChuanhong Guo  bytes. It also supports typical SPI-NAND page cache operations
1769bb9b29SChuanhong Guo  in single, dual or quad IO mode with pipelined ECC encoding/decoding
1869bb9b29SChuanhong Guo  using the accompanying ECC engine. There should be only one spi
1969bb9b29SChuanhong Guo  slave device following generic spi bindings.
2069bb9b29SChuanhong Guo
2169bb9b29SChuanhong Guoproperties:
2269bb9b29SChuanhong Guo  compatible:
2369bb9b29SChuanhong Guo    enum:
2469bb9b29SChuanhong Guo      - mediatek,mt7622-snand
2569bb9b29SChuanhong Guo      - mediatek,mt7629-snand
268aa2ef23SXiangsheng Hou      - mediatek,mt7986-snand
2769bb9b29SChuanhong Guo
2869bb9b29SChuanhong Guo  reg:
2969bb9b29SChuanhong Guo    items:
3069bb9b29SChuanhong Guo      - description: core registers
3169bb9b29SChuanhong Guo
3269bb9b29SChuanhong Guo  interrupts:
3369bb9b29SChuanhong Guo    items:
3469bb9b29SChuanhong Guo      - description: NFI interrupt
3569bb9b29SChuanhong Guo
3669bb9b29SChuanhong Guo  clocks:
378aa2ef23SXiangsheng Hou    minItems: 2
388aa2ef23SXiangsheng Hou    maxItems: 3
3969bb9b29SChuanhong Guo
4069bb9b29SChuanhong Guo  clock-names:
418aa2ef23SXiangsheng Hou    minItems: 2
428aa2ef23SXiangsheng Hou    maxItems: 3
4369bb9b29SChuanhong Guo
4469bb9b29SChuanhong Guo  nand-ecc-engine:
4569bb9b29SChuanhong Guo    description: device-tree node of the accompanying ECC engine.
4669bb9b29SChuanhong Guo    $ref: /schemas/types.yaml#/definitions/phandle
4769bb9b29SChuanhong Guo
48*351c02cbSXiangsheng Hou  mediatek,rx-latch-latency-ns:
49*351c02cbSXiangsheng Hou    description: Data read latch latency, unit is nanoseconds.
50*351c02cbSXiangsheng Hou
5169bb9b29SChuanhong Guorequired:
5269bb9b29SChuanhong Guo  - compatible
5369bb9b29SChuanhong Guo  - reg
5469bb9b29SChuanhong Guo  - interrupts
5569bb9b29SChuanhong Guo  - clocks
5669bb9b29SChuanhong Guo  - clock-names
5769bb9b29SChuanhong Guo  - nand-ecc-engine
5869bb9b29SChuanhong Guo
598aa2ef23SXiangsheng HouallOf:
608aa2ef23SXiangsheng Hou  - $ref: /schemas/spi/spi-controller.yaml#
618aa2ef23SXiangsheng Hou  - if:
628aa2ef23SXiangsheng Hou      properties:
638aa2ef23SXiangsheng Hou        compatible:
648aa2ef23SXiangsheng Hou          enum:
658aa2ef23SXiangsheng Hou            - mediatek,mt7622-snand
668aa2ef23SXiangsheng Hou            - mediatek,mt7629-snand
678aa2ef23SXiangsheng Hou    then:
688aa2ef23SXiangsheng Hou      properties:
698aa2ef23SXiangsheng Hou        clocks:
708aa2ef23SXiangsheng Hou          items:
718aa2ef23SXiangsheng Hou            - description: clock used for the controller
728aa2ef23SXiangsheng Hou            - description: clock used for the SPI bus
738aa2ef23SXiangsheng Hou        clock-names:
748aa2ef23SXiangsheng Hou          items:
758aa2ef23SXiangsheng Hou            - const: nfi_clk
768aa2ef23SXiangsheng Hou            - const: pad_clk
778aa2ef23SXiangsheng Hou
788aa2ef23SXiangsheng Hou  - if:
798aa2ef23SXiangsheng Hou      properties:
808aa2ef23SXiangsheng Hou        compatible:
818aa2ef23SXiangsheng Hou          enum:
828aa2ef23SXiangsheng Hou            - mediatek,mt7986-snand
838aa2ef23SXiangsheng Hou    then:
848aa2ef23SXiangsheng Hou      properties:
858aa2ef23SXiangsheng Hou        clocks:
868aa2ef23SXiangsheng Hou          items:
878aa2ef23SXiangsheng Hou            - description: clock used for the controller
888aa2ef23SXiangsheng Hou            - description: clock used for the SPI bus
898aa2ef23SXiangsheng Hou            - description: clock used for the AHB bus
908aa2ef23SXiangsheng Hou        clock-names:
918aa2ef23SXiangsheng Hou          items:
928aa2ef23SXiangsheng Hou            - const: nfi_clk
938aa2ef23SXiangsheng Hou            - const: pad_clk
948aa2ef23SXiangsheng Hou            - const: nfi_hclk
958aa2ef23SXiangsheng Hou
9669bb9b29SChuanhong GuounevaluatedProperties: false
9769bb9b29SChuanhong Guo
9869bb9b29SChuanhong Guoexamples:
9969bb9b29SChuanhong Guo  - |
10069bb9b29SChuanhong Guo    #include <dt-bindings/interrupt-controller/irq.h>
10169bb9b29SChuanhong Guo    #include <dt-bindings/interrupt-controller/arm-gic.h>
10269bb9b29SChuanhong Guo    #include <dt-bindings/clock/mt7622-clk.h>
10369bb9b29SChuanhong Guo    soc {
10469bb9b29SChuanhong Guo      #address-cells = <2>;
10569bb9b29SChuanhong Guo      #size-cells = <2>;
10669bb9b29SChuanhong Guo      snfi: spi@1100d000 {
10769bb9b29SChuanhong Guo        compatible = "mediatek,mt7622-snand";
10869bb9b29SChuanhong Guo        reg = <0 0x1100d000 0 0x1000>;
10969bb9b29SChuanhong Guo        interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_LOW>;
11069bb9b29SChuanhong Guo        clocks = <&pericfg CLK_PERI_NFI_PD>, <&pericfg CLK_PERI_SNFI_PD>;
11169bb9b29SChuanhong Guo        clock-names = "nfi_clk", "pad_clk";
11269bb9b29SChuanhong Guo        nand-ecc-engine = <&bch>;
11369bb9b29SChuanhong Guo        #address-cells = <1>;
11469bb9b29SChuanhong Guo        #size-cells = <0>;
11569bb9b29SChuanhong Guo
11669bb9b29SChuanhong Guo        flash@0 {
11769bb9b29SChuanhong Guo          compatible = "spi-nand";
11869bb9b29SChuanhong Guo          reg = <0>;
11969bb9b29SChuanhong Guo          spi-tx-bus-width = <4>;
12069bb9b29SChuanhong Guo          spi-rx-bus-width = <4>;
12169bb9b29SChuanhong Guo          nand-ecc-engine = <&snfi>;
12269bb9b29SChuanhong Guo        };
12369bb9b29SChuanhong Guo      };
12469bb9b29SChuanhong Guo    };
125