1*a731e217SRongjun Ying* SiRF SoC audio port 2*a731e217SRongjun Ying 3*a731e217SRongjun YingRequired properties: 4*a731e217SRongjun Ying- compatible: "sirf,audio-port" 5*a731e217SRongjun Ying- reg: Base address and size entries: 6*a731e217SRongjun Ying- dmas: List of DMA controller phandle and DMA request line ordered pairs. 7*a731e217SRongjun Ying- dma-names: Identifier string for each DMA request line in the dmas property. 8*a731e217SRongjun Ying These strings correspond 1:1 with the ordered pairs in dmas. 9*a731e217SRongjun Ying 10*a731e217SRongjun Ying One of the DMA channels will be responsible for transmission (should be 11*a731e217SRongjun Ying named "tx") and one for reception (should be named "rx"). 12*a731e217SRongjun Ying 13*a731e217SRongjun YingExample: 14*a731e217SRongjun Ying 15*a731e217SRongjun Yingaudioport: audioport@b0040000 { 16*a731e217SRongjun Ying compatible = "sirf,audio-port"; 17*a731e217SRongjun Ying reg = <0xb0040000 0x10000>; 18*a731e217SRongjun Ying dmas = <&dmac1 3>, <&dmac1 8>; 19*a731e217SRongjun Ying dma-names = "rx", "tx"; 20*a731e217SRongjun Ying}; 21