xref: /openbmc/linux/Documentation/devicetree/bindings/sound/mediatek,mt7986-afe.yaml (revision c900529f3d9161bfde5cca0754f83b4d3c3e0220)
1*b41efc22SMaso Huang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*b41efc22SMaso Huang%YAML 1.2
3*b41efc22SMaso Huang---
4*b41efc22SMaso Huang$id: http://devicetree.org/schemas/sound/mediatek,mt7986-afe.yaml#
5*b41efc22SMaso Huang$schema: http://devicetree.org/meta-schemas/core.yaml#
6*b41efc22SMaso Huang
7*b41efc22SMaso Huangtitle: MediaTek AFE PCM controller for MT7986
8*b41efc22SMaso Huang
9*b41efc22SMaso Huangmaintainers:
10*b41efc22SMaso Huang  - Maso Huang <maso.huang@mediatek.com>
11*b41efc22SMaso Huang
12*b41efc22SMaso Huangproperties:
13*b41efc22SMaso Huang  compatible:
14*b41efc22SMaso Huang    oneOf:
15*b41efc22SMaso Huang      - const: mediatek,mt7986-afe
16*b41efc22SMaso Huang      - items:
17*b41efc22SMaso Huang          - enum:
18*b41efc22SMaso Huang              - mediatek,mt7981-afe
19*b41efc22SMaso Huang              - mediatek,mt7988-afe
20*b41efc22SMaso Huang          - const: mediatek,mt7986-afe
21*b41efc22SMaso Huang
22*b41efc22SMaso Huang  reg:
23*b41efc22SMaso Huang    maxItems: 1
24*b41efc22SMaso Huang
25*b41efc22SMaso Huang  interrupts:
26*b41efc22SMaso Huang    maxItems: 1
27*b41efc22SMaso Huang
28*b41efc22SMaso Huang  clocks:
29*b41efc22SMaso Huang    minItems: 5
30*b41efc22SMaso Huang    items:
31*b41efc22SMaso Huang      - description: audio bus clock
32*b41efc22SMaso Huang      - description: audio 26M clock
33*b41efc22SMaso Huang      - description: audio intbus clock
34*b41efc22SMaso Huang      - description: audio hopping clock
35*b41efc22SMaso Huang      - description: audio pll clock
36*b41efc22SMaso Huang      - description: mux for pcm_mck
37*b41efc22SMaso Huang      - description: audio i2s/pcm mck
38*b41efc22SMaso Huang
39*b41efc22SMaso Huang  clock-names:
40*b41efc22SMaso Huang    minItems: 5
41*b41efc22SMaso Huang    items:
42*b41efc22SMaso Huang      - const: bus_ck
43*b41efc22SMaso Huang      - const: 26m_ck
44*b41efc22SMaso Huang      - const: l_ck
45*b41efc22SMaso Huang      - const: aud_ck
46*b41efc22SMaso Huang      - const: eg2_ck
47*b41efc22SMaso Huang      - const: sel
48*b41efc22SMaso Huang      - const: i2s_m
49*b41efc22SMaso Huang
50*b41efc22SMaso Huangrequired:
51*b41efc22SMaso Huang  - compatible
52*b41efc22SMaso Huang  - reg
53*b41efc22SMaso Huang  - interrupts
54*b41efc22SMaso Huang  - clocks
55*b41efc22SMaso Huang  - clock-names
56*b41efc22SMaso Huang
57*b41efc22SMaso HuangallOf:
58*b41efc22SMaso Huang  - if:
59*b41efc22SMaso Huang      properties:
60*b41efc22SMaso Huang        compatible:
61*b41efc22SMaso Huang          contains:
62*b41efc22SMaso Huang            const: mediatek,mt7986-afe
63*b41efc22SMaso Huang    then:
64*b41efc22SMaso Huang      properties:
65*b41efc22SMaso Huang        clocks:
66*b41efc22SMaso Huang          items:
67*b41efc22SMaso Huang            - description: audio bus clock
68*b41efc22SMaso Huang            - description: audio 26M clock
69*b41efc22SMaso Huang            - description: audio intbus clock
70*b41efc22SMaso Huang            - description: audio hopping clock
71*b41efc22SMaso Huang            - description: audio pll clock
72*b41efc22SMaso Huang        clock-names:
73*b41efc22SMaso Huang          items:
74*b41efc22SMaso Huang            - const: bus_ck
75*b41efc22SMaso Huang            - const: 26m_ck
76*b41efc22SMaso Huang            - const: l_ck
77*b41efc22SMaso Huang            - const: aud_ck
78*b41efc22SMaso Huang            - const: eg2_ck
79*b41efc22SMaso Huang
80*b41efc22SMaso Huang  - if:
81*b41efc22SMaso Huang      properties:
82*b41efc22SMaso Huang        compatible:
83*b41efc22SMaso Huang          contains:
84*b41efc22SMaso Huang            const: mediatek,mt7981-afe
85*b41efc22SMaso Huang    then:
86*b41efc22SMaso Huang      properties:
87*b41efc22SMaso Huang        clocks:
88*b41efc22SMaso Huang          items:
89*b41efc22SMaso Huang            - description: audio bus clock
90*b41efc22SMaso Huang            - description: audio 26M clock
91*b41efc22SMaso Huang            - description: audio intbus clock
92*b41efc22SMaso Huang            - description: audio hopping clock
93*b41efc22SMaso Huang            - description: audio pll clock
94*b41efc22SMaso Huang            - description: mux for pcm_mck
95*b41efc22SMaso Huang        clock-names:
96*b41efc22SMaso Huang          items:
97*b41efc22SMaso Huang            - const: bus_ck
98*b41efc22SMaso Huang            - const: 26m_ck
99*b41efc22SMaso Huang            - const: l_ck
100*b41efc22SMaso Huang            - const: aud_ck
101*b41efc22SMaso Huang            - const: eg2_ck
102*b41efc22SMaso Huang            - const: sel
103*b41efc22SMaso Huang
104*b41efc22SMaso Huang  - if:
105*b41efc22SMaso Huang      properties:
106*b41efc22SMaso Huang        compatible:
107*b41efc22SMaso Huang          contains:
108*b41efc22SMaso Huang            const: mediatek,mt7988-afe
109*b41efc22SMaso Huang    then:
110*b41efc22SMaso Huang      properties:
111*b41efc22SMaso Huang        clocks:
112*b41efc22SMaso Huang          items:
113*b41efc22SMaso Huang            - description: audio bus clock
114*b41efc22SMaso Huang            - description: audio 26M clock
115*b41efc22SMaso Huang            - description: audio intbus clock
116*b41efc22SMaso Huang            - description: audio hopping clock
117*b41efc22SMaso Huang            - description: audio pll clock
118*b41efc22SMaso Huang            - description: mux for pcm_mck
119*b41efc22SMaso Huang            - description: audio i2s/pcm mck
120*b41efc22SMaso Huang        clock-names:
121*b41efc22SMaso Huang          items:
122*b41efc22SMaso Huang            - const: bus_ck
123*b41efc22SMaso Huang            - const: 26m_ck
124*b41efc22SMaso Huang            - const: l_ck
125*b41efc22SMaso Huang            - const: aud_ck
126*b41efc22SMaso Huang            - const: eg2_ck
127*b41efc22SMaso Huang            - const: sel
128*b41efc22SMaso Huang            - const: i2s_m
129*b41efc22SMaso Huang
130*b41efc22SMaso HuangadditionalProperties: false
131*b41efc22SMaso Huang
132*b41efc22SMaso Huangexamples:
133*b41efc22SMaso Huang  - |
134*b41efc22SMaso Huang    #include <dt-bindings/interrupt-controller/arm-gic.h>
135*b41efc22SMaso Huang    #include <dt-bindings/interrupt-controller/irq.h>
136*b41efc22SMaso Huang    #include <dt-bindings/clock/mt7986-clk.h>
137*b41efc22SMaso Huang
138*b41efc22SMaso Huang    afe@11210000 {
139*b41efc22SMaso Huang        compatible = "mediatek,mt7986-afe";
140*b41efc22SMaso Huang        reg = <0x11210000 0x9000>;
141*b41efc22SMaso Huang        interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
142*b41efc22SMaso Huang        clocks = <&infracfg_ao CLK_INFRA_AUD_BUS_CK>,
143*b41efc22SMaso Huang                 <&infracfg_ao CLK_INFRA_AUD_26M_CK>,
144*b41efc22SMaso Huang                 <&infracfg_ao CLK_INFRA_AUD_L_CK>,
145*b41efc22SMaso Huang                 <&infracfg_ao CLK_INFRA_AUD_AUD_CK>,
146*b41efc22SMaso Huang                 <&infracfg_ao CLK_INFRA_AUD_EG2_CK>;
147*b41efc22SMaso Huang        clock-names = "bus_ck",
148*b41efc22SMaso Huang                      "26m_ck",
149*b41efc22SMaso Huang                      "l_ck",
150*b41efc22SMaso Huang                      "aud_ck",
151*b41efc22SMaso Huang                      "eg2_ck";
152*b41efc22SMaso Huang        assigned-clocks = <&topckgen CLK_TOP_A1SYS_SEL>,
153*b41efc22SMaso Huang                          <&topckgen CLK_TOP_AUD_L_SEL>,
154*b41efc22SMaso Huang                          <&topckgen CLK_TOP_A_TUNER_SEL>;
155*b41efc22SMaso Huang        assigned-clock-parents = <&topckgen CLK_TOP_APLL2_D4>,
156*b41efc22SMaso Huang                                 <&apmixedsys CLK_APMIXED_APLL2>,
157*b41efc22SMaso Huang                                 <&topckgen CLK_TOP_APLL2_D4>;
158*b41efc22SMaso Huang    };
159*b41efc22SMaso Huang
160*b41efc22SMaso Huang...
161