1*af1c2d81SBenjamin Gaignard# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2*af1c2d81SBenjamin Gaignard%YAML 1.2 3*af1c2d81SBenjamin Gaignard--- 4*af1c2d81SBenjamin Gaignard$id: http://devicetree.org/schemas/serial/st,stm32-uart.yaml# 5*af1c2d81SBenjamin Gaignard$schema: http://devicetree.org/meta-schemas/core.yaml# 6*af1c2d81SBenjamin Gaignard 7*af1c2d81SBenjamin Gaignardmaintainers: 8*af1c2d81SBenjamin Gaignard - Erwan Le Ray <erwan.leray@st.com> 9*af1c2d81SBenjamin Gaignard 10*af1c2d81SBenjamin Gaignardtitle: STMicroelectronics STM32 USART bindings 11*af1c2d81SBenjamin Gaignard 12*af1c2d81SBenjamin GaignardallOf: 13*af1c2d81SBenjamin Gaignard - $ref: rs485.yaml 14*af1c2d81SBenjamin Gaignard 15*af1c2d81SBenjamin Gaignardproperties: 16*af1c2d81SBenjamin Gaignard compatible: 17*af1c2d81SBenjamin Gaignard enum: 18*af1c2d81SBenjamin Gaignard - st,stm32-uart 19*af1c2d81SBenjamin Gaignard - st,stm32f7-uart 20*af1c2d81SBenjamin Gaignard - st,stm32h7-uart 21*af1c2d81SBenjamin Gaignard 22*af1c2d81SBenjamin Gaignard reg: 23*af1c2d81SBenjamin Gaignard maxItems: 1 24*af1c2d81SBenjamin Gaignard 25*af1c2d81SBenjamin Gaignard interrupts: 26*af1c2d81SBenjamin Gaignard maxItems: 1 27*af1c2d81SBenjamin Gaignard 28*af1c2d81SBenjamin Gaignard clocks: 29*af1c2d81SBenjamin Gaignard maxItems: 1 30*af1c2d81SBenjamin Gaignard 31*af1c2d81SBenjamin Gaignard resets: 32*af1c2d81SBenjamin Gaignard maxItems: 1 33*af1c2d81SBenjamin Gaignard 34*af1c2d81SBenjamin Gaignard label: 35*af1c2d81SBenjamin Gaignard description: label associated with this uart 36*af1c2d81SBenjamin Gaignard 37*af1c2d81SBenjamin Gaignard st,hw-flow-ctrl: 38*af1c2d81SBenjamin Gaignard description: enable hardware flow control 39*af1c2d81SBenjamin Gaignard $ref: /schemas/types.yaml#/definitions/flag 40*af1c2d81SBenjamin Gaignard 41*af1c2d81SBenjamin Gaignard dmas: 42*af1c2d81SBenjamin Gaignard minItems: 1 43*af1c2d81SBenjamin Gaignard maxItems: 2 44*af1c2d81SBenjamin Gaignard 45*af1c2d81SBenjamin Gaignard dma-names: 46*af1c2d81SBenjamin Gaignard items: 47*af1c2d81SBenjamin Gaignard enum: [ rx, tx ] 48*af1c2d81SBenjamin Gaignard minItems: 1 49*af1c2d81SBenjamin Gaignard maxItems: 2 50*af1c2d81SBenjamin Gaignard 51*af1c2d81SBenjamin Gaignard wakeup-source: true 52*af1c2d81SBenjamin Gaignard 53*af1c2d81SBenjamin Gaignard rs485-rts-delay: true 54*af1c2d81SBenjamin Gaignard rs485-rts-active-low: true 55*af1c2d81SBenjamin Gaignard linux,rs485-enabled-at-boot-time: true 56*af1c2d81SBenjamin Gaignard rs485-rx-during-tx: true 57*af1c2d81SBenjamin Gaignard 58*af1c2d81SBenjamin Gaignardrequired: 59*af1c2d81SBenjamin Gaignard - compatible 60*af1c2d81SBenjamin Gaignard - reg 61*af1c2d81SBenjamin Gaignard - interrupts 62*af1c2d81SBenjamin Gaignard - clocks 63*af1c2d81SBenjamin Gaignard 64*af1c2d81SBenjamin GaignardadditionalProperties: false 65*af1c2d81SBenjamin Gaignard 66*af1c2d81SBenjamin Gaignardexamples: 67*af1c2d81SBenjamin Gaignard - | 68*af1c2d81SBenjamin Gaignard #include <dt-bindings/clock/stm32mp1-clks.h> 69*af1c2d81SBenjamin Gaignard usart1: serial@40011000 { 70*af1c2d81SBenjamin Gaignard compatible = "st,stm32-uart"; 71*af1c2d81SBenjamin Gaignard reg = <0x40011000 0x400>; 72*af1c2d81SBenjamin Gaignard interrupts = <37>; 73*af1c2d81SBenjamin Gaignard clocks = <&rcc 0 164>; 74*af1c2d81SBenjamin Gaignard dmas = <&dma2 2 4 0x414 0x0>, 75*af1c2d81SBenjamin Gaignard <&dma2 7 4 0x414 0x0>; 76*af1c2d81SBenjamin Gaignard dma-names = "rx", "tx"; 77*af1c2d81SBenjamin Gaignard rs485-rts-active-low; 78*af1c2d81SBenjamin Gaignard }; 79*af1c2d81SBenjamin Gaignard 80*af1c2d81SBenjamin Gaignard... 81