1a3828519SAndrew F. DavisTI SysCon Reset Controller 2a3828519SAndrew F. Davis======================= 3a3828519SAndrew F. Davis 4a3828519SAndrew F. DavisAlmost all SoCs have hardware modules that require reset control in addition 5a3828519SAndrew F. Davisto clock and power control for their functionality. The reset control is 6a3828519SAndrew F. Davistypically provided by means of memory-mapped I/O registers. These registers are 7a3828519SAndrew F. Davissometimes a part of a larger register space region implementing various 8a3828519SAndrew F. Davisfunctionalities. This register range is best represented as a syscon node to 9a3828519SAndrew F. Davisallow multiple entities to access their relevant registers in the common 10a3828519SAndrew F. Davisregister space. 11a3828519SAndrew F. Davis 12a3828519SAndrew F. DavisA SysCon Reset Controller node defines a device that uses a syscon node 13a3828519SAndrew F. Davisand provides reset management functionality for various hardware modules 14a3828519SAndrew F. Davispresent on the SoC. 15a3828519SAndrew F. Davis 16a3828519SAndrew F. DavisSysCon Reset Controller Node 17a3828519SAndrew F. Davis============================ 18a3828519SAndrew F. DavisEach of the reset provider/controller nodes should be a child of a syscon 19a3828519SAndrew F. Davisnode and have the following properties. 20a3828519SAndrew F. Davis 21a3828519SAndrew F. DavisRequired properties: 22a3828519SAndrew F. Davis-------------------- 23a3828519SAndrew F. Davis - compatible : Should be, 24a3828519SAndrew F. Davis "ti,k2e-pscrst" 25a3828519SAndrew F. Davis "ti,k2l-pscrst" 26a3828519SAndrew F. Davis "ti,k2hk-pscrst" 27a3828519SAndrew F. Davis "ti,syscon-reset" 28a3828519SAndrew F. Davis - #reset-cells : Should be 1. Please see the reset consumer node below 29a3828519SAndrew F. Davis for usage details 30a3828519SAndrew F. Davis - ti,reset-bits : Contains the reset control register information 31a3828519SAndrew F. Davis Should contain 7 cells for each reset exposed to 32a3828519SAndrew F. Davis consumers, defined as: 33a3828519SAndrew F. Davis Cell #1 : offset of the reset assert control 34a3828519SAndrew F. Davis register from the syscon register base 35a3828519SAndrew F. Davis Cell #2 : bit position of the reset in the reset 36a3828519SAndrew F. Davis assert control register 37a3828519SAndrew F. Davis Cell #3 : offset of the reset deassert control 38a3828519SAndrew F. Davis register from the syscon register base 39a3828519SAndrew F. Davis Cell #4 : bit position of the reset in the reset 40a3828519SAndrew F. Davis deassert control register 41a3828519SAndrew F. Davis Cell #5 : offset of the reset status register 42a3828519SAndrew F. Davis from the syscon register base 43a3828519SAndrew F. Davis Cell #6 : bit position of the reset in the 44a3828519SAndrew F. Davis reset status register 45a3828519SAndrew F. Davis Cell #7 : Flags used to control reset behavior, 46*47aab533SBjorn Helgaas available flags defined in the DT include 47a3828519SAndrew F. Davis file <dt-bindings/reset/ti-syscon.h> 48a3828519SAndrew F. Davis 49a3828519SAndrew F. DavisSysCon Reset Consumer Nodes 50a3828519SAndrew F. Davis=========================== 51a3828519SAndrew F. DavisEach of the reset consumer nodes should have the following properties, 52a3828519SAndrew F. Davisin addition to their own properties. 53a3828519SAndrew F. Davis 54a3828519SAndrew F. DavisRequired properties: 55a3828519SAndrew F. Davis-------------------- 56a3828519SAndrew F. Davis - resets : A phandle to the reset controller node and an index number 57a3828519SAndrew F. Davis to a reset specifier as defined above. 58a3828519SAndrew F. Davis 59a3828519SAndrew F. DavisPlease also refer to Documentation/devicetree/bindings/reset/reset.txt for 60a3828519SAndrew F. Daviscommon reset controller usage by consumers. 61a3828519SAndrew F. Davis 62a3828519SAndrew F. DavisExample: 63a3828519SAndrew F. Davis-------- 64a3828519SAndrew F. DavisThe following example demonstrates a syscon node, the reset controller node 65a3828519SAndrew F. Davisusing the syscon node, and a consumer (a DSP device) on the TI Keystone 2 6617ee3307SSuman Anna66AK2E SoC. 67a3828519SAndrew F. Davis 68a3828519SAndrew F. Davis/ { 69a3828519SAndrew F. Davis soc { 7048c926cdSMarco Franchi psc: power-sleep-controller@2350000 { 71a3828519SAndrew F. Davis compatible = "syscon", "simple-mfd"; 72a3828519SAndrew F. Davis reg = <0x02350000 0x1000>; 73a3828519SAndrew F. Davis 7417ee3307SSuman Anna pscrst: reset-controller { 75a3828519SAndrew F. Davis compatible = "ti,k2e-pscrst", "ti,syscon-reset"; 76a3828519SAndrew F. Davis #reset-cells = <1>; 77a3828519SAndrew F. Davis 78a3828519SAndrew F. Davis ti,reset-bits = < 7917ee3307SSuman Anna 0xa3c 8 0xa3c 8 0x83c 8 (ASSERT_CLEAR | DEASSERT_SET | STATUS_CLEAR) /* 0: dsp0 */ 8017ee3307SSuman Anna 0xa40 5 0xa44 3 0 0 (ASSERT_SET | DEASSERT_CLEAR | STATUS_NONE) /* 1: example */ 81a3828519SAndrew F. Davis >; 82a3828519SAndrew F. Davis }; 83a3828519SAndrew F. Davis }; 84a3828519SAndrew F. Davis 85a3828519SAndrew F. Davis dsp0: dsp0 { 86a3828519SAndrew F. Davis ... 87a3828519SAndrew F. Davis resets = <&pscrst 0>; 88a3828519SAndrew F. Davis ... 89a3828519SAndrew F. Davis }; 90a3828519SAndrew F. Davis }; 91a3828519SAndrew F. Davis}; 92