12e785143SKathiravan T# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 22e785143SKathiravan T%YAML 1.2 32e785143SKathiravan T--- 42e785143SKathiravan T$id: http://devicetree.org/schemas/pinctrl/qcom,ipq5332-tlmm.yaml# 52e785143SKathiravan T$schema: http://devicetree.org/meta-schemas/core.yaml# 62e785143SKathiravan T 72e785143SKathiravan Ttitle: Qualcomm IPQ5332 TLMM pin controller 82e785143SKathiravan T 92e785143SKathiravan Tmaintainers: 102e785143SKathiravan T - Bjorn Andersson <andersson@kernel.org> 112e785143SKathiravan T - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> 122e785143SKathiravan T 132e785143SKathiravan Tdescription: | 142e785143SKathiravan T Top Level Mode Multiplexer pin controller in Qualcomm IPQ5332 SoC. 152e785143SKathiravan T 162e785143SKathiravan TallOf: 172e785143SKathiravan T - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml# 182e785143SKathiravan T 192e785143SKathiravan Tproperties: 202e785143SKathiravan T compatible: 212e785143SKathiravan T const: qcom,ipq5332-tlmm 222e785143SKathiravan T 232e785143SKathiravan T reg: 242e785143SKathiravan T maxItems: 1 252e785143SKathiravan T 262e785143SKathiravan T interrupts: 272e785143SKathiravan T maxItems: 1 282e785143SKathiravan T 292e785143SKathiravan T interrupt-controller: true 302e785143SKathiravan T "#interrupt-cells": true 312e785143SKathiravan T gpio-controller: true 322e785143SKathiravan T "#gpio-cells": true 332e785143SKathiravan T gpio-ranges: true 342e785143SKathiravan T wakeup-parent: true 352e785143SKathiravan T 362e785143SKathiravan T gpio-reserved-ranges: 372e785143SKathiravan T minItems: 1 382e785143SKathiravan T maxItems: 27 392e785143SKathiravan T 402e785143SKathiravan T gpio-line-names: 412e785143SKathiravan T maxItems: 53 422e785143SKathiravan T 432e785143SKathiravan TpatternProperties: 442e785143SKathiravan T "-state$": 452e785143SKathiravan T oneOf: 462e785143SKathiravan T - $ref: "#/$defs/qcom-ipq5332-tlmm-state" 472e785143SKathiravan T - patternProperties: 482e785143SKathiravan T "-pins$": 492e785143SKathiravan T $ref: "#/$defs/qcom-ipq5332-tlmm-state" 502e785143SKathiravan T additionalProperties: false 512e785143SKathiravan T 522e785143SKathiravan T$defs: 532e785143SKathiravan T qcom-ipq5332-tlmm-state: 542e785143SKathiravan T type: object 552e785143SKathiravan T description: 562e785143SKathiravan T Pinctrl node's client devices use subnodes for desired pin configuration. 572e785143SKathiravan T Client device subnodes use below standard properties. 582e785143SKathiravan T $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state 59*2cf599edSKrzysztof Kozlowski unevaluatedProperties: false 602e785143SKathiravan T 612e785143SKathiravan T properties: 622e785143SKathiravan T pins: 632e785143SKathiravan T description: 642e785143SKathiravan T List of gpio pins affected by the properties specified in this 652e785143SKathiravan T subnode. 662e785143SKathiravan T items: 672e785143SKathiravan T pattern: "^gpio([0-9]|[1-4][0-9]|5[0-2])$" 682e785143SKathiravan T minItems: 1 692e785143SKathiravan T maxItems: 36 702e785143SKathiravan T 712e785143SKathiravan T function: 722e785143SKathiravan T description: 732e785143SKathiravan T Specify the alternative function to be configured for the specified 742e785143SKathiravan T pins. 752e785143SKathiravan T 762e785143SKathiravan T enum: [ atest_char, atest_char0, atest_char1, atest_char2, atest_char3, 772e785143SKathiravan T atest_tic, audio_pri, audio_pri0, audio_pri1, audio_sec, 782e785143SKathiravan T audio_sec0, audio_sec1, blsp0_i2c, blsp0_spi, blsp0_uart0, 792e785143SKathiravan T blsp0_uart1, blsp1_i2c0, blsp1_i2c1, blsp1_spi0, blsp1_spi1, 802e785143SKathiravan T blsp1_uart0, blsp1_uart1, blsp1_uart2, blsp2_i2c0, blsp2_i2c1, 812e785143SKathiravan T blsp2_spi, blsp2_spi0, blsp2_spi1, core_voltage, cri_trng0, 822e785143SKathiravan T cri_trng1, cri_trng2, cri_trng3, cxc_clk, cxc_data, dbg_out, 832e785143SKathiravan T gcc_plltest, gcc_tlmm, gpio, lock_det, mac0, mac1, mdc0, mdc1, 842e785143SKathiravan T mdio0, mdio1, pc, pcie0_clk, pcie0_wake, pcie1_clk, pcie1_wake, 852e785143SKathiravan T pcie2_clk, pcie2_wake, pll_test, prng_rosc0, prng_rosc1, 862e785143SKathiravan T prng_rosc2, prng_rosc3, pta, pwm0, pwm1, pwm2, pwm3, 872e785143SKathiravan T qdss_cti_trig_in_a0, qdss_cti_trig_in_a1, qdss_cti_trig_in_b0, 882e785143SKathiravan T qdss_cti_trig_in_b1, qdss_cti_trig_out_a0, 892e785143SKathiravan T qdss_cti_trig_out_a1, qdss_cti_trig_out_b0, 902e785143SKathiravan T qdss_cti_trig_out_b1, qdss_traceclk_a, qdss_traceclk_b, 912e785143SKathiravan T qdss_tracectl_a, qdss_tracectl_b, qdss_tracedata_a, 922e785143SKathiravan T qdss_tracedata_b, qspi_data, qspi_clk, qspi_cs, resout, rx0, 932e785143SKathiravan T rx1, sdc_data, sdc_clk, sdc_cmd, tsens_max, wci_txd, wci_rxd, 942e785143SKathiravan T wsi_clk, wsi_clk3, wsi_data, wsi_data3, wsis_reset, xfem ] 952e785143SKathiravan T 962e785143SKathiravan T required: 972e785143SKathiravan T - pins 982e785143SKathiravan T 992e785143SKathiravan Trequired: 1002e785143SKathiravan T - compatible 1012e785143SKathiravan T - reg 1022e785143SKathiravan T 1032e785143SKathiravan TadditionalProperties: false 1042e785143SKathiravan T 1052e785143SKathiravan Texamples: 1062e785143SKathiravan T - | 1072e785143SKathiravan T #include <dt-bindings/interrupt-controller/arm-gic.h> 1082e785143SKathiravan T 1092e785143SKathiravan T tlmm: pinctrl@1000000 { 1102e785143SKathiravan T compatible = "qcom,ipq5332-tlmm"; 1112e785143SKathiravan T reg = <0x01000000 0x300000>; 1122e785143SKathiravan T gpio-controller; 1132e785143SKathiravan T #gpio-cells = <0x2>; 1142e785143SKathiravan T gpio-ranges = <&tlmm 0 0 53>; 1152e785143SKathiravan T interrupts = <GIC_SPI 249 IRQ_TYPE_LEVEL_HIGH>; 1162e785143SKathiravan T interrupt-controller; 1172e785143SKathiravan T #interrupt-cells = <0x2>; 1182e785143SKathiravan T 1192e785143SKathiravan T serial0-state { 1202e785143SKathiravan T pins = "gpio18", "gpio19"; 1212e785143SKathiravan T function = "blsp0_uart0"; 1222e785143SKathiravan T drive-strength = <8>; 1232e785143SKathiravan T bias-pull-up; 1242e785143SKathiravan T }; 1252e785143SKathiravan T }; 126