xref: /openbmc/linux/Documentation/devicetree/bindings/pinctrl/nvidia,tegra-pinmux-common.yaml (revision 7ae9fb1b7ecbb5d85d07857943f677fd1a559b18)
1*de1835e3SThierry Reding# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2*de1835e3SThierry Reding%YAML 1.2
3*de1835e3SThierry Reding---
4*de1835e3SThierry Reding$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra-pinmux-common.yaml#
5*de1835e3SThierry Reding$schema: http://devicetree.org/meta-schemas/core.yaml#
6*de1835e3SThierry Reding
7*de1835e3SThierry Redingtitle: NVIDIA Tegra Pinmux Controller
8*de1835e3SThierry Reding
9*de1835e3SThierry Redingmaintainers:
10*de1835e3SThierry Reding  - Thierry Reding <thierry.reding@gmail.com>
11*de1835e3SThierry Reding  - Jonathan Hunter <jonathanh@nvidia.com>
12*de1835e3SThierry Reding
13*de1835e3SThierry Redingdescription: |
14*de1835e3SThierry Reding  Please refer to pinctrl-bindings.txt in this directory for details of the
15*de1835e3SThierry Reding  common pinctrl bindings used by client devices, including the meaning of
16*de1835e3SThierry Reding  the phrase "pin configuration node".
17*de1835e3SThierry Reding
18*de1835e3SThierry Reding  Tegra's pin configuration nodes act as a container for an arbitrary number
19*de1835e3SThierry Reding  of subnodes. Each of these subnodes represents some desired configuration
20*de1835e3SThierry Reding  for a pin, a group, or a list of pins or groups. This configuration can
21*de1835e3SThierry Reding  include the mux function to select on those pin(s)/ group(s), and various
22*de1835e3SThierry Reding  pin configuration parameters, such as pull-up, tristate, drive strength,
23*de1835e3SThierry Reding  etc.
24*de1835e3SThierry Reding
25*de1835e3SThierry Reding  The name of each subnode is not important; all subnodes should be
26*de1835e3SThierry Reding  enumerated and processed purely based on their content.
27*de1835e3SThierry Reding
28*de1835e3SThierry Reding  Each subnode only affects those parameters that are explicitly listed. In
29*de1835e3SThierry Reding  other words, a subnode that lists a mux function but no pin configuration
30*de1835e3SThierry Reding  parameters implies no information about any pin configuration parameters.
31*de1835e3SThierry Reding
32*de1835e3SThierry Reding  Similarly, a pin subnode that describes a pullup parameter implies no
33*de1835e3SThierry Reding  information about e.g.  the mux function or tristate parameter. For this
34*de1835e3SThierry Reding  reason, even seemingly boolean values are actually tristates in this
35*de1835e3SThierry Reding  binding: unspecified, off, or on. Unspecified is represented as an absent
36*de1835e3SThierry Reding  property, and off/on are represented as integer values 0 and 1.
37*de1835e3SThierry Reding
38*de1835e3SThierry Reding  Note that many of these properties are only valid for certain specific pins
39*de1835e3SThierry Reding  or groups. See the Tegra TRM and various pinmux spreadsheets for complete
40*de1835e3SThierry Reding  details regarding which groups support which functionality. The Linux
41*de1835e3SThierry Reding  pinctrl driver may also be a useful reference, since it consolidates,
42*de1835e3SThierry Reding  disambiguates, and corrects data from all those sources.
43*de1835e3SThierry Reding
44*de1835e3SThierry Redingproperties:
45*de1835e3SThierry Reding  nvidia,pins:
46*de1835e3SThierry Reding    $ref: /schemas/types.yaml#/definitions/string-array
47*de1835e3SThierry Reding    description: An array of strings. Each string contains the name of a pin
48*de1835e3SThierry Reding      or group.  Valid values for these names are listed below.
49*de1835e3SThierry Reding
50*de1835e3SThierry Reding  nvidia,function:
51*de1835e3SThierry Reding    $ref: /schemas/types.yaml#/definitions/string
52*de1835e3SThierry Reding    description: A string containing the name of the function to mux to the
53*de1835e3SThierry Reding      pin or group. Valid values for function names are listed below. See the
54*de1835e3SThierry Reding      Tegra TRM to determine which are valid for each pin or group.
55*de1835e3SThierry Reding
56*de1835e3SThierry Reding  nvidia,pull:
57*de1835e3SThierry Reding    description: Pull-down/up setting to apply to the pin.
58*de1835e3SThierry Reding    $ref: /schemas/types.yaml#/definitions/uint32
59*de1835e3SThierry Reding    oneOf:
60*de1835e3SThierry Reding      - description: none
61*de1835e3SThierry Reding        const: 0
62*de1835e3SThierry Reding      - description: down
63*de1835e3SThierry Reding        const: 1
64*de1835e3SThierry Reding      - description: up
65*de1835e3SThierry Reding        const: 2
66*de1835e3SThierry Reding
67*de1835e3SThierry Reding  nvidia,tristate:
68*de1835e3SThierry Reding    description: Tristate setting to apply to the pin.
69*de1835e3SThierry Reding    $ref: /schemas/types.yaml#/definitions/uint32
70*de1835e3SThierry Reding    oneOf:
71*de1835e3SThierry Reding      - description: drive
72*de1835e3SThierry Reding        const: 0
73*de1835e3SThierry Reding      - description: tristate
74*de1835e3SThierry Reding        const: 1
75*de1835e3SThierry Reding
76*de1835e3SThierry Reding  nvidia,schmitt:
77*de1835e3SThierry Reding    description: Enable Schmitt trigger on the input.
78*de1835e3SThierry Reding    $ref: /schemas/types.yaml#/definitions/uint32
79*de1835e3SThierry Reding    oneOf:
80*de1835e3SThierry Reding      - description: disable Schmitt trigger on the input
81*de1835e3SThierry Reding        const: 0
82*de1835e3SThierry Reding      - description: enable Schmitt trigger on the input
83*de1835e3SThierry Reding        const: 1
84*de1835e3SThierry Reding
85*de1835e3SThierry Reding  nvidia,pull-down-strength:
86*de1835e3SThierry Reding    description: Controls drive strength. 0 is weakest. The range of valid
87*de1835e3SThierry Reding      values depends on the pingroup. See "CAL_DRVDN" in the Tegra TRM.
88*de1835e3SThierry Reding    $ref: /schemas/types.yaml#/definitions/uint32
89*de1835e3SThierry Reding
90*de1835e3SThierry Reding  nvidia,pull-up-strength:
91*de1835e3SThierry Reding    description: Controls drive strength. 0 is weakest. The range of valid
92*de1835e3SThierry Reding      values depends on the pingroup. See "CAL_DRVUP" in the Tegra TRM.
93*de1835e3SThierry Reding    $ref: /schemas/types.yaml#/definitions/uint32
94*de1835e3SThierry Reding
95*de1835e3SThierry Reding  nvidia,high-speed-mode:
96*de1835e3SThierry Reding    description: Enable high speed mode the pins.
97*de1835e3SThierry Reding    $ref: /schemas/types.yaml#/definitions/uint32
98*de1835e3SThierry Reding    oneOf:
99*de1835e3SThierry Reding      - description: normal speed mode
100*de1835e3SThierry Reding        const: 0
101*de1835e3SThierry Reding      - description: high speed mode
102*de1835e3SThierry Reding        const: 1
103*de1835e3SThierry Reding
104*de1835e3SThierry Reding  nvidia,low-power-mode:
105*de1835e3SThierry Reding    description: Controls the drive power or current. Valid values are from 0
106*de1835e3SThierry Reding      through 3, where 0 specifies the least power and 3 specifies the most
107*de1835e3SThierry Reding      power. See "Low Power Mode" or "LPMD1" and "LPMD0" in the Tegra TRM.
108*de1835e3SThierry Reding    $ref: /schemas/types.yaml#/definitions/uint32
109*de1835e3SThierry Reding    enum: [ 0, 1, 2, 3 ]
110*de1835e3SThierry Reding
111*de1835e3SThierry Reding  nvidia,enable-input:
112*de1835e3SThierry Reding    description: Enable the pin's input path.
113*de1835e3SThierry Reding    $ref: /schemas/types.yaml#/definitions/uint32
114*de1835e3SThierry Reding    oneOf:
115*de1835e3SThierry Reding      - description: disable input (i.e. output only)
116*de1835e3SThierry Reding        const: 0
117*de1835e3SThierry Reding      - description: enable input
118*de1835e3SThierry Reding        const: 1
119*de1835e3SThierry Reding
120*de1835e3SThierry Reding  nvidia,open-drain:
121*de1835e3SThierry Reding    description: Open-drain configuration for the pin.
122*de1835e3SThierry Reding    $ref: /schemas/types.yaml#/definitions/uint32
123*de1835e3SThierry Reding    oneOf:
124*de1835e3SThierry Reding      - description: disable open-drain
125*de1835e3SThierry Reding        const: 0
126*de1835e3SThierry Reding      - description: enable open-drain
127*de1835e3SThierry Reding        const: 1
128*de1835e3SThierry Reding
129*de1835e3SThierry Reding  nvidia,lock:
130*de1835e3SThierry Reding    description: Lock the pin configuration against further changes until
131*de1835e3SThierry Reding      reset.
132*de1835e3SThierry Reding    $ref: /schemas/types.yaml#/definitions/uint32
133*de1835e3SThierry Reding    oneOf:
134*de1835e3SThierry Reding      - description: disable pin configuration lock
135*de1835e3SThierry Reding        const: 0
136*de1835e3SThierry Reding      - description: enable pin configuration lock
137*de1835e3SThierry Reding        const: 1
138*de1835e3SThierry Reding
139*de1835e3SThierry Reding  nvidia,io-reset:
140*de1835e3SThierry Reding    description: reset the I/O path
141*de1835e3SThierry Reding    $ref: /schemas/types.yaml#/definitions/uint32
142*de1835e3SThierry Reding    enum: [ 0, 1 ]
143*de1835e3SThierry Reding
144*de1835e3SThierry Reding  nvidia,rcv-sel:
145*de1835e3SThierry Reding    description: select VIL/VIH receivers
146*de1835e3SThierry Reding    $ref: /schemas/types.yaml#/definitions/uint32
147*de1835e3SThierry Reding    oneOf:
148*de1835e3SThierry Reding      - description: normal receivers
149*de1835e3SThierry Reding        const: 0
150*de1835e3SThierry Reding      - description: high-voltage receivers
151*de1835e3SThierry Reding        const: 1
152*de1835e3SThierry Reding
153*de1835e3SThierry Reding  nvidia,drive-type:
154*de1835e3SThierry Reding    description: Drive type to configure for the pin.
155*de1835e3SThierry Reding    $ref: /schemas/types.yaml#/definitions/uint32
156*de1835e3SThierry Reding    enum: [ 0, 1, 2, 3 ]
157*de1835e3SThierry Reding
158*de1835e3SThierry Reding  nvidia,io-hv:
159*de1835e3SThierry Reding    description: Select high-voltage receivers.
160*de1835e3SThierry Reding    $ref: /schemas/types.yaml#/definitions/uint32
161*de1835e3SThierry Reding    oneOf:
162*de1835e3SThierry Reding      - description: Use normal receivers.
163*de1835e3SThierry Reding        const: 0
164*de1835e3SThierry Reding      - description: Use high-voltage receivers.
165*de1835e3SThierry Reding        const: 1
166*de1835e3SThierry Reding
167*de1835e3SThierry Reding  nvidia,slew-rate-rising:
168*de1835e3SThierry Reding    description: Controls rising signal slew rate. 0 is fastest. The range of
169*de1835e3SThierry Reding      valid values depends on the pingroup. See "DRVDN_SLWR" in the Tegra TRM.
170*de1835e3SThierry Reding    $ref: /schemas/types.yaml#/definitions/uint32
171*de1835e3SThierry Reding
172*de1835e3SThierry Reding  nvidia,slew-rate-falling:
173*de1835e3SThierry Reding    description: Controls falling signal slew rate. 0 is fastest. The range of
174*de1835e3SThierry Reding      valid values depends on the pingroup. See "DRVUP_SLWF" in the Tegra TRM.
175*de1835e3SThierry Reding    $ref: /schemas/types.yaml#/definitions/uint32
176*de1835e3SThierry Reding
177*de1835e3SThierry RedingadditionalProperties: true
178*de1835e3SThierry Reding...
179