xref: /openbmc/linux/Documentation/devicetree/bindings/pinctrl/mediatek,mt8192-pinctrl.yaml (revision 1ac731c529cd4d6adbce134754b51ff7d822b145)
10dcf5a56SArınç ÜNAL# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
20dcf5a56SArınç ÜNAL%YAML 1.2
30dcf5a56SArınç ÜNAL---
40dcf5a56SArınç ÜNAL$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8192-pinctrl.yaml#
50dcf5a56SArınç ÜNAL$schema: http://devicetree.org/meta-schemas/core.yaml#
60dcf5a56SArınç ÜNAL
7a9d44c4cSArınç ÜNALtitle: MediaTek MT8192 Pin Controller
80dcf5a56SArınç ÜNAL
90dcf5a56SArınç ÜNALmaintainers:
100dcf5a56SArınç ÜNAL  - Sean Wang <sean.wang@mediatek.com>
110dcf5a56SArınç ÜNAL
12c911ad22SArınç ÜNALdescription:
13a9d44c4cSArınç ÜNAL  The MediaTek's MT8192 Pin controller is used to control SoC pins.
140dcf5a56SArınç ÜNAL
150dcf5a56SArınç ÜNALproperties:
160dcf5a56SArınç ÜNAL  compatible:
170dcf5a56SArınç ÜNAL    const: mediatek,mt8192-pinctrl
180dcf5a56SArınç ÜNAL
190dcf5a56SArınç ÜNAL  gpio-controller: true
200dcf5a56SArınç ÜNAL
210dcf5a56SArınç ÜNAL  '#gpio-cells':
22c911ad22SArınç ÜNAL    description:
230dcf5a56SArınç ÜNAL      Number of cells in GPIO specifier. Since the generic GPIO binding is used,
24c911ad22SArınç ÜNAL      the amount of cells must be specified as 2. See the below mentioned gpio
25c911ad22SArınç ÜNAL      binding representation for description of particular cells.
260dcf5a56SArınç ÜNAL    const: 2
270dcf5a56SArınç ÜNAL
280dcf5a56SArınç ÜNAL  gpio-ranges:
29c911ad22SArınç ÜNAL    description: GPIO valid number range.
300dcf5a56SArınç ÜNAL    maxItems: 1
310dcf5a56SArınç ÜNAL
320dcf5a56SArınç ÜNAL  gpio-line-names: true
330dcf5a56SArınç ÜNAL
340dcf5a56SArınç ÜNAL  reg:
35c911ad22SArınç ÜNAL    description:
36c911ad22SArınç ÜNAL      Physical address base for GPIO base registers. There are 11 GPIO physical
37c911ad22SArınç ÜNAL      address base in mt8192.
380dcf5a56SArınç ÜNAL    maxItems: 11
390dcf5a56SArınç ÜNAL
400dcf5a56SArınç ÜNAL  reg-names:
41c911ad22SArınç ÜNAL    description:
42c911ad22SArınç ÜNAL      GPIO base register names.
430dcf5a56SArınç ÜNAL    maxItems: 11
440dcf5a56SArınç ÜNAL
450dcf5a56SArınç ÜNAL  interrupt-controller: true
460dcf5a56SArınç ÜNAL
470dcf5a56SArınç ÜNAL  '#interrupt-cells':
480dcf5a56SArınç ÜNAL    const: 2
490dcf5a56SArınç ÜNAL
500dcf5a56SArınç ÜNAL  interrupts:
510dcf5a56SArınç ÜNAL    description: The interrupt outputs to sysirq.
520dcf5a56SArınç ÜNAL    maxItems: 1
530dcf5a56SArınç ÜNAL
540dcf5a56SArınç ÜNAL# PIN CONFIGURATION NODES
550dcf5a56SArınç ÜNALpatternProperties:
560dcf5a56SArınç ÜNAL  '-pins$':
570dcf5a56SArınç ÜNAL    type: object
580dcf5a56SArınç ÜNAL    additionalProperties: false
590dcf5a56SArınç ÜNAL    patternProperties:
600dcf5a56SArınç ÜNAL      '^pins':
610dcf5a56SArınç ÜNAL        type: object
62c911ad22SArınç ÜNAL        description:
630dcf5a56SArınç ÜNAL          A pinctrl node should contain at least one subnodes representing the
640dcf5a56SArınç ÜNAL          pinctrl groups available on the machine. Each subnode will list the
650dcf5a56SArınç ÜNAL          pins it needs, and how they should be configured, with regard to muxer
66c911ad22SArınç ÜNAL          configuration, pullups, drive strength, input enable/disable and input
67c911ad22SArınç ÜNAL          schmitt.
68*6a735ad5SArınç ÜNAL        $ref: pinmux-node.yaml
690dcf5a56SArınç ÜNAL
700dcf5a56SArınç ÜNAL        properties:
710dcf5a56SArınç ÜNAL          pinmux:
72c911ad22SArınç ÜNAL            description:
730dcf5a56SArınç ÜNAL              Integer array, represents gpio pin number and mux setting.
74c911ad22SArınç ÜNAL              Supported pin number and mux varies for different SoCs, and are
75c911ad22SArınç ÜNAL              defined as macros in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
760dcf5a56SArınç ÜNAL
770dcf5a56SArınç ÜNAL          drive-strength:
78c911ad22SArınç ÜNAL            description:
79c911ad22SArınç ÜNAL              It can support some arguments, such as MTK_DRIVE_4mA,
80c911ad22SArınç ÜNAL              MTK_DRIVE_6mA, etc. See dt-bindings/pinctrl/mt65xx.h. It can only
81c911ad22SArınç ÜNAL              support 2/4/6/8/10/12/14/16mA in mt8192.
820dcf5a56SArınç ÜNAL            enum: [2, 4, 6, 8, 10, 12, 14, 16]
830dcf5a56SArınç ÜNAL
840dcf5a56SArınç ÜNAL          drive-strength-microamp:
850dcf5a56SArınç ÜNAL            enum: [125, 250, 500, 1000]
860dcf5a56SArınç ÜNAL
870dcf5a56SArınç ÜNAL          bias-pull-down:
880dcf5a56SArınç ÜNAL            oneOf:
890dcf5a56SArınç ÜNAL              - type: boolean
900dcf5a56SArınç ÜNAL                description: normal pull down.
910dcf5a56SArınç ÜNAL              - enum: [100, 101, 102, 103]
920dcf5a56SArınç ÜNAL                description: PUPD/R1/R0 pull down type. See MTK_PUPD_SET_R1R0_
930dcf5a56SArınç ÜNAL                  defines in dt-bindings/pinctrl/mt65xx.h.
940dcf5a56SArınç ÜNAL              - enum: [200, 201, 202, 203]
95c911ad22SArınç ÜNAL                description: RSEL pull down type. See MTK_PULL_SET_RSEL_ defines
96c911ad22SArınç ÜNAL                  in dt-bindings/pinctrl/mt65xx.h.
970dcf5a56SArınç ÜNAL
980dcf5a56SArınç ÜNAL          bias-pull-up:
990dcf5a56SArınç ÜNAL            oneOf:
1000dcf5a56SArınç ÜNAL              - type: boolean
1010dcf5a56SArınç ÜNAL                description: normal pull up.
1020dcf5a56SArınç ÜNAL              - enum: [100, 101, 102, 103]
1030dcf5a56SArınç ÜNAL                description: PUPD/R1/R0 pull up type. See MTK_PUPD_SET_R1R0_
1040dcf5a56SArınç ÜNAL                  defines in dt-bindings/pinctrl/mt65xx.h.
1050dcf5a56SArınç ÜNAL              - enum: [200, 201, 202, 203]
106c911ad22SArınç ÜNAL                description: RSEL pull up type. See MTK_PULL_SET_RSEL_ defines
107c911ad22SArınç ÜNAL                  in dt-bindings/pinctrl/mt65xx.h.
1080dcf5a56SArınç ÜNAL
1090dcf5a56SArınç ÜNAL          bias-disable: true
1100dcf5a56SArınç ÜNAL
1110dcf5a56SArınç ÜNAL          output-high: true
1120dcf5a56SArınç ÜNAL
1130dcf5a56SArınç ÜNAL          output-low: true
1140dcf5a56SArınç ÜNAL
1150dcf5a56SArınç ÜNAL          input-enable: true
1160dcf5a56SArınç ÜNAL
1170dcf5a56SArınç ÜNAL          input-disable: true
1180dcf5a56SArınç ÜNAL
1190dcf5a56SArınç ÜNAL          input-schmitt-enable: true
1200dcf5a56SArınç ÜNAL
1210dcf5a56SArınç ÜNAL          input-schmitt-disable: true
1220dcf5a56SArınç ÜNAL
1230dcf5a56SArınç ÜNAL        required:
1240dcf5a56SArınç ÜNAL          - pinmux
1250dcf5a56SArınç ÜNAL
1260dcf5a56SArınç ÜNAL        additionalProperties: false
1270dcf5a56SArınç ÜNAL
1280dcf5a56SArınç ÜNALallOf:
129*6a735ad5SArınç ÜNAL  - $ref: pinctrl.yaml#
1300dcf5a56SArınç ÜNAL
1310dcf5a56SArınç ÜNALrequired:
1320dcf5a56SArınç ÜNAL  - compatible
1330dcf5a56SArınç ÜNAL  - reg
1340dcf5a56SArınç ÜNAL  - interrupts
1350dcf5a56SArınç ÜNAL  - interrupt-controller
1360dcf5a56SArınç ÜNAL  - '#interrupt-cells'
1370dcf5a56SArınç ÜNAL  - gpio-controller
1380dcf5a56SArınç ÜNAL  - '#gpio-cells'
1390dcf5a56SArınç ÜNAL  - gpio-ranges
1400dcf5a56SArınç ÜNAL
1410dcf5a56SArınç ÜNALadditionalProperties: false
1420dcf5a56SArınç ÜNAL
1430dcf5a56SArınç ÜNALexamples:
1440dcf5a56SArınç ÜNAL  - |
1450dcf5a56SArınç ÜNAL            #include <dt-bindings/pinctrl/mt8192-pinfunc.h>
1460dcf5a56SArınç ÜNAL            #include <dt-bindings/interrupt-controller/arm-gic.h>
1470dcf5a56SArınç ÜNAL            pio: pinctrl@10005000 {
1480dcf5a56SArınç ÜNAL                    compatible = "mediatek,mt8192-pinctrl";
1490dcf5a56SArınç ÜNAL                    reg = <0x10005000 0x1000>,
1500dcf5a56SArınç ÜNAL                          <0x11c20000 0x1000>,
1510dcf5a56SArınç ÜNAL                          <0x11d10000 0x1000>,
1520dcf5a56SArınç ÜNAL                          <0x11d30000 0x1000>,
1530dcf5a56SArınç ÜNAL                          <0x11d40000 0x1000>,
1540dcf5a56SArınç ÜNAL                          <0x11e20000 0x1000>,
1550dcf5a56SArınç ÜNAL                          <0x11e70000 0x1000>,
1560dcf5a56SArınç ÜNAL                          <0x11ea0000 0x1000>,
1570dcf5a56SArınç ÜNAL                          <0x11f20000 0x1000>,
1580dcf5a56SArınç ÜNAL                          <0x11f30000 0x1000>,
1590dcf5a56SArınç ÜNAL                          <0x1000b000 0x1000>;
1600dcf5a56SArınç ÜNAL                    reg-names = "iocfg0", "iocfg_rm", "iocfg_bm",
1610dcf5a56SArınç ÜNAL                          "iocfg_bl", "iocfg_br", "iocfg_lm",
1620dcf5a56SArınç ÜNAL                          "iocfg_lb", "iocfg_rt", "iocfg_lt",
1630dcf5a56SArınç ÜNAL                          "iocfg_tl", "eint";
1640dcf5a56SArınç ÜNAL                    gpio-controller;
1650dcf5a56SArınç ÜNAL                    #gpio-cells = <2>;
1660dcf5a56SArınç ÜNAL                    gpio-ranges = <&pio 0 0 220>;
1670dcf5a56SArınç ÜNAL                    interrupt-controller;
1680dcf5a56SArınç ÜNAL                    interrupts = <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH 0>;
1690dcf5a56SArınç ÜNAL                    #interrupt-cells = <2>;
1700dcf5a56SArınç ÜNAL
1710dcf5a56SArınç ÜNAL                    spi1-default-pins {
1720dcf5a56SArınç ÜNAL                            pins-cs-mosi-clk {
1730dcf5a56SArınç ÜNAL                                    pinmux = <PINMUX_GPIO157__FUNC_SPI1_A_CSB>,
1740dcf5a56SArınç ÜNAL                                             <PINMUX_GPIO159__FUNC_SPI1_A_MO>,
1750dcf5a56SArınç ÜNAL                                             <PINMUX_GPIO156__FUNC_SPI1_A_CLK>;
1760dcf5a56SArınç ÜNAL                                    bias-disable;
1770dcf5a56SArınç ÜNAL                            };
1780dcf5a56SArınç ÜNAL
1790dcf5a56SArınç ÜNAL                            pins-miso {
1800dcf5a56SArınç ÜNAL                                    pinmux = <PINMUX_GPIO158__FUNC_SPI1_A_MI>;
1810dcf5a56SArınç ÜNAL                                    bias-pull-down;
1820dcf5a56SArınç ÜNAL                            };
1830dcf5a56SArınç ÜNAL                    };
1840dcf5a56SArınç ÜNAL            };
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