1b9ffc18cSHsin-Yi Wang# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2b9ffc18cSHsin-Yi Wang%YAML 1.2 3b9ffc18cSHsin-Yi Wang--- 4b9ffc18cSHsin-Yi Wang$id: http://devicetree.org/schemas/pinctrl/mediatek,mt7622-pinctrl.yaml# 5b9ffc18cSHsin-Yi Wang$schema: http://devicetree.org/meta-schemas/core.yaml# 6b9ffc18cSHsin-Yi Wang 7a9d44c4cSArınç ÜNALtitle: MediaTek MT7622 Pin Controller 8b9ffc18cSHsin-Yi Wang 9b9ffc18cSHsin-Yi Wangmaintainers: 10b9ffc18cSHsin-Yi Wang - Sean Wang <sean.wang@kernel.org> 11b9ffc18cSHsin-Yi Wang 12c911ad22SArınç ÜNALdescription: 13b9ffc18cSHsin-Yi Wang The MediaTek's MT7622 Pin controller is used to control SoC pins. 14b9ffc18cSHsin-Yi Wang 15b9ffc18cSHsin-Yi Wangproperties: 16b9ffc18cSHsin-Yi Wang compatible: 17b9ffc18cSHsin-Yi Wang enum: 18b9ffc18cSHsin-Yi Wang - mediatek,mt7622-pinctrl 19b9ffc18cSHsin-Yi Wang - mediatek,mt7629-pinctrl 20b9ffc18cSHsin-Yi Wang 21b9ffc18cSHsin-Yi Wang reg: 22b9ffc18cSHsin-Yi Wang maxItems: 1 23b9ffc18cSHsin-Yi Wang 24b9ffc18cSHsin-Yi Wang reg-names: 25b9ffc18cSHsin-Yi Wang items: 26b9ffc18cSHsin-Yi Wang - const: eint 27b9ffc18cSHsin-Yi Wang 28b9ffc18cSHsin-Yi Wang gpio-controller: true 29b9ffc18cSHsin-Yi Wang 30b9ffc18cSHsin-Yi Wang "#gpio-cells": 31b9ffc18cSHsin-Yi Wang const: 2 32c911ad22SArınç ÜNAL description: 33c911ad22SArınç ÜNAL Number of cells in GPIO specifier. Since the generic GPIO binding is used, 34c911ad22SArınç ÜNAL the amount of cells must be specified as 2. See the below mentioned gpio 35c911ad22SArınç ÜNAL binding representation for description of particular cells. 36b9ffc18cSHsin-Yi Wang 37b9ffc18cSHsin-Yi Wang interrupt-controller: true 38b9ffc18cSHsin-Yi Wang 39b9ffc18cSHsin-Yi Wang interrupts: 40b9ffc18cSHsin-Yi Wang maxItems: 1 41b9ffc18cSHsin-Yi Wang 42b9ffc18cSHsin-Yi Wang "#interrupt-cells": 43b9ffc18cSHsin-Yi Wang const: 2 44b9ffc18cSHsin-Yi Wang 45c09acbc4SRafał MiłeckiallOf: 466a735ad5SArınç ÜNAL - $ref: pinctrl.yaml# 47c09acbc4SRafał Miłecki 48b9ffc18cSHsin-Yi Wangrequired: 49b9ffc18cSHsin-Yi Wang - compatible 50b9ffc18cSHsin-Yi Wang - reg 51b9ffc18cSHsin-Yi Wang - gpio-controller 52b9ffc18cSHsin-Yi Wang - "#gpio-cells" 53b9ffc18cSHsin-Yi Wang 54b9ffc18cSHsin-Yi Wangif: 55b9ffc18cSHsin-Yi Wang required: 56b9ffc18cSHsin-Yi Wang - interrupt-controller 57b9ffc18cSHsin-Yi Wangthen: 58b9ffc18cSHsin-Yi Wang required: 59b9ffc18cSHsin-Yi Wang - reg-names 60b9ffc18cSHsin-Yi Wang - interrupts 61b9ffc18cSHsin-Yi Wang - "#interrupt-cells" 62b9ffc18cSHsin-Yi Wang 63b9ffc18cSHsin-Yi WangpatternProperties: 646c488fbbSRob Herring '-pins(-[a-z]+)?$': 65b9ffc18cSHsin-Yi Wang type: object 66b9ffc18cSHsin-Yi Wang additionalProperties: false 67b9ffc18cSHsin-Yi Wang patternProperties: 686c488fbbSRob Herring '^mux(-|$)': 69b9ffc18cSHsin-Yi Wang type: object 70b9ffc18cSHsin-Yi Wang additionalProperties: false 71c911ad22SArınç ÜNAL description: 72b9ffc18cSHsin-Yi Wang pinmux configuration nodes. 736a735ad5SArınç ÜNAL $ref: /schemas/pinctrl/pinmux-node.yaml 74b9ffc18cSHsin-Yi Wang properties: 75b9ffc18cSHsin-Yi Wang function: 76c911ad22SArınç ÜNAL description: 77b9ffc18cSHsin-Yi Wang A string containing the name of the function to mux to the group. 78b9ffc18cSHsin-Yi Wang enum: [emmc, eth, i2c, i2s, ir, led, flash, pcie, pmic, pwm, sd, 79b9ffc18cSHsin-Yi Wang spi, tdm, uart, watchdog, wifi] 80b9ffc18cSHsin-Yi Wang 81b9ffc18cSHsin-Yi Wang groups: 82c911ad22SArınç ÜNAL description: 83b9ffc18cSHsin-Yi Wang An array of strings. Each string contains the name of a group. 84b9ffc18cSHsin-Yi Wang 85b9ffc18cSHsin-Yi Wang drive-strength: 86b9ffc18cSHsin-Yi Wang enum: [4, 8, 12, 16] 87b9ffc18cSHsin-Yi Wang 88b9ffc18cSHsin-Yi Wang required: 89b9ffc18cSHsin-Yi Wang - groups 90b9ffc18cSHsin-Yi Wang - function 91b9ffc18cSHsin-Yi Wang 92b9ffc18cSHsin-Yi Wang allOf: 93b9ffc18cSHsin-Yi Wang - if: 94b9ffc18cSHsin-Yi Wang properties: 95b9ffc18cSHsin-Yi Wang function: 96b9ffc18cSHsin-Yi Wang const: emmc 97b9ffc18cSHsin-Yi Wang then: 98b9ffc18cSHsin-Yi Wang properties: 99b9ffc18cSHsin-Yi Wang groups: 100*dedf17b3SRafał Miłecki items: 101b9ffc18cSHsin-Yi Wang enum: [emmc, emmc_rst] 102b9ffc18cSHsin-Yi Wang - if: 103b9ffc18cSHsin-Yi Wang properties: 104b9ffc18cSHsin-Yi Wang function: 105b9ffc18cSHsin-Yi Wang const: eth 106b9ffc18cSHsin-Yi Wang then: 107b9ffc18cSHsin-Yi Wang properties: 108b9ffc18cSHsin-Yi Wang groups: 109*dedf17b3SRafał Miłecki items: 110b9ffc18cSHsin-Yi Wang enum: [esw, esw_p0_p1, esw_p2_p3_p4, rgmii_via_esw, 111b9ffc18cSHsin-Yi Wang rgmii_via_gmac1, rgmii_via_gmac2, mdc_mdio] 112b9ffc18cSHsin-Yi Wang - if: 113b9ffc18cSHsin-Yi Wang properties: 114b9ffc18cSHsin-Yi Wang function: 115b9ffc18cSHsin-Yi Wang const: i2c 116b9ffc18cSHsin-Yi Wang then: 117b9ffc18cSHsin-Yi Wang properties: 118b9ffc18cSHsin-Yi Wang groups: 119b9ffc18cSHsin-Yi Wang enum: [i2c0, i2c_0, i2c_1, i2c1_0, i2c1_1, i2c1_2, i2c2_0, 120b9ffc18cSHsin-Yi Wang i2c2_1, i2c2_2] 121b9ffc18cSHsin-Yi Wang - if: 122b9ffc18cSHsin-Yi Wang properties: 123b9ffc18cSHsin-Yi Wang function: 124b9ffc18cSHsin-Yi Wang const: i2s 125b9ffc18cSHsin-Yi Wang then: 126b9ffc18cSHsin-Yi Wang properties: 127b9ffc18cSHsin-Yi Wang groups: 128*dedf17b3SRafał Miłecki items: 129b9ffc18cSHsin-Yi Wang enum: [i2s_in_mclk_bclk_ws, i2s1_in_data, i2s2_in_data, 130b9ffc18cSHsin-Yi Wang i2s3_in_data, i2s4_in_data, i2s_out_mclk_bclk_ws, 131b9ffc18cSHsin-Yi Wang i2s1_out_data, i2s2_out_data, i2s3_out_data, 132b9ffc18cSHsin-Yi Wang i2s4_out_data] 133b9ffc18cSHsin-Yi Wang - if: 134b9ffc18cSHsin-Yi Wang properties: 135b9ffc18cSHsin-Yi Wang function: 136b9ffc18cSHsin-Yi Wang const: ir 137b9ffc18cSHsin-Yi Wang then: 138b9ffc18cSHsin-Yi Wang properties: 139b9ffc18cSHsin-Yi Wang groups: 140b9ffc18cSHsin-Yi Wang enum: [ir_0_tx, ir_1_tx, ir_2_tx, ir_0_rx, ir_1_rx, ir_2_rx] 141b9ffc18cSHsin-Yi Wang - if: 142b9ffc18cSHsin-Yi Wang properties: 143b9ffc18cSHsin-Yi Wang function: 144b9ffc18cSHsin-Yi Wang const: led 145b9ffc18cSHsin-Yi Wang then: 146b9ffc18cSHsin-Yi Wang properties: 147b9ffc18cSHsin-Yi Wang groups: 148b9ffc18cSHsin-Yi Wang enum: [ephy_leds, ephy0_led, ephy1_led, ephy2_led, ephy3_led, 149b9ffc18cSHsin-Yi Wang ephy4_led, wled, wf2g_led, wf5g_led] 150b9ffc18cSHsin-Yi Wang - if: 151b9ffc18cSHsin-Yi Wang properties: 152b9ffc18cSHsin-Yi Wang function: 153b9ffc18cSHsin-Yi Wang const: flash 154b9ffc18cSHsin-Yi Wang then: 155b9ffc18cSHsin-Yi Wang properties: 156b9ffc18cSHsin-Yi Wang groups: 157b9ffc18cSHsin-Yi Wang enum: [par_nand, snfi, spi_nor] 158b9ffc18cSHsin-Yi Wang - if: 159b9ffc18cSHsin-Yi Wang properties: 160b9ffc18cSHsin-Yi Wang function: 161b9ffc18cSHsin-Yi Wang const: pcie 162b9ffc18cSHsin-Yi Wang then: 163b9ffc18cSHsin-Yi Wang properties: 164b9ffc18cSHsin-Yi Wang groups: 165*dedf17b3SRafał Miłecki items: 166b9ffc18cSHsin-Yi Wang enum: [pcie0_0_waken, pcie0_1_waken, pcie1_0_waken, 167b9ffc18cSHsin-Yi Wang pcie0_0_clkreq, pcie0_1_clkreq, pcie1_0_clkreq, 168b9ffc18cSHsin-Yi Wang pcie0_pad_perst, pcie1_pad_perst, pcie_pereset, 169b9ffc18cSHsin-Yi Wang pcie_wake, pcie_clkreq] 170b9ffc18cSHsin-Yi Wang - if: 171b9ffc18cSHsin-Yi Wang properties: 172b9ffc18cSHsin-Yi Wang function: 173b9ffc18cSHsin-Yi Wang const: pmic 174b9ffc18cSHsin-Yi Wang then: 175b9ffc18cSHsin-Yi Wang properties: 176b9ffc18cSHsin-Yi Wang groups: 177b9ffc18cSHsin-Yi Wang enum: [pmic_bus] 178b9ffc18cSHsin-Yi Wang - if: 179b9ffc18cSHsin-Yi Wang properties: 180b9ffc18cSHsin-Yi Wang function: 181b9ffc18cSHsin-Yi Wang const: pwm 182b9ffc18cSHsin-Yi Wang then: 183b9ffc18cSHsin-Yi Wang properties: 184b9ffc18cSHsin-Yi Wang groups: 185*dedf17b3SRafał Miłecki items: 186b9ffc18cSHsin-Yi Wang enum: [pwm_ch1_0, pwm_ch1_1, pwm_ch1_2, pwm_ch2_0, pwm_ch2_1, 187b9ffc18cSHsin-Yi Wang pwm_ch2_2, pwm_ch3_0, pwm_ch3_1, pwm_ch3_2, pwm_ch4_0, 188b9ffc18cSHsin-Yi Wang pwm_ch4_1, pwm_ch4_2, pwm_ch4_3, pwm_ch5_0, pwm_ch5_1, 189b9ffc18cSHsin-Yi Wang pwm_ch5_2, pwm_ch6_0, pwm_ch6_1, pwm_ch6_2, pwm_ch6_3, 190b9ffc18cSHsin-Yi Wang pwm_ch7_0, pwm_0, pwm_1] 191b9ffc18cSHsin-Yi Wang - if: 192b9ffc18cSHsin-Yi Wang properties: 193b9ffc18cSHsin-Yi Wang function: 194b9ffc18cSHsin-Yi Wang const: sd 195b9ffc18cSHsin-Yi Wang then: 196b9ffc18cSHsin-Yi Wang properties: 197b9ffc18cSHsin-Yi Wang groups: 198b9ffc18cSHsin-Yi Wang enum: [sd_0, sd_1] 199b9ffc18cSHsin-Yi Wang - if: 200b9ffc18cSHsin-Yi Wang properties: 201b9ffc18cSHsin-Yi Wang function: 202b9ffc18cSHsin-Yi Wang const: spi 203b9ffc18cSHsin-Yi Wang then: 204b9ffc18cSHsin-Yi Wang properties: 205b9ffc18cSHsin-Yi Wang groups: 206b9ffc18cSHsin-Yi Wang enum: [spic0_0, spic0_1, spic1_0, spic1_1, spic2_0_wp_hold, 207b9ffc18cSHsin-Yi Wang spic2_0, spi_0, spi_1, spi_wp, spi_hold] 208b9ffc18cSHsin-Yi Wang - if: 209b9ffc18cSHsin-Yi Wang properties: 210b9ffc18cSHsin-Yi Wang function: 211b9ffc18cSHsin-Yi Wang const: tdm 212b9ffc18cSHsin-Yi Wang then: 213b9ffc18cSHsin-Yi Wang properties: 214b9ffc18cSHsin-Yi Wang groups: 215b9ffc18cSHsin-Yi Wang enum: [tdm_0_out_mclk_bclk_ws, tdm_0_in_mclk_bclk_ws, 216b9ffc18cSHsin-Yi Wang tdm_0_out_data, tdm_0_in_data, tdm_1_out_mclk_bclk_ws, 217b9ffc18cSHsin-Yi Wang tdm_1_in_mclk_bclk_ws, tdm_1_out_data, tdm_1_in_data] 218b9ffc18cSHsin-Yi Wang - if: 219b9ffc18cSHsin-Yi Wang properties: 220b9ffc18cSHsin-Yi Wang function: 221b9ffc18cSHsin-Yi Wang const: uart 222b9ffc18cSHsin-Yi Wang then: 223b9ffc18cSHsin-Yi Wang properties: 224b9ffc18cSHsin-Yi Wang groups: 225b9ffc18cSHsin-Yi Wang enum: [uart0_0_tx_rx, uart1_0_tx_rx, uart1_0_rts_cts, 226b9ffc18cSHsin-Yi Wang uart1_1_tx_rx, uart1_1_rts_cts, uart2_0_tx_rx, 227b9ffc18cSHsin-Yi Wang uart2_0_rts_cts, uart2_1_tx_rx, uart2_1_rts_cts, 228b9ffc18cSHsin-Yi Wang uart2_2_tx_rx, uart2_2_rts_cts, uart2_3_tx_rx, 229b9ffc18cSHsin-Yi Wang uart3_0_tx_rx, uart3_1_tx_rx, uart3_1_rts_cts, 230b9ffc18cSHsin-Yi Wang uart4_0_tx_rx, uart4_1_tx_rx, uart4_1_rts_cts, 231b9ffc18cSHsin-Yi Wang uart4_2_tx_rx, uart4_2_rts_cts, uart0_txd_rxd, 232b9ffc18cSHsin-Yi Wang uart1_0_txd_rxd, uart1_0_cts_rts, uart1_1_txd_rxd, 233b9ffc18cSHsin-Yi Wang uart1_1_cts_rts, uart2_0_txd_rxd, uart2_0_cts_rts, 234b9ffc18cSHsin-Yi Wang uart2_1_txd_rxd, uart2_1_cts_rts] 235b9ffc18cSHsin-Yi Wang - if: 236b9ffc18cSHsin-Yi Wang properties: 237b9ffc18cSHsin-Yi Wang function: 238b9ffc18cSHsin-Yi Wang const: watchdog 239b9ffc18cSHsin-Yi Wang then: 240b9ffc18cSHsin-Yi Wang properties: 241b9ffc18cSHsin-Yi Wang groups: 242b9ffc18cSHsin-Yi Wang enum: [watchdog] 243b9ffc18cSHsin-Yi Wang - if: 244b9ffc18cSHsin-Yi Wang properties: 245b9ffc18cSHsin-Yi Wang function: 246b9ffc18cSHsin-Yi Wang const: wifi 247b9ffc18cSHsin-Yi Wang then: 248b9ffc18cSHsin-Yi Wang properties: 249b9ffc18cSHsin-Yi Wang groups: 250b9ffc18cSHsin-Yi Wang enum: [wf0_2g, wf0_5g] 251b9ffc18cSHsin-Yi Wang 2526c488fbbSRob Herring '^conf(-|$)': 253b9ffc18cSHsin-Yi Wang type: object 254b9ffc18cSHsin-Yi Wang additionalProperties: false 255c911ad22SArınç ÜNAL description: 256b9ffc18cSHsin-Yi Wang pinconf configuration nodes. 2576a735ad5SArınç ÜNAL $ref: /schemas/pinctrl/pincfg-node.yaml 258b9ffc18cSHsin-Yi Wang 259b9ffc18cSHsin-Yi Wang properties: 260b9ffc18cSHsin-Yi Wang groups: 261c911ad22SArınç ÜNAL description: 262b9ffc18cSHsin-Yi Wang An array of strings. Each string contains the name of a group. 263b9ffc18cSHsin-Yi Wang Valid values are the same as the pinmux node. 264b9ffc18cSHsin-Yi Wang 265b9ffc18cSHsin-Yi Wang pins: 266c911ad22SArınç ÜNAL description: 267b9ffc18cSHsin-Yi Wang An array of strings. Each string contains the name of a pin. 268*dedf17b3SRafał Miłecki items: 269b9ffc18cSHsin-Yi Wang enum: [GPIO_A, I2S1_IN, I2S1_OUT, I2S_BCLK, I2S_WS, I2S_MCLK, TXD0, 270b9ffc18cSHsin-Yi Wang RXD0, SPI_WP, SPI_HOLD, SPI_CLK, SPI_MOSI, SPI_MISO, SPI_CS, 271b9ffc18cSHsin-Yi Wang I2C_SDA, I2C_SCL, I2S2_IN, I2S3_IN, I2S4_IN, I2S2_OUT, 272b9ffc18cSHsin-Yi Wang I2S3_OUT, I2S4_OUT, GPIO_B, MDC, MDIO, G2_TXD0, G2_TXD1, 273b9ffc18cSHsin-Yi Wang G2_TXD2, G2_TXD3, G2_TXEN, G2_TXC, G2_RXD0, G2_RXD1, G2_RXD2, 274b9ffc18cSHsin-Yi Wang G2_RXD3, G2_RXDV, G2_RXC, NCEB, NWEB, NREB, NDL4, NDL5, NDL6, 275b9ffc18cSHsin-Yi Wang NDL7, NRB, NCLE, NALE, NDL0, NDL1, NDL2, NDL3, MDI_TP_P0, 276b9ffc18cSHsin-Yi Wang MDI_TN_P0, MDI_RP_P0, MDI_RN_P0, MDI_TP_P1, MDI_TN_P1, 277b9ffc18cSHsin-Yi Wang MDI_RP_P1, MDI_RN_P1, MDI_RP_P2, MDI_RN_P2, MDI_TP_P2, 278b9ffc18cSHsin-Yi Wang MDI_TN_P2, MDI_TP_P3, MDI_TN_P3, MDI_RP_P3, MDI_RN_P3, 279b9ffc18cSHsin-Yi Wang MDI_RP_P4, MDI_RN_P4, MDI_TP_P4, MDI_TN_P4, PMIC_SCL, 280b9ffc18cSHsin-Yi Wang PMIC_SDA, SPIC1_CLK, SPIC1_MOSI, SPIC1_MISO, SPIC1_CS, 281b9ffc18cSHsin-Yi Wang GPIO_D, WATCHDOG, RTS3_N, CTS3_N, TXD3, RXD3, PERST0_N, 282b9ffc18cSHsin-Yi Wang PERST1_N, WLED_N, EPHY_LED0_N, AUXIN0, AUXIN1, AUXIN2, 283b9ffc18cSHsin-Yi Wang AUXIN3, TXD4, RXD4, RTS4_N, CST4_N, PWM1, PWM2, PWM3, PWM4, 284b9ffc18cSHsin-Yi Wang PWM5, PWM6, PWM7, GPIO_E, TOP_5G_CLK, TOP_5G_DATA, 285b9ffc18cSHsin-Yi Wang WF0_5G_HB0, WF0_5G_HB1, WF0_5G_HB2, WF0_5G_HB3, WF0_5G_HB4, 286b9ffc18cSHsin-Yi Wang WF0_5G_HB5, WF0_5G_HB6, XO_REQ, TOP_RST_N, SYS_WATCHDOG, 287b9ffc18cSHsin-Yi Wang EPHY_LED0_N_JTDO, EPHY_LED1_N_JTDI, EPHY_LED2_N_JTMS, 288b9ffc18cSHsin-Yi Wang EPHY_LED3_N_JTCLK, EPHY_LED4_N_JTRST_N, WF2G_LED_N, 289b9ffc18cSHsin-Yi Wang WF5G_LED_N, GPIO_9, GPIO_10, GPIO_11, GPIO_12, UART1_TXD, 290b9ffc18cSHsin-Yi Wang UART1_RXD, UART1_CTS, UART1_RTS, UART2_TXD, UART2_RXD, 291b9ffc18cSHsin-Yi Wang UART2_CTS, UART2_RTS, SMI_MDC, SMI_MDIO, PCIE_PERESET_N, 292b9ffc18cSHsin-Yi Wang PWM_0, GPIO_0, GPIO_1, GPIO_2, GPIO_3, GPIO_4, GPIO_5, 293b9ffc18cSHsin-Yi Wang GPIO_6, GPIO_7, GPIO_8, UART0_TXD, UART0_RXD, TOP_2G_CLK, 294b9ffc18cSHsin-Yi Wang TOP_2G_DATA, WF0_2G_HB0, WF0_2G_HB1, WF0_2G_HB2, WF0_2G_HB3, 295b9ffc18cSHsin-Yi Wang WF0_2G_HB4, WF0_2G_HB5, WF0_2G_HB6] 296b9ffc18cSHsin-Yi Wang 297b9ffc18cSHsin-Yi Wang bias-disable: true 298b9ffc18cSHsin-Yi Wang 299b9ffc18cSHsin-Yi Wang bias-pull-up: true 300b9ffc18cSHsin-Yi Wang 301b9ffc18cSHsin-Yi Wang bias-pull-down: true 302b9ffc18cSHsin-Yi Wang 303b9ffc18cSHsin-Yi Wang input-enable: true 304b9ffc18cSHsin-Yi Wang 305b9ffc18cSHsin-Yi Wang input-disable: true 306b9ffc18cSHsin-Yi Wang 307b9ffc18cSHsin-Yi Wang output-enable: true 308b9ffc18cSHsin-Yi Wang 309b9ffc18cSHsin-Yi Wang output-low: true 310b9ffc18cSHsin-Yi Wang 311b9ffc18cSHsin-Yi Wang output-high: true 312b9ffc18cSHsin-Yi Wang 313b9ffc18cSHsin-Yi Wang input-schmitt-enable: true 314b9ffc18cSHsin-Yi Wang 315b9ffc18cSHsin-Yi Wang input-schmitt-disable: true 316b9ffc18cSHsin-Yi Wang 317b9ffc18cSHsin-Yi Wang drive-strength: 318b9ffc18cSHsin-Yi Wang enum: [4, 8, 12, 16] 319b9ffc18cSHsin-Yi Wang 320b9ffc18cSHsin-Yi Wang slew-rate: 321b9ffc18cSHsin-Yi Wang enum: [0, 1] 322b9ffc18cSHsin-Yi Wang 323b9ffc18cSHsin-Yi Wang mediatek,tdsel: 324c911ad22SArınç ÜNAL description: 325b9ffc18cSHsin-Yi Wang An integer describing the steps for output level shifter duty 326b9ffc18cSHsin-Yi Wang cycle when asserted (high pulse width adjustment). Valid arguments 327b9ffc18cSHsin-Yi Wang are from 0 to 15. 328b9ffc18cSHsin-Yi Wang $ref: /schemas/types.yaml#/definitions/uint32 329b9ffc18cSHsin-Yi Wang 330b9ffc18cSHsin-Yi Wang mediatek,rdsel: 331c911ad22SArınç ÜNAL description: 332b9ffc18cSHsin-Yi Wang An integer describing the steps for input level shifter duty cycle 333b9ffc18cSHsin-Yi Wang when asserted (high pulse width adjustment). Valid arguments are 334b9ffc18cSHsin-Yi Wang from 0 to 63. 335b9ffc18cSHsin-Yi Wang $ref: /schemas/types.yaml#/definitions/uint32 336b9ffc18cSHsin-Yi Wang 337b9ffc18cSHsin-Yi Wang required: 338b9ffc18cSHsin-Yi Wang - pins 339b9ffc18cSHsin-Yi Wang 340b9ffc18cSHsin-Yi WangadditionalProperties: false 341b9ffc18cSHsin-Yi Wang 342b9ffc18cSHsin-Yi Wangexamples: 343b9ffc18cSHsin-Yi Wang - | 344b9ffc18cSHsin-Yi Wang #include <dt-bindings/interrupt-controller/irq.h> 345b9ffc18cSHsin-Yi Wang #include <dt-bindings/interrupt-controller/arm-gic.h> 346b9ffc18cSHsin-Yi Wang 347b9ffc18cSHsin-Yi Wang soc { 348b9ffc18cSHsin-Yi Wang #address-cells = <2>; 349b9ffc18cSHsin-Yi Wang #size-cells = <2>; 350b9ffc18cSHsin-Yi Wang 351b9ffc18cSHsin-Yi Wang pio: pinctrl@10211000 { 352b9ffc18cSHsin-Yi Wang compatible = "mediatek,mt7622-pinctrl"; 353b9ffc18cSHsin-Yi Wang reg = <0 0x10211000 0 0x1000>; 354b9ffc18cSHsin-Yi Wang gpio-controller; 355b9ffc18cSHsin-Yi Wang #gpio-cells = <2>; 356b9ffc18cSHsin-Yi Wang 3576c488fbbSRob Herring pinctrl_eth_default: eth-pins { 358b9ffc18cSHsin-Yi Wang mux-mdio { 359b9ffc18cSHsin-Yi Wang groups = "mdc_mdio"; 360b9ffc18cSHsin-Yi Wang function = "eth"; 361b9ffc18cSHsin-Yi Wang drive-strength = <12>; 362b9ffc18cSHsin-Yi Wang }; 363b9ffc18cSHsin-Yi Wang 364b9ffc18cSHsin-Yi Wang mux-gmac2 { 365b9ffc18cSHsin-Yi Wang groups = "rgmii_via_gmac2"; 366b9ffc18cSHsin-Yi Wang function = "eth"; 367b9ffc18cSHsin-Yi Wang drive-strength = <12>; 368b9ffc18cSHsin-Yi Wang }; 369b9ffc18cSHsin-Yi Wang 370b9ffc18cSHsin-Yi Wang mux-esw { 371b9ffc18cSHsin-Yi Wang groups = "esw"; 372b9ffc18cSHsin-Yi Wang function = "eth"; 373b9ffc18cSHsin-Yi Wang drive-strength = <8>; 374b9ffc18cSHsin-Yi Wang }; 375b9ffc18cSHsin-Yi Wang 376b9ffc18cSHsin-Yi Wang conf-mdio { 377b9ffc18cSHsin-Yi Wang pins = "MDC"; 378b9ffc18cSHsin-Yi Wang bias-pull-up; 379b9ffc18cSHsin-Yi Wang }; 380b9ffc18cSHsin-Yi Wang }; 381b9ffc18cSHsin-Yi Wang }; 382b9ffc18cSHsin-Yi Wang }; 383