1b2ea28b8SBernhard Rosenkränzer# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2b2ea28b8SBernhard Rosenkränzer%YAML 1.2 3b2ea28b8SBernhard Rosenkränzer--- 4b2ea28b8SBernhard Rosenkränzer$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8365-pinctrl.yaml# 5b2ea28b8SBernhard Rosenkränzer$schema: http://devicetree.org/meta-schemas/core.yaml# 6b2ea28b8SBernhard Rosenkränzer 7a9d44c4cSArınç ÜNALtitle: MediaTek MT8365 Pin Controller 8b2ea28b8SBernhard Rosenkränzer 9b2ea28b8SBernhard Rosenkränzermaintainers: 10b2ea28b8SBernhard Rosenkränzer - Zhiyong Tao <zhiyong.tao@mediatek.com> 11b2ea28b8SBernhard Rosenkränzer - Bernhard Rosenkränzer <bero@baylibre.com> 12b2ea28b8SBernhard Rosenkränzer 13c911ad22SArınç ÜNALdescription: 14b2ea28b8SBernhard Rosenkränzer The MediaTek's MT8365 Pin controller is used to control SoC pins. 15b2ea28b8SBernhard Rosenkränzer 16b2ea28b8SBernhard Rosenkränzerproperties: 17b2ea28b8SBernhard Rosenkränzer compatible: 18b2ea28b8SBernhard Rosenkränzer const: mediatek,mt8365-pinctrl 19b2ea28b8SBernhard Rosenkränzer 20b2ea28b8SBernhard Rosenkränzer reg: 21b2ea28b8SBernhard Rosenkränzer maxItems: 1 22b2ea28b8SBernhard Rosenkränzer 23b2ea28b8SBernhard Rosenkränzer mediatek,pctl-regmap: 24b2ea28b8SBernhard Rosenkränzer $ref: /schemas/types.yaml#/definitions/phandle-array 25b2ea28b8SBernhard Rosenkränzer items: 26b2ea28b8SBernhard Rosenkränzer maxItems: 1 27b2ea28b8SBernhard Rosenkränzer minItems: 1 28b2ea28b8SBernhard Rosenkränzer maxItems: 2 29c911ad22SArınç ÜNAL description: 30b2ea28b8SBernhard Rosenkränzer Should be phandles of the syscfg node. 31b2ea28b8SBernhard Rosenkränzer 32b2ea28b8SBernhard Rosenkränzer gpio-controller: true 33b2ea28b8SBernhard Rosenkränzer 34b2ea28b8SBernhard Rosenkränzer "#gpio-cells": 35b2ea28b8SBernhard Rosenkränzer const: 2 36c911ad22SArınç ÜNAL description: 37c911ad22SArınç ÜNAL Number of cells in GPIO specifier. Since the generic GPIO binding is used, 38c911ad22SArınç ÜNAL the amount of cells must be specified as 2. See the below mentioned gpio 39c911ad22SArınç ÜNAL binding representation for description of particular cells. 40b2ea28b8SBernhard Rosenkränzer 41b2ea28b8SBernhard Rosenkränzer interrupt-controller: true 42b2ea28b8SBernhard Rosenkränzer 43b2ea28b8SBernhard Rosenkränzer interrupts: 44b2ea28b8SBernhard Rosenkränzer maxItems: 1 45b2ea28b8SBernhard Rosenkränzer 46b2ea28b8SBernhard Rosenkränzer "#interrupt-cells": 47b2ea28b8SBernhard Rosenkränzer const: 2 48b2ea28b8SBernhard Rosenkränzer 49b2ea28b8SBernhard RosenkränzerpatternProperties: 50b2ea28b8SBernhard Rosenkränzer "-pins$": 51b2ea28b8SBernhard Rosenkränzer type: object 52b2ea28b8SBernhard Rosenkränzer additionalProperties: false 53b2ea28b8SBernhard Rosenkränzer patternProperties: 54b2ea28b8SBernhard Rosenkränzer "pins$": 55b2ea28b8SBernhard Rosenkränzer type: object 56b2ea28b8SBernhard Rosenkränzer additionalProperties: false 57c911ad22SArınç ÜNAL description: 58b2ea28b8SBernhard Rosenkränzer A pinctrl node should contain at least one subnode representing the 59b2ea28b8SBernhard Rosenkränzer pinctrl groups available on the machine. Each subnode will list the 60b2ea28b8SBernhard Rosenkränzer pins it needs, and how they should be configured, with regard to muxer 61b2ea28b8SBernhard Rosenkränzer configuration, pullups, drive strength, input enable/disable and input 62b2ea28b8SBernhard Rosenkränzer schmitt. 63b2ea28b8SBernhard Rosenkränzer $ref: /schemas/pinctrl/pincfg-node.yaml 64b2ea28b8SBernhard Rosenkränzer 65b2ea28b8SBernhard Rosenkränzer properties: 66b2ea28b8SBernhard Rosenkränzer pinmux: 67b2ea28b8SBernhard Rosenkränzer description: 68c911ad22SArınç ÜNAL Integer array, represents gpio pin number and mux setting. 69b2ea28b8SBernhard Rosenkränzer Supported pin number and mux varies for different SoCs, and are 70b2ea28b8SBernhard Rosenkränzer defined as macros in <soc>-pinfunc.h directly. 71b2ea28b8SBernhard Rosenkränzer 72b2ea28b8SBernhard Rosenkränzer bias-disable: true 73b2ea28b8SBernhard Rosenkränzer 74b2ea28b8SBernhard Rosenkränzer bias-pull-up: 75e34bdc71SAlexandre Mergnat oneOf: 76e34bdc71SAlexandre Mergnat - type: boolean 77e34bdc71SAlexandre Mergnat - enum: [100, 101, 102, 103] 78e34bdc71SAlexandre Mergnat description: Pull up R1/R0 type define value. 79e34bdc71SAlexandre Mergnat description: | 80e34bdc71SAlexandre Mergnat For pull up type is normal, it don't need add R1/R0 define. 81e34bdc71SAlexandre Mergnat For pull up type is R1/R0 type, it can add value to set different 82e34bdc71SAlexandre Mergnat resistance. Valid arguments are described as below: 83e34bdc71SAlexandre Mergnat 100: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 84e34bdc71SAlexandre Mergnat 101: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 85e34bdc71SAlexandre Mergnat 102: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 86e34bdc71SAlexandre Mergnat 103: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled. 87b2ea28b8SBernhard Rosenkränzer 88e34bdc71SAlexandre Mergnat bias-pull-down: 89e34bdc71SAlexandre Mergnat oneOf: 90e34bdc71SAlexandre Mergnat - type: boolean 91e34bdc71SAlexandre Mergnat - enum: [100, 101, 102, 103] 92e34bdc71SAlexandre Mergnat description: Pull down R1/R0 type define value. 93e34bdc71SAlexandre Mergnat description: | 94e34bdc71SAlexandre Mergnat For pull down type is normal, it don't need add R1/R0 define. 95e34bdc71SAlexandre Mergnat For pull down type is R1/R0 type, it can add value to set 96e34bdc71SAlexandre Mergnat different resistance. Valid arguments are described as below: 97e34bdc71SAlexandre Mergnat 100: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 98e34bdc71SAlexandre Mergnat 101: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 99e34bdc71SAlexandre Mergnat 102: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 100e34bdc71SAlexandre Mergnat 103: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled. 101b2ea28b8SBernhard Rosenkränzer 10229a66a6cSAlexandre Mergnat drive-strength: 10329a66a6cSAlexandre Mergnat enum: [2, 4, 6, 8, 10, 12, 14, 16] 10429a66a6cSAlexandre Mergnat 105b2ea28b8SBernhard Rosenkränzer input-enable: true 106b2ea28b8SBernhard Rosenkränzer 107b2ea28b8SBernhard Rosenkränzer input-disable: true 108b2ea28b8SBernhard Rosenkränzer 109b2ea28b8SBernhard Rosenkränzer output-low: true 110b2ea28b8SBernhard Rosenkränzer 111b2ea28b8SBernhard Rosenkränzer output-high: true 112b2ea28b8SBernhard Rosenkränzer 113b2ea28b8SBernhard Rosenkränzer input-schmitt-enable: true 114b2ea28b8SBernhard Rosenkränzer 115b2ea28b8SBernhard Rosenkränzer input-schmitt-disable: true 116b2ea28b8SBernhard Rosenkränzer 117000602e6SAlexandre Mergnat drive-strength-microamp: 118000602e6SAlexandre Mergnat enum: [125, 250, 500, 1000] 119000602e6SAlexandre Mergnat 120b2ea28b8SBernhard Rosenkränzer mediatek,drive-strength-adv: 121000602e6SAlexandre Mergnat deprecated: true 122b2ea28b8SBernhard Rosenkränzer description: | 123000602e6SAlexandre Mergnat DEPRECATED: Please use drive-strength-microamp instead. 124b2ea28b8SBernhard Rosenkränzer Describe the specific driving setup property. 125b2ea28b8SBernhard Rosenkränzer For I2C pins, the existing generic driving setup can only support 126b2ea28b8SBernhard Rosenkränzer 2/4/6/8/10/12/14/16mA driving. But in specific driving setup, they 127b2ea28b8SBernhard Rosenkränzer can support 0.125/0.25/0.5/1mA adjustment. If we enable specific 128b2ea28b8SBernhard Rosenkränzer driving setup, the existing generic setup will be disabled. 129b2ea28b8SBernhard Rosenkränzer The specific driving setup is controlled by E1E0EN. 130b2ea28b8SBernhard Rosenkränzer When E1=0/E0=0, the strength is 0.125mA. 131b2ea28b8SBernhard Rosenkränzer When E1=0/E0=1, the strength is 0.25mA. 132b2ea28b8SBernhard Rosenkränzer When E1=1/E0=0, the strength is 0.5mA. 133b2ea28b8SBernhard Rosenkränzer When E1=1/E0=1, the strength is 1mA. 134b2ea28b8SBernhard Rosenkränzer EN is used to enable or disable the specific driving setup. 135b2ea28b8SBernhard Rosenkränzer Valid arguments are described as below: 136b2ea28b8SBernhard Rosenkränzer 0: (E1, E0, EN) = (0, 0, 0) 137b2ea28b8SBernhard Rosenkränzer 1: (E1, E0, EN) = (0, 0, 1) 138b2ea28b8SBernhard Rosenkränzer 2: (E1, E0, EN) = (0, 1, 0) 139b2ea28b8SBernhard Rosenkränzer 3: (E1, E0, EN) = (0, 1, 1) 140b2ea28b8SBernhard Rosenkränzer 4: (E1, E0, EN) = (1, 0, 0) 141b2ea28b8SBernhard Rosenkränzer 5: (E1, E0, EN) = (1, 0, 1) 142b2ea28b8SBernhard Rosenkränzer 6: (E1, E0, EN) = (1, 1, 0) 143b2ea28b8SBernhard Rosenkränzer 7: (E1, E0, EN) = (1, 1, 1) 144b2ea28b8SBernhard Rosenkränzer So the valid arguments are from 0 to 7. 145b2ea28b8SBernhard Rosenkränzer $ref: /schemas/types.yaml#/definitions/uint32 146b2ea28b8SBernhard Rosenkränzer enum: [0, 1, 2, 3, 4, 5, 6, 7] 147b2ea28b8SBernhard Rosenkränzer 148b2ea28b8SBernhard Rosenkränzer mediatek,pull-up-adv: 149e34bdc71SAlexandre Mergnat deprecated: true 150b2ea28b8SBernhard Rosenkränzer description: | 151e34bdc71SAlexandre Mergnat DEPRECATED: Please use bias-pull-up instead. 152*47aab533SBjorn Helgaas Pull up settings for 2 pull resistors, R0 and R1. User can 153c911ad22SArınç ÜNAL configure those special pins. Valid arguments are described as 154c911ad22SArınç ÜNAL below: 155b2ea28b8SBernhard Rosenkränzer 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 156b2ea28b8SBernhard Rosenkränzer 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 157b2ea28b8SBernhard Rosenkränzer 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 158b2ea28b8SBernhard Rosenkränzer 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled. 159b2ea28b8SBernhard Rosenkränzer $ref: /schemas/types.yaml#/definitions/uint32 160b2ea28b8SBernhard Rosenkränzer enum: [0, 1, 2, 3] 161b2ea28b8SBernhard Rosenkränzer 162b2ea28b8SBernhard Rosenkränzer mediatek,pull-down-adv: 163e34bdc71SAlexandre Mergnat deprecated: true 164b2ea28b8SBernhard Rosenkränzer description: | 165e34bdc71SAlexandre Mergnat DEPRECATED: Please use bias-pull-down instead. 166b2ea28b8SBernhard Rosenkränzer Pull down settings for 2 pull resistors, R0 and R1. User can 167c911ad22SArınç ÜNAL configure those special pins. Valid arguments are described as 168c911ad22SArınç ÜNAL below: 169b2ea28b8SBernhard Rosenkränzer 0: (R1, R0) = (0, 0) which means R1 disabled and R0 disabled. 170b2ea28b8SBernhard Rosenkränzer 1: (R1, R0) = (0, 1) which means R1 disabled and R0 enabled. 171b2ea28b8SBernhard Rosenkränzer 2: (R1, R0) = (1, 0) which means R1 enabled and R0 disabled. 172b2ea28b8SBernhard Rosenkränzer 3: (R1, R0) = (1, 1) which means R1 enabled and R0 enabled. 173b2ea28b8SBernhard Rosenkränzer $ref: /schemas/types.yaml#/definitions/uint32 174b2ea28b8SBernhard Rosenkränzer enum: [0, 1, 2, 3] 175b2ea28b8SBernhard Rosenkränzer 176b2ea28b8SBernhard Rosenkränzer mediatek,tdsel: 177c911ad22SArınç ÜNAL description: 178b2ea28b8SBernhard Rosenkränzer An integer describing the steps for output level shifter duty 179b2ea28b8SBernhard Rosenkränzer cycle when asserted (high pulse width adjustment). Valid arguments 180b2ea28b8SBernhard Rosenkränzer are from 0 to 15. 181b2ea28b8SBernhard Rosenkränzer $ref: /schemas/types.yaml#/definitions/uint32 182b2ea28b8SBernhard Rosenkränzer 183b2ea28b8SBernhard Rosenkränzer mediatek,rdsel: 184c911ad22SArınç ÜNAL description: 185b2ea28b8SBernhard Rosenkränzer An integer describing the steps for input level shifter duty cycle 186b2ea28b8SBernhard Rosenkränzer when asserted (high pulse width adjustment). Valid arguments are 187b2ea28b8SBernhard Rosenkränzer from 0 to 63. 188b2ea28b8SBernhard Rosenkränzer $ref: /schemas/types.yaml#/definitions/uint32 189b2ea28b8SBernhard Rosenkränzer 190b2ea28b8SBernhard Rosenkränzer required: 191b2ea28b8SBernhard Rosenkränzer - pinmux 192b2ea28b8SBernhard Rosenkränzer 193b2ea28b8SBernhard Rosenkränzerrequired: 194b2ea28b8SBernhard Rosenkränzer - compatible 195b2ea28b8SBernhard Rosenkränzer - reg 196b2ea28b8SBernhard Rosenkränzer - gpio-controller 197b2ea28b8SBernhard Rosenkränzer - "#gpio-cells" 198b2ea28b8SBernhard Rosenkränzer 199b2ea28b8SBernhard RosenkränzerallOf: 200b2ea28b8SBernhard Rosenkränzer - $ref: pinctrl.yaml# 201b2ea28b8SBernhard Rosenkränzer 202b2ea28b8SBernhard RosenkränzeradditionalProperties: false 203b2ea28b8SBernhard Rosenkränzer 204b2ea28b8SBernhard Rosenkränzerexamples: 205b2ea28b8SBernhard Rosenkränzer - | 206b2ea28b8SBernhard Rosenkränzer #include <dt-bindings/interrupt-controller/arm-gic.h> 207b2ea28b8SBernhard Rosenkränzer #include <dt-bindings/pinctrl/mt8365-pinfunc.h> 208b2ea28b8SBernhard Rosenkränzer soc { 209b2ea28b8SBernhard Rosenkränzer #address-cells = <2>; 210b2ea28b8SBernhard Rosenkränzer #size-cells = <2>; 211b2ea28b8SBernhard Rosenkränzer 212b2ea28b8SBernhard Rosenkränzer pio: pinctrl@1000b000 { 213b2ea28b8SBernhard Rosenkränzer compatible = "mediatek,mt8365-pinctrl"; 214b2ea28b8SBernhard Rosenkränzer reg = <0 0x1000b000 0 0x1000>; 215b2ea28b8SBernhard Rosenkränzer mediatek,pctl-regmap = <&syscfg_pctl>; 216b2ea28b8SBernhard Rosenkränzer gpio-controller; 217b2ea28b8SBernhard Rosenkränzer #gpio-cells = <2>; 218b2ea28b8SBernhard Rosenkränzer interrupt-controller; 219b2ea28b8SBernhard Rosenkränzer #interrupt-cells = <2>; 220b2ea28b8SBernhard Rosenkränzer interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; 221b2ea28b8SBernhard Rosenkränzer 222b2ea28b8SBernhard Rosenkränzer pio-pins { 223b2ea28b8SBernhard Rosenkränzer pins { 224b2ea28b8SBernhard Rosenkränzer pinmux = <MT8365_PIN_59_SDA1__FUNC_SDA1_0>, <MT8365_PIN_60_SCL1__FUNC_SCL1_0>; 225b2ea28b8SBernhard Rosenkränzer mediatek,pull-up-adv = <3>; 226b2ea28b8SBernhard Rosenkränzer bias-pull-up; 227b2ea28b8SBernhard Rosenkränzer }; 228b2ea28b8SBernhard Rosenkränzer }; 229b2ea28b8SBernhard Rosenkränzer }; 230b2ea28b8SBernhard Rosenkränzer }; 231