1c9f95cedSSebastian Hesselbarth* Marvell Dove SoC pinctrl driver for mpp 2c9f95cedSSebastian Hesselbarth 3c9f95cedSSebastian HesselbarthPlease refer to marvell,mvebu-pinctrl.txt in this directory for common binding 4c9f95cedSSebastian Hesselbarthpart and usage. 5c9f95cedSSebastian Hesselbarth 6c9f95cedSSebastian HesselbarthRequired properties: 7c9f95cedSSebastian Hesselbarth- compatible: "marvell,dove-pinctrl" 8c9f95cedSSebastian Hesselbarth- clocks: (optional) phandle of pdma clock 9*356ca6ceSSebastian Hesselbarth- reg: register specifiers of MPP, MPP4, and PMU MPP registers 10c9f95cedSSebastian Hesselbarth 11c9f95cedSSebastian HesselbarthAvailable mpp pins/groups and functions: 12c9f95cedSSebastian HesselbarthNote: brackets (x) are not part of the mpp name for marvell,function and given 13c9f95cedSSebastian Hesselbarthonly for more detailed description in this document. 14bbd7b275SSebastian HesselbarthNote: pmu* also allows for Power Management functions listed below 15c9f95cedSSebastian Hesselbarth 16c9f95cedSSebastian Hesselbarthname pins functions 17c9f95cedSSebastian Hesselbarth================================================================================ 18bbd7b275SSebastian Hesselbarthmpp0 0 gpio, pmu, uart2(rts), sdio0(cd), lcd0(pwm), pmu* 19bbd7b275SSebastian Hesselbarthmpp1 1 gpio, pmu, uart2(cts), sdio0(wp), lcd1(pwm), pmu* 20c9f95cedSSebastian Hesselbarthmpp2 2 gpio, pmu, uart2(txd), sdio0(buspwr), sata(prsnt), 21bbd7b275SSebastian Hesselbarth uart1(rts), pmu* 22c9f95cedSSebastian Hesselbarthmpp3 3 gpio, pmu, uart2(rxd), sdio0(ledctrl), sata(act), 23bbd7b275SSebastian Hesselbarth uart1(cts), lcd-spi(cs1), pmu* 24bbd7b275SSebastian Hesselbarthmpp4 4 gpio, pmu, uart3(rts), sdio1(cd), spi1(miso), pmu* 25bbd7b275SSebastian Hesselbarthmpp5 5 gpio, pmu, uart3(cts), sdio1(wp), spi1(cs), pmu* 26bbd7b275SSebastian Hesselbarthmpp6 6 gpio, pmu, uart3(txd), sdio1(buspwr), spi1(mosi), pmu* 27bbd7b275SSebastian Hesselbarthmpp7 7 gpio, pmu, uart3(rxd), sdio1(ledctrl), spi1(sck), pmu* 28bbd7b275SSebastian Hesselbarthmpp8 8 gpio, pmu, watchdog(rstout), pmu* 29bbd7b275SSebastian Hesselbarthmpp9 9 gpio, pmu, pex1(clkreq), pmu* 30bbd7b275SSebastian Hesselbarthmpp10 10 gpio, pmu, ssp(sclk), pmu* 31c9f95cedSSebastian Hesselbarthmpp11 11 gpio, pmu, sata(prsnt), sata-1(act), sdio0(ledctrl), 32bbd7b275SSebastian Hesselbarth sdio1(ledctrl), pex0(clkreq), pmu* 33bbd7b275SSebastian Hesselbarthmpp12 12 gpio, pmu, uart2(rts), audio0(extclk), sdio1(cd), 34bbd7b275SSebastian Hesselbarth sata(act), pmu* 35c9f95cedSSebastian Hesselbarthmpp13 13 gpio, pmu, uart2(cts), audio1(extclk), sdio1(wp), 36bbd7b275SSebastian Hesselbarth ssp(extclk), pmu* 37bbd7b275SSebastian Hesselbarthmpp14 14 gpio, pmu, uart2(txd), sdio1(buspwr), ssp(rxd), pmu* 38bbd7b275SSebastian Hesselbarthmpp15 15 gpio, pmu, uart2(rxd), sdio1(ledctrl), ssp(sfrm), pmu* 39c9f95cedSSebastian Hesselbarthmpp16 16 gpio, uart3(rts), sdio0(cd), ac97(sdi1), lcd-spi(cs1) 40c9f95cedSSebastian Hesselbarthmpp17 17 gpio, uart3(cts), sdio0(wp), ac97(sdi2), twsi(sda), 41c9f95cedSSebastian Hesselbarth ac97-1(sysclko) 42c9f95cedSSebastian Hesselbarthmpp18 18 gpio, uart3(txd), sdio0(buspwr), ac97(sdi3), lcd0(pwm) 43c9f95cedSSebastian Hesselbarthmpp19 19 gpio, uart3(rxd), sdio0(ledctrl), twsi(sck) 44c9f95cedSSebastian Hesselbarthmpp20 20 gpio, sdio0(cd), sdio1(cd), spi1(miso), lcd-spi(miso), 45c9f95cedSSebastian Hesselbarth ac97(sysclko) 46c9f95cedSSebastian Hesselbarthmpp21 21 gpio, sdio0(wp), sdio1(wp), spi1(cs), lcd-spi(cs0), 47c9f95cedSSebastian Hesselbarth uart1(cts), ssp(sfrm) 48c9f95cedSSebastian Hesselbarthmpp22 22 gpio, sdio0(buspwr), sdio1(buspwr), spi1(mosi), 49c9f95cedSSebastian Hesselbarth lcd-spi(mosi), uart1(cts), ssp(txd) 50c9f95cedSSebastian Hesselbarthmpp23 23 gpio, sdio0(ledctrl), sdio1(ledctrl), spi1(sck), 51c9f95cedSSebastian Hesselbarth lcd-spi(sck), ssp(sclk) 52c9f95cedSSebastian Hesselbarthmpp_camera 24-39 gpio, camera 53c9f95cedSSebastian Hesselbarthmpp_sdio0 40-45 gpio, sdio0 54c9f95cedSSebastian Hesselbarthmpp_sdio1 46-51 gpio, sdio1 55c9f95cedSSebastian Hesselbarthmpp_audio1 52-57 gpio, i2s1/spdifo, i2s1, spdifo, twsi, ssp/spdifo, ssp, 56c9f95cedSSebastian Hesselbarth ssp/twsi 57c9f95cedSSebastian Hesselbarthmpp_spi0 58-61 gpio, spi0 58c9f95cedSSebastian Hesselbarthmpp_uart1 62-63 gpio, uart1 59c9f95cedSSebastian Hesselbarthmpp_nand 64-71 gpo, nand 60c9f95cedSSebastian Hesselbarthaudio0 - i2s, ac97 61c9f95cedSSebastian Hesselbarthtwsi - none, opt1, opt2, opt3 62c9f95cedSSebastian Hesselbarth 63bbd7b275SSebastian HesselbarthPower Management functions (pmu*): 64bbd7b275SSebastian Hesselbarthpmu-nc Pin not driven by any PM function 65bbd7b275SSebastian Hesselbarthpmu-low Pin driven low (0) 66bbd7b275SSebastian Hesselbarthpmu-high Pin driven high (1) 67bbd7b275SSebastian Hesselbarthpmic(sdi) Pin is used for PMIC SDI 68bbd7b275SSebastian Hesselbarthcpu-pwr-down Pin is used for CPU_PWRDWN 69bbd7b275SSebastian Hesselbarthstandby-pwr-down Pin is used for STBY_PWRDWN 70bbd7b275SSebastian Hesselbarthcore-pwr-good Pin is used for CORE_PWR_GOOD (Pins 0-7 only) 71bbd7b275SSebastian Hesselbarthcpu-pwr-good Pin is used for CPU_PWR_GOOD (Pins 8-15 only) 72bbd7b275SSebastian Hesselbarthbat-fault Pin is used for BATTERY_FAULT 73bbd7b275SSebastian Hesselbarthext0-wakeup Pin is used for EXT0_WU 74bbd7b275SSebastian Hesselbarthext1-wakeup Pin is used for EXT0_WU 75bbd7b275SSebastian Hesselbarthext2-wakeup Pin is used for EXT0_WU 76bbd7b275SSebastian Hesselbarthpmu-blink Pin is used for blink function 77bbd7b275SSebastian Hesselbarth 78c9f95cedSSebastian HesselbarthNotes: 79c9f95cedSSebastian Hesselbarth* group "mpp_audio1" allows the following functions and gpio pins: 80c9f95cedSSebastian Hesselbarth - gpio : gpio on pins 52-57 81c9f95cedSSebastian Hesselbarth - i2s1/spdifo : audio1 i2s on pins 52-55 and spdifo on 57, no gpios 82c9f95cedSSebastian Hesselbarth - i2s1 : audio1 i2s on pins 52-55, gpio on pins 56,57 83c9f95cedSSebastian Hesselbarth - spdifo : spdifo on pin 57, gpio on pins 52-55 84c9f95cedSSebastian Hesselbarth - twsi : twsi on pins 56,57, gpio on pins 52-55 85c9f95cedSSebastian Hesselbarth - ssp/spdifo : ssp on pins 52-55, spdifo on pin 57, no gpios 86c9f95cedSSebastian Hesselbarth - ssp : ssp on pins 52-55, gpio on pins 56,57 87c9f95cedSSebastian Hesselbarth - ssp/twsi : ssp on pins 52-55, twsi on pins 56,57, no gpios 88c9f95cedSSebastian Hesselbarth* group "audio0" internally muxes i2s0 or ac97 controller to the dedicated 89c9f95cedSSebastian Hesselbarth audio0 pins. 90c9f95cedSSebastian Hesselbarth* group "twsi" internally muxes twsi controller to the dedicated or option pins. 91