1463e270fSThomas Petazzoni* Marvell Armada XP SoC pinctrl driver for mpp 2463e270fSThomas Petazzoni 3463e270fSThomas PetazzoniPlease refer to marvell,mvebu-pinctrl.txt in this directory for common binding 4463e270fSThomas Petazzonipart and usage. 5463e270fSThomas Petazzoni 6463e270fSThomas PetazzoniRequired properties: 7463e270fSThomas Petazzoni- compatible: "marvell,mv78230-pinctrl", "marvell,mv78260-pinctrl", 8463e270fSThomas Petazzoni "marvell,mv78460-pinctrl" 9356ca6ceSSebastian Hesselbarth- reg: register specifier of MPP registers 10463e270fSThomas Petazzoni 11463e270fSThomas PetazzoniThis driver supports all Armada XP variants, i.e. mv78230, mv78260, and mv78460. 12463e270fSThomas Petazzoni 13463e270fSThomas PetazzoniAvailable mpp pins/groups and functions: 14463e270fSThomas PetazzoniNote: brackets (x) are not part of the mpp name for marvell,function and given 15463e270fSThomas Petazzonionly for more detailed description in this document. 16463e270fSThomas Petazzoni 17463e270fSThomas Petazzoni* Marvell Armada XP (all variants) 18463e270fSThomas Petazzoni 19463e270fSThomas Petazzoniname pins functions 20463e270fSThomas Petazzoni================================================================================ 21463e270fSThomas Petazzonimpp0 0 gpio, ge0(txclko), lcd(d0) 22463e270fSThomas Petazzonimpp1 1 gpio, ge0(txd0), lcd(d1) 23463e270fSThomas Petazzonimpp2 2 gpio, ge0(txd1), lcd(d2) 24463e270fSThomas Petazzonimpp3 3 gpio, ge0(txd2), lcd(d3) 25463e270fSThomas Petazzonimpp4 4 gpio, ge0(txd3), lcd(d4) 26463e270fSThomas Petazzonimpp5 5 gpio, ge0(txctl), lcd(d5) 27463e270fSThomas Petazzonimpp6 6 gpio, ge0(rxd0), lcd(d6) 28463e270fSThomas Petazzonimpp7 7 gpio, ge0(rxd1), lcd(d7) 29463e270fSThomas Petazzonimpp8 8 gpio, ge0(rxd2), lcd(d8) 30463e270fSThomas Petazzonimpp9 9 gpio, ge0(rxd3), lcd(d9) 31463e270fSThomas Petazzonimpp10 10 gpio, ge0(rxctl), lcd(d10) 32463e270fSThomas Petazzonimpp11 11 gpio, ge0(rxclk), lcd(d11) 33463e270fSThomas Petazzonimpp12 12 gpio, ge0(txd4), ge1(txd0), lcd(d12) 34463e270fSThomas Petazzonimpp13 13 gpio, ge0(txd5), ge1(txd1), lcd(d13) 35463e270fSThomas Petazzonimpp14 14 gpio, ge0(txd6), ge1(txd2), lcd(d15) 36463e270fSThomas Petazzonimpp15 15 gpio, ge0(txd7), ge1(txd3), lcd(d16) 37463e270fSThomas Petazzonimpp16 16 gpio, ge0(txd7), ge1(txd3), lcd(d16) 38463e270fSThomas Petazzonimpp17 17 gpio, ge0(col), ge1(txctl), lcd(d17) 39463e270fSThomas Petazzonimpp18 18 gpio, ge0(rxerr), ge1(rxd0), lcd(d18), ptp(trig) 40463e270fSThomas Petazzonimpp19 19 gpio, ge0(crs), ge1(rxd1), lcd(d19), ptp(evreq) 41463e270fSThomas Petazzonimpp20 20 gpio, ge0(rxd4), ge1(rxd2), lcd(d20), ptp(clk) 42100dc5d8SThomas Petazzonimpp21 21 gpio, ge0(rxd5), ge1(rxd3), lcd(d21), dram(bat) 43463e270fSThomas Petazzonimpp22 22 gpio, ge0(rxd6), ge1(rxctl), lcd(d22), sata0(prsnt) 44463e270fSThomas Petazzonimpp23 23 gpio, ge0(rxd7), ge1(rxclk), lcd(d23), sata1(prsnt) 45bc99357fSThomas Petazzonimpp24 24 gpio, lcd(hsync), sata1(prsnt), tdm(rst) 46bc99357fSThomas Petazzonimpp25 25 gpio, lcd(vsync), sata0(prsnt), tdm(pclk) 4780b3d04fSThomas Petazzonimpp26 26 gpio, lcd(clk), tdm(fsync) 48463e270fSThomas Petazzonimpp27 27 gpio, lcd(e), tdm(dtx), ptp(trig) 49463e270fSThomas Petazzonimpp28 28 gpio, lcd(pwm), tdm(drx), ptp(evreq) 5080b3d04fSThomas Petazzonimpp29 29 gpio, lcd(ref-clk), tdm(int0), ptp(clk) 51463e270fSThomas Petazzonimpp30 30 gpio, tdm(int1), sd0(clk) 5280b3d04fSThomas Petazzonimpp31 31 gpio, tdm(int2), sd0(cmd) 5380b3d04fSThomas Petazzonimpp32 32 gpio, tdm(int3), sd0(d0) 54100dc5d8SThomas Petazzonimpp33 33 gpio, tdm(int4), sd0(d1), dram(bat) 55463e270fSThomas Petazzonimpp34 34 gpio, tdm(int5), sd0(d2), sata0(prsnt) 56463e270fSThomas Petazzonimpp35 35 gpio, tdm(int6), sd0(d3), sata1(prsnt) 57463e270fSThomas Petazzonimpp36 36 gpio, spi(mosi) 58463e270fSThomas Petazzonimpp37 37 gpio, spi(miso) 59463e270fSThomas Petazzonimpp38 38 gpio, spi(sck) 60463e270fSThomas Petazzonimpp39 39 gpio, spi(cs0) 6180b3d04fSThomas Petazzonimpp40 40 gpio, spi(cs1), uart2(cts), lcd(vga-hsync), pcie(clkreq0) 62463e270fSThomas Petazzonimpp41 41 gpio, spi(cs2), uart2(rts), lcd(vga-vsync), sata1(prsnt), 63463e270fSThomas Petazzoni pcie(clkreq1) 64*dae5597fSThomas Petazzonimpp42 42 gpio, uart2(rxd), uart0(cts), tdm(int7), tdm(timer) 6580b3d04fSThomas Petazzonimpp43 43 gpio, uart2(txd), uart0(rts), spi(cs3), pcie(rstout) 66463e270fSThomas Petazzonimpp44 44 gpio, uart2(cts), uart3(rxd), spi(cs4), pcie(clkreq2), 67100dc5d8SThomas Petazzoni dram(bat) 68463e270fSThomas Petazzonimpp45 45 gpio, uart2(rts), uart3(txd), spi(cs5), sata1(prsnt) 69463e270fSThomas Petazzonimpp46 46 gpio, uart3(rts), uart1(rts), spi(cs6), sata0(prsnt) 70463e270fSThomas Petazzonimpp47 47 gpio, uart3(cts), uart1(cts), spi(cs7), pcie(clkreq3), 71463e270fSThomas Petazzoni ref(clkout) 72ea78b951SThomas Petazzonimpp48 48 gpio, dev(clkout), dev(burst/last) 73463e270fSThomas Petazzoni 74463e270fSThomas Petazzoni* Marvell Armada XP (mv78260 and mv78460 only) 75463e270fSThomas Petazzoni 76463e270fSThomas Petazzoniname pins functions 77463e270fSThomas Petazzoni================================================================================ 78463e270fSThomas Petazzonimpp49 49 gpio, dev(we3) 79463e270fSThomas Petazzonimpp50 50 gpio, dev(we2) 80463e270fSThomas Petazzonimpp51 51 gpio, dev(ad16) 81463e270fSThomas Petazzonimpp52 52 gpio, dev(ad17) 82463e270fSThomas Petazzonimpp53 53 gpio, dev(ad18) 83463e270fSThomas Petazzonimpp54 54 gpio, dev(ad19) 8480b3d04fSThomas Petazzonimpp55 55 gpio, dev(ad20) 8580b3d04fSThomas Petazzonimpp56 56 gpio, dev(ad21) 8680b3d04fSThomas Petazzonimpp57 57 gpio, dev(ad22) 87463e270fSThomas Petazzonimpp58 58 gpio, dev(ad23) 88463e270fSThomas Petazzonimpp59 59 gpio, dev(ad24) 89463e270fSThomas Petazzonimpp60 60 gpio, dev(ad25) 90463e270fSThomas Petazzonimpp61 61 gpio, dev(ad26) 91463e270fSThomas Petazzonimpp62 62 gpio, dev(ad27) 92463e270fSThomas Petazzonimpp63 63 gpio, dev(ad28) 93463e270fSThomas Petazzonimpp64 64 gpio, dev(ad29) 94463e270fSThomas Petazzonimpp65 65 gpio, dev(ad30) 95463e270fSThomas Petazzonimpp66 66 gpio, dev(ad31) 96