xref: /openbmc/linux/Documentation/devicetree/bindings/pinctrl/img,pistachio-pinctrl.txt (revision 552c69b36ebd966186573b9c7a286b390935cce1)
1abbc48e1SAndrew BrestickerImagination Technologies Pistachio SoC pin controllers
2abbc48e1SAndrew Bresticker======================================================
3abbc48e1SAndrew Bresticker
4abbc48e1SAndrew BrestickerThe pin controllers on Pistachio are a combined GPIO controller, (GPIO)
5abbc48e1SAndrew Brestickerinterrupt controller, and pinmux + pinconf device. The system ("east") pin
6abbc48e1SAndrew Brestickercontroller on Pistachio has 99 pins, 90 of which are MFIOs which can be
7abbc48e1SAndrew Brestickerconfigured as GPIOs. The 90 GPIOs are divided into 6 banks of up to 16 GPIOs
8abbc48e1SAndrew Brestickereach. The GPIO banks are represented as sub-nodes of the pad controller node.
9abbc48e1SAndrew Bresticker
10abbc48e1SAndrew BrestickerPlease refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and
11abbc48e1SAndrew Bresticker../interrupt-controller/interrupts.txt for generic information regarding
12abbc48e1SAndrew Brestickerpin controller, GPIO, and interrupt bindings.
13abbc48e1SAndrew Bresticker
14abbc48e1SAndrew BrestickerRequired properties for pin controller node:
15abbc48e1SAndrew Bresticker--------------------------------------------
16abbc48e1SAndrew Bresticker - compatible: "img,pistachio-system-pinctrl".
17abbc48e1SAndrew Bresticker - reg: Address range of the pinctrl registers.
18abbc48e1SAndrew Bresticker
19abbc48e1SAndrew BrestickerRequired properties for GPIO bank sub-nodes:
20abbc48e1SAndrew Bresticker--------------------------------------------
21abbc48e1SAndrew Bresticker - interrupts: Interrupt line for the GPIO bank.
22abbc48e1SAndrew Bresticker - gpio-controller: Indicates the device is a GPIO controller.
23abbc48e1SAndrew Bresticker - #gpio-cells: Must be two. The first cell is the GPIO pin number and the
24abbc48e1SAndrew Bresticker   second cell indicates the polarity. See <dt-bindings/gpio/gpio.h> for
25abbc48e1SAndrew Bresticker   a list of possible values.
26abbc48e1SAndrew Bresticker - interrupt-controller: Indicates the device is an interrupt controller.
27abbc48e1SAndrew Bresticker - #interrupt-cells: Must be two. The first cell is the GPIO pin number and
28abbc48e1SAndrew Bresticker   the second cell encodes the interrupt flags. See
29abbc48e1SAndrew Bresticker   <dt-bindings/interrupt-controller/irq.h> for a list of valid flags.
30abbc48e1SAndrew Bresticker
31abbc48e1SAndrew BrestickerNote that the N GPIO bank sub-nodes *must* be named gpio0, gpio1, ... gpioN-1.
32abbc48e1SAndrew Bresticker
33abbc48e1SAndrew BrestickerRequired properties for pin configuration sub-nodes:
34abbc48e1SAndrew Bresticker----------------------------------------------------
35abbc48e1SAndrew Bresticker - pins: List of pins to which the configuration applies. See below for a
36abbc48e1SAndrew Bresticker   list of possible pins.
37abbc48e1SAndrew Bresticker
38abbc48e1SAndrew BrestickerOptional properties for pin configuration sub-nodes:
39abbc48e1SAndrew Bresticker----------------------------------------------------
40abbc48e1SAndrew Bresticker - function: Mux function for the specified pins. This is not applicable for
41abbc48e1SAndrew Bresticker   non-MFIO pins. See below for a list of valid functions for each pin.
42abbc48e1SAndrew Bresticker - bias-high-impedance: Enable high-impedance mode.
43abbc48e1SAndrew Bresticker - bias-pull-up: Enable weak pull-up.
44abbc48e1SAndrew Bresticker - bias-pull-down: Enable weak pull-down.
45abbc48e1SAndrew Bresticker - bias-bus-hold: Enable bus-keeper mode.
46abbc48e1SAndrew Bresticker - drive-strength: Drive strength in mA. Supported values: 2, 4, 8, 12.
47abbc48e1SAndrew Bresticker - input-schmitt-enable: Enable Schmitt trigger.
48abbc48e1SAndrew Bresticker - input-schmitt-disable: Disable Schmitt trigger.
49abbc48e1SAndrew Bresticker - slew-rate: Slew rate control. 0 for slow, 1 for fast.
50abbc48e1SAndrew Bresticker
51abbc48e1SAndrew BrestickerPin		Functions
52abbc48e1SAndrew Bresticker---		---------
53abbc48e1SAndrew Brestickermfio0		spim1
54abbc48e1SAndrew Brestickermfio1		spim1, spim0, uart1
55abbc48e1SAndrew Brestickermfio2		spim1, spim0, uart1
56abbc48e1SAndrew Brestickermfio3		spim1
57abbc48e1SAndrew Brestickermfio4		spim1
58abbc48e1SAndrew Brestickermfio5		spim1
59abbc48e1SAndrew Brestickermfio6		spim1
60abbc48e1SAndrew Brestickermfio7		spim1
61abbc48e1SAndrew Brestickermfio8		spim0
62abbc48e1SAndrew Brestickermfio9		spim0
63abbc48e1SAndrew Brestickermfio10		spim0
64abbc48e1SAndrew Brestickermfio11		spis
65abbc48e1SAndrew Brestickermfio12		spis
66abbc48e1SAndrew Brestickermfio13		spis
67abbc48e1SAndrew Brestickermfio14		spis
68abbc48e1SAndrew Brestickermfio15		sdhost, mips_trace_clk, mips_trace_data
69abbc48e1SAndrew Brestickermfio16		sdhost, mips_trace_dint, mips_trace_data
70abbc48e1SAndrew Brestickermfio17		sdhost, mips_trace_trigout, mips_trace_data
71abbc48e1SAndrew Brestickermfio18		sdhost, mips_trace_trigin, mips_trace_data
72abbc48e1SAndrew Brestickermfio19		sdhost, mips_trace_dm, mips_trace_data
73abbc48e1SAndrew Brestickermfio20		sdhost, mips_trace_probe_n, mips_trace_data
74abbc48e1SAndrew Brestickermfio21		sdhost, mips_trace_data
75abbc48e1SAndrew Brestickermfio22		sdhost, mips_trace_data
76abbc48e1SAndrew Brestickermfio23		sdhost
77abbc48e1SAndrew Brestickermfio24		sdhost
78abbc48e1SAndrew Brestickermfio25		sdhost
79abbc48e1SAndrew Brestickermfio26		sdhost
80abbc48e1SAndrew Brestickermfio27		sdhost
81abbc48e1SAndrew Brestickermfio28		i2c0, spim0
82abbc48e1SAndrew Brestickermfio29		i2c0, spim0
83abbc48e1SAndrew Brestickermfio30		i2c1, spim0
84abbc48e1SAndrew Brestickermfio31		i2c1, spim1
85abbc48e1SAndrew Brestickermfio32		i2c2
86abbc48e1SAndrew Brestickermfio33		i2c2
87abbc48e1SAndrew Brestickermfio34		i2c3
88abbc48e1SAndrew Brestickermfio35		i2c3
89abbc48e1SAndrew Brestickermfio36		i2s_out, audio_clk_in
90abbc48e1SAndrew Brestickermfio37		i2s_out, debug_raw_cca_ind
91abbc48e1SAndrew Brestickermfio38		i2s_out, debug_ed_sec20_cca_ind
92abbc48e1SAndrew Brestickermfio39		i2s_out, debug_ed_sec40_cca_ind
93abbc48e1SAndrew Brestickermfio40		i2s_out, debug_agc_done_0
94abbc48e1SAndrew Brestickermfio41		i2s_out, debug_agc_done_1
95abbc48e1SAndrew Brestickermfio42		i2s_out, debug_ed_cca_ind
96abbc48e1SAndrew Brestickermfio43		i2s_out, debug_s2l_done
97abbc48e1SAndrew Brestickermfio44		i2s_out
98abbc48e1SAndrew Brestickermfio45		i2s_dac_clk, audio_sync
99abbc48e1SAndrew Brestickermfio46		audio_trigger
100abbc48e1SAndrew Brestickermfio47		i2s_in
101abbc48e1SAndrew Brestickermfio48		i2s_in
102abbc48e1SAndrew Brestickermfio49		i2s_in
103abbc48e1SAndrew Brestickermfio50		i2s_in
104abbc48e1SAndrew Brestickermfio51		i2s_in
105abbc48e1SAndrew Brestickermfio52		i2s_in
106abbc48e1SAndrew Brestickermfio53		i2s_in
107abbc48e1SAndrew Brestickermfio54		i2s_in, spdif_in
108abbc48e1SAndrew Brestickermfio55		uart0, spim0, spim1
109abbc48e1SAndrew Brestickermfio56		uart0, spim0, spim1
110abbc48e1SAndrew Brestickermfio57		uart0, spim0, spim1
111abbc48e1SAndrew Brestickermfio58		uart0, spim1
112abbc48e1SAndrew Brestickermfio59		uart1
113abbc48e1SAndrew Brestickermfio60		uart1
114abbc48e1SAndrew Brestickermfio61		spdif_out
115abbc48e1SAndrew Brestickermfio62		spdif_in
116abbc48e1SAndrew Brestickermfio63		eth, mips_trace_clk, mips_trace_data
117abbc48e1SAndrew Brestickermfio64		eth, mips_trace_dint, mips_trace_data
118abbc48e1SAndrew Brestickermfio65		eth, mips_trace_trigout, mips_trace_data
119abbc48e1SAndrew Brestickermfio66		eth, mips_trace_trigin, mips_trace_data
120abbc48e1SAndrew Brestickermfio67		eth, mips_trace_dm, mips_trace_data
121abbc48e1SAndrew Brestickermfio68		eth, mips_trace_probe_n, mips_trace_data
122abbc48e1SAndrew Brestickermfio69		eth, mips_trace_data
123abbc48e1SAndrew Brestickermfio70		eth, mips_trace_data
124abbc48e1SAndrew Brestickermfio71		eth
125abbc48e1SAndrew Brestickermfio72		ir
126abbc48e1SAndrew Brestickermfio73		pwmpdm, mips_trace_clk, sram_debug
127abbc48e1SAndrew Brestickermfio74		pwmpdm, mips_trace_dint, sram_debug
128abbc48e1SAndrew Brestickermfio75		pwmpdm, mips_trace_trigout, rom_debug
129abbc48e1SAndrew Brestickermfio76		pwmpdm, mips_trace_trigin, rom_debug
130abbc48e1SAndrew Brestickermfio77		mdc_debug, mips_trace_dm, rpu_debug
131abbc48e1SAndrew Brestickermfio78		mdc_debug, mips_trace_probe_n, rpu_debug
132abbc48e1SAndrew Brestickermfio79		ddr_debug, mips_trace_data, mips_debug
133abbc48e1SAndrew Brestickermfio80		ddr_debug, mips_trace_data, mips_debug
134abbc48e1SAndrew Brestickermfio81		dreq0, mips_trace_data, eth_debug
135abbc48e1SAndrew Brestickermfio82		dreq1, mips_trace_data, eth_debug
136abbc48e1SAndrew Brestickermfio83		mips_pll_lock, mips_trace_data, usb_debug
137e9adb336SGovindraj Rajamfio84		audio_pll_lock, mips_trace_data, usb_debug
138e9adb336SGovindraj Rajamfio85		rpu_v_pll_lock, mips_trace_data, sdhost_debug
139e9adb336SGovindraj Rajamfio86		rpu_l_pll_lock, mips_trace_data, sdhost_debug
140e9adb336SGovindraj Rajamfio87		sys_pll_lock, dreq2, socif_debug
141e9adb336SGovindraj Rajamfio88		wifi_pll_lock, dreq3, socif_debug
142e9adb336SGovindraj Rajamfio89		bt_pll_lock, dreq4, dreq5
143abbc48e1SAndrew Brestickertck
144abbc48e1SAndrew Brestickertrstn
145abbc48e1SAndrew Brestickertdi
146abbc48e1SAndrew Brestickertms
147abbc48e1SAndrew Brestickertdo
148abbc48e1SAndrew Brestickerjtag_comply
149abbc48e1SAndrew Brestickersafe_mode
150abbc48e1SAndrew Brestickerpor_disable
151abbc48e1SAndrew Brestickerresetn
152abbc48e1SAndrew Bresticker
153abbc48e1SAndrew BrestickerExample:
154abbc48e1SAndrew Bresticker--------
155*afc3bca4SRob Herringpinctrl@18101c00 {
156abbc48e1SAndrew Bresticker	compatible = "img,pistachio-system-pinctrl";
157abbc48e1SAndrew Bresticker	reg = <0x18101C00 0x400>;
158abbc48e1SAndrew Bresticker
159abbc48e1SAndrew Bresticker	gpio0: gpio0 {
160abbc48e1SAndrew Bresticker		interrupts = <GIC_SHARED 71 IRQ_TYPE_LEVEL_HIGH>;
161abbc48e1SAndrew Bresticker
162abbc48e1SAndrew Bresticker		gpio-controller;
163abbc48e1SAndrew Bresticker		#gpio-cells = <2>;
164abbc48e1SAndrew Bresticker
165abbc48e1SAndrew Bresticker		interrupt-controller;
166abbc48e1SAndrew Bresticker		#interrupt-cells = <2>;
167abbc48e1SAndrew Bresticker	};
168abbc48e1SAndrew Bresticker
169abbc48e1SAndrew Bresticker	...
170abbc48e1SAndrew Bresticker
171abbc48e1SAndrew Bresticker	gpio5: gpio5 {
172abbc48e1SAndrew Bresticker		interrupts = <GIC_SHARED 76 IRQ_TYPE_LEVEL_HIGH>;
173abbc48e1SAndrew Bresticker
174abbc48e1SAndrew Bresticker		gpio-controller;
175abbc48e1SAndrew Bresticker		#gpio-cells = <2>;
176abbc48e1SAndrew Bresticker
177abbc48e1SAndrew Bresticker		interrupt-controller;
178abbc48e1SAndrew Bresticker		#interrupt-cells = <2>;
179abbc48e1SAndrew Bresticker	};
180abbc48e1SAndrew Bresticker
181abbc48e1SAndrew Bresticker	...
182abbc48e1SAndrew Bresticker
183abbc48e1SAndrew Bresticker	uart0_xfer: uart0-xfer {
184abbc48e1SAndrew Bresticker		uart0-rxd {
185abbc48e1SAndrew Bresticker			pins = "mfio55";
186abbc48e1SAndrew Bresticker			function = "uart0";
187abbc48e1SAndrew Bresticker		};
188abbc48e1SAndrew Bresticker		uart0-txd {
189abbc48e1SAndrew Bresticker			pins = "mfio56";
190abbc48e1SAndrew Bresticker			function = "uart0";
191abbc48e1SAndrew Bresticker		};
192abbc48e1SAndrew Bresticker	};
193abbc48e1SAndrew Bresticker
194abbc48e1SAndrew Bresticker	uart0_rts_cts: uart0-rts-cts {
195abbc48e1SAndrew Bresticker		uart0-rts {
196abbc48e1SAndrew Bresticker			  pins = "mfio57";
197abbc48e1SAndrew Bresticker			  function = "uart0";
198abbc48e1SAndrew Bresticker		};
199abbc48e1SAndrew Bresticker		uart0-cts {
200abbc48e1SAndrew Bresticker			  pins = "mfio58";
201abbc48e1SAndrew Bresticker			  function = "uart0";
202abbc48e1SAndrew Bresticker		};
203abbc48e1SAndrew Bresticker	};
204abbc48e1SAndrew Bresticker};
205abbc48e1SAndrew Bresticker
206abbc48e1SAndrew Brestickeruart@... {
207abbc48e1SAndrew Bresticker	...
208abbc48e1SAndrew Bresticker	pinctrl-names = "default";
209abbc48e1SAndrew Bresticker	pinctrl-0 = <&uart0_xfer>, <&uart0_rts_cts>;
210abbc48e1SAndrew Bresticker	...
211abbc48e1SAndrew Bresticker};
212abbc48e1SAndrew Bresticker
213abbc48e1SAndrew Brestickerusb_vbus: fixed-regulator {
214abbc48e1SAndrew Bresticker	...
215abbc48e1SAndrew Bresticker	gpio = <&gpio5 6 GPIO_ACTIVE_HIGH>;
216abbc48e1SAndrew Bresticker	...
217abbc48e1SAndrew Bresticker};
218