193fbd3c0SDong Aisheng* Freescale IMX53 IOMUX Controller 293fbd3c0SDong Aisheng 393fbd3c0SDong AishengPlease refer to fsl,imx-pinctrl.txt in this directory for common binding part 493fbd3c0SDong Aishengand usage. 593fbd3c0SDong Aisheng 693fbd3c0SDong AishengRequired properties: 793fbd3c0SDong Aisheng- compatible: "fsl,imx53-iomuxc" 893fbd3c0SDong Aisheng- fsl,pins: two integers array, represents a group of pins mux and config 993fbd3c0SDong Aisheng setting. The format is fsl,pins = <PIN_FUNC_ID CONFIG>, PIN_FUNC_ID is a 1093fbd3c0SDong Aisheng pin working on a specific function, CONFIG is the pad setting value like 1193fbd3c0SDong Aisheng pull-up for this pin. Please refer to imx53 datasheet for the valid pad 1293fbd3c0SDong Aisheng config settings. 1393fbd3c0SDong Aisheng 1493fbd3c0SDong AishengCONFIG bits definition: 1593fbd3c0SDong AishengPAD_CTL_HVE (1 << 13) 1693fbd3c0SDong AishengPAD_CTL_HYS (1 << 8) 1793fbd3c0SDong AishengPAD_CTL_PKE (1 << 7) 1893fbd3c0SDong AishengPAD_CTL_PUE (1 << 6) 1993fbd3c0SDong AishengPAD_CTL_PUS_100K_DOWN (0 << 4) 2093fbd3c0SDong AishengPAD_CTL_PUS_47K_UP (1 << 4) 2193fbd3c0SDong AishengPAD_CTL_PUS_100K_UP (2 << 4) 2293fbd3c0SDong AishengPAD_CTL_PUS_22K_UP (3 << 4) 2393fbd3c0SDong AishengPAD_CTL_ODE (1 << 3) 2493fbd3c0SDong AishengPAD_CTL_DSE_LOW (0 << 1) 2593fbd3c0SDong AishengPAD_CTL_DSE_MED (1 << 1) 2693fbd3c0SDong AishengPAD_CTL_DSE_HIGH (2 << 1) 2793fbd3c0SDong AishengPAD_CTL_DSE_MAX (3 << 1) 2893fbd3c0SDong AishengPAD_CTL_SRE_FAST (1 << 0) 2993fbd3c0SDong AishengPAD_CTL_SRE_SLOW (0 << 0) 3093fbd3c0SDong Aisheng 31*e1641531SShawn GuoRefer to imx53-pinfunc.h in device tree source folder for all available 32*e1641531SShawn Guoimx53 PIN_FUNC_ID. 33