1*cbc59e26SBaruch SiachConexant Digicolor CX92755 General Purpose Pin Mapping 2*cbc59e26SBaruch Siach 3*cbc59e26SBaruch SiachThis document describes the device tree binding of the pin mapping hardware 4*cbc59e26SBaruch Siachmodules in the Conexant Digicolor CX92755 SoCs. The CX92755 in one of the 5*cbc59e26SBaruch SiachDigicolor series of SoCs. 6*cbc59e26SBaruch Siach 7*cbc59e26SBaruch Siach=== Pin Controller Node === 8*cbc59e26SBaruch Siach 9*cbc59e26SBaruch SiachRequired Properties: 10*cbc59e26SBaruch Siach 11*cbc59e26SBaruch Siach- compatible: Must be "cnxt,cx92755-pinctrl" 12*cbc59e26SBaruch Siach- reg: Base address of the General Purpose Pin Mapping register block and the 13*cbc59e26SBaruch Siach size of the block. 14*cbc59e26SBaruch Siach- gpio-controller: Marks the device node as a GPIO controller. 15*cbc59e26SBaruch Siach- #gpio-cells: Must be <2>. The first cell is the pin number and the 16*cbc59e26SBaruch Siach second cell is used to specify flags. See include/dt-bindings/gpio/gpio.h 17*cbc59e26SBaruch Siach for possible values. 18*cbc59e26SBaruch Siach 19*cbc59e26SBaruch SiachFor example, the following is the bare minimum node: 20*cbc59e26SBaruch Siach 21*cbc59e26SBaruch Siach pinctrl: pinctrl@f0000e20 { 22*cbc59e26SBaruch Siach compatible = "cnxt,cx92755-pinctrl"; 23*cbc59e26SBaruch Siach reg = <0xf0000e20 0x100>; 24*cbc59e26SBaruch Siach gpio-controller; 25*cbc59e26SBaruch Siach #gpio-cells = <2>; 26*cbc59e26SBaruch Siach }; 27*cbc59e26SBaruch Siach 28*cbc59e26SBaruch SiachAs a pin controller device, in addition to the required properties, this node 29*cbc59e26SBaruch Siachshould also contain the pin configuration nodes that client devices reference, 30*cbc59e26SBaruch Siachif any. 31*cbc59e26SBaruch Siach 32*cbc59e26SBaruch SiachFor a general description of GPIO bindings, please refer to ../gpio/gpio.txt. 33*cbc59e26SBaruch Siach 34*cbc59e26SBaruch Siach=== Pin Configuration Node === 35*cbc59e26SBaruch Siach 36*cbc59e26SBaruch SiachEach pin configuration node is a sub-node of the pin controller node and is a 37*cbc59e26SBaruch Siachcontainer of an arbitrary number of subnodes, called pin group nodes in this 38*cbc59e26SBaruch Siachdocument. 39*cbc59e26SBaruch Siach 40*cbc59e26SBaruch SiachPlease refer to the pinctrl-bindings.txt in this directory for details of the 41*cbc59e26SBaruch Siachcommon pinctrl bindings used by client devices, including the definition of a 42*cbc59e26SBaruch Siach"pin configuration node". 43*cbc59e26SBaruch Siach 44*cbc59e26SBaruch Siach=== Pin Group Node === 45*cbc59e26SBaruch Siach 46*cbc59e26SBaruch SiachA pin group node specifies the desired pin mux for an arbitrary number of 47*cbc59e26SBaruch Siachpins. The name of the pin group node is optional and not used. 48*cbc59e26SBaruch Siach 49*cbc59e26SBaruch SiachA pin group node only affects the properties specified in the node, and has no 50*cbc59e26SBaruch Siacheffect on any properties that are omitted. 51*cbc59e26SBaruch Siach 52*cbc59e26SBaruch SiachThe pin group node accepts a subset of the generic pin config properties. For 53*cbc59e26SBaruch Siachdetails generic pin config properties, please refer to pinctrl-bindings.txt 54*cbc59e26SBaruch Siachand <include/linux/pinctrl/pinconfig-generic.h>. 55*cbc59e26SBaruch Siach 56*cbc59e26SBaruch SiachRequired Pin Group Node Properties: 57*cbc59e26SBaruch Siach 58*cbc59e26SBaruch Siach- pins: Multiple strings. Specifies the name(s) of one or more pins to be 59*cbc59e26SBaruch Siach configured by this node. The format of a pin name string is "GP_xy", where x 60*cbc59e26SBaruch Siach is an uppercase character from 'A' to 'R', and y is a digit from 0 to 7. 61*cbc59e26SBaruch Siach- function: String. Specifies the pin mux selection. Values must be one of: 62*cbc59e26SBaruch Siach "gpio", "client_a", "client_b", "client_c" 63*cbc59e26SBaruch Siach 64*cbc59e26SBaruch SiachExample: 65*cbc59e26SBaruch Siach pinctrl: pinctrl@f0000e20 { 66*cbc59e26SBaruch Siach compatible = "cnxt,cx92755-pinctrl"; 67*cbc59e26SBaruch Siach reg = <0xf0000e20 0x100>; 68*cbc59e26SBaruch Siach 69*cbc59e26SBaruch Siach uart0_default: uart0_active { 70*cbc59e26SBaruch Siach data_signals { 71*cbc59e26SBaruch Siach pins = "GP_O0", "GP_O1"; 72*cbc59e26SBaruch Siach function = "client_b"; 73*cbc59e26SBaruch Siach }; 74*cbc59e26SBaruch Siach }; 75*cbc59e26SBaruch Siach }; 76*cbc59e26SBaruch Siach 77*cbc59e26SBaruch Siach uart0: uart@f0000740 { 78*cbc59e26SBaruch Siach compatible = "cnxt,cx92755-usart"; 79*cbc59e26SBaruch Siach ... 80*cbc59e26SBaruch Siach pinctrl-0 = <&uart0_default>; 81*cbc59e26SBaruch Siach pinctrl-names = "default"; 82*cbc59e26SBaruch Siach }; 83*cbc59e26SBaruch Siach 84*cbc59e26SBaruch SiachIn the example above, a single pin group configuration node defines the 85*cbc59e26SBaruch Siach"client select" for the Rx and Tx signals of uart0. The uart0 node references 86*cbc59e26SBaruch Siachthat pin configuration node using the &uart0_default phandle. 87