xref: /openbmc/linux/Documentation/devicetree/bindings/phy/nvidia,tegra186-xusb-padctl.yaml (revision 9a87ffc99ec8eb8d35eed7c4f816d75f5cc9662e)
1*fb1ff013SThierry Reding# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2*fb1ff013SThierry Reding%YAML 1.2
3*fb1ff013SThierry Reding---
4*fb1ff013SThierry Reding$id: http://devicetree.org/schemas/phy/nvidia,tegra186-xusb-padctl.yaml#
5*fb1ff013SThierry Reding$schema: http://devicetree.org/meta-schemas/core.yaml#
6*fb1ff013SThierry Reding
7*fb1ff013SThierry Redingtitle: NVIDIA Tegra186 XUSB pad controller
8*fb1ff013SThierry Reding
9*fb1ff013SThierry Redingmaintainers:
10*fb1ff013SThierry Reding  - Thierry Reding <thierry.reding@gmail.com>
11*fb1ff013SThierry Reding  - Jon Hunter <jonathanh@nvidia.com>
12*fb1ff013SThierry Reding
13*fb1ff013SThierry Redingdescription: |
14*fb1ff013SThierry Reding  The Tegra XUSB pad controller manages a set of I/O lanes (with differential
15*fb1ff013SThierry Reding  signals) which connect directly to pins/pads on the SoC package. Each lane
16*fb1ff013SThierry Reding  is controlled by a HW block referred to as a "pad" in the Tegra hardware
17*fb1ff013SThierry Reding  documentation. Each such "pad" may control either one or multiple lanes,
18*fb1ff013SThierry Reding  and thus contains any logic common to all its lanes. Each lane can be
19*fb1ff013SThierry Reding  separately configured and powered up.
20*fb1ff013SThierry Reding
21*fb1ff013SThierry Reding  Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22*fb1ff013SThierry Reding  super-speed USB. Other lanes are for various types of low-speed, full-speed
23*fb1ff013SThierry Reding  or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24*fb1ff013SThierry Reding  contains a software-configurable mux that sits between the I/O controller
25*fb1ff013SThierry Reding  ports (e.g. PCIe) and the lanes.
26*fb1ff013SThierry Reding
27*fb1ff013SThierry Reding  In addition to per-lane configuration, USB 3.0 ports may require additional
28*fb1ff013SThierry Reding  settings on a per-board basis.
29*fb1ff013SThierry Reding
30*fb1ff013SThierry Reding  Pads will be represented as children of the top-level XUSB pad controller
31*fb1ff013SThierry Reding  device tree node. Each lane exposed by the pad will be represented by its
32*fb1ff013SThierry Reding  own subnode and can be referenced by users of the lane using the standard
33*fb1ff013SThierry Reding  PHY bindings, as described by the phy-bindings.txt file in this directory.
34*fb1ff013SThierry Reding
35*fb1ff013SThierry Reding  The Tegra hardware documentation refers to the connection between the XUSB
36*fb1ff013SThierry Reding  pad controller and the XUSB controller as "ports". This is confusing since
37*fb1ff013SThierry Reding  "port" is typically used to denote the physical USB receptacle. The device
38*fb1ff013SThierry Reding  tree binding in this document uses the term "port" to refer to the logical
39*fb1ff013SThierry Reding  abstraction of the signals that are routed to a USB receptacle (i.e. a PHY
40*fb1ff013SThierry Reding  for the USB signal, the VBUS power supply, the USB 2.0 companion port for
41*fb1ff013SThierry Reding  USB 3.0 receptacles, ...).
42*fb1ff013SThierry Reding
43*fb1ff013SThierry Redingproperties:
44*fb1ff013SThierry Reding  compatible:
45*fb1ff013SThierry Reding    const: nvidia,tegra186-xusb-padctl
46*fb1ff013SThierry Reding
47*fb1ff013SThierry Reding  reg:
48*fb1ff013SThierry Reding    items:
49*fb1ff013SThierry Reding      - description: pad controller registers
50*fb1ff013SThierry Reding      - description: AO registers
51*fb1ff013SThierry Reding
52*fb1ff013SThierry Reding  interrupts:
53*fb1ff013SThierry Reding    items:
54*fb1ff013SThierry Reding      - description: XUSB pad controller interrupt
55*fb1ff013SThierry Reding
56*fb1ff013SThierry Reding  reg-names:
57*fb1ff013SThierry Reding    items:
58*fb1ff013SThierry Reding      - const: padctl
59*fb1ff013SThierry Reding      - const: ao
60*fb1ff013SThierry Reding
61*fb1ff013SThierry Reding  resets:
62*fb1ff013SThierry Reding    items:
63*fb1ff013SThierry Reding      - description: pad controller reset
64*fb1ff013SThierry Reding
65*fb1ff013SThierry Reding  reset-names:
66*fb1ff013SThierry Reding    items:
67*fb1ff013SThierry Reding      - const: padctl
68*fb1ff013SThierry Reding
69*fb1ff013SThierry Reding  avdd-pll-erefeut-supply:
70*fb1ff013SThierry Reding    description: UPHY brick and reference clock as well as UTMI PHY
71*fb1ff013SThierry Reding      power supply. Must supply 1.8 V.
72*fb1ff013SThierry Reding
73*fb1ff013SThierry Reding  avdd-usb-supply:
74*fb1ff013SThierry Reding    description: USB I/Os, VBUS, ID, REXT, D+/D- power supply. Must
75*fb1ff013SThierry Reding      supply 3.3 V.
76*fb1ff013SThierry Reding
77*fb1ff013SThierry Reding  vclamp-usb-supply:
78*fb1ff013SThierry Reding    description: Bias rail for USB pad. Must supply 1.8 V.
79*fb1ff013SThierry Reding
80*fb1ff013SThierry Reding  vddio-hsic-supply:
81*fb1ff013SThierry Reding    description: HSIC PHY power supply. Must supply 1.2 V.
82*fb1ff013SThierry Reding
83*fb1ff013SThierry Reding  pads:
84*fb1ff013SThierry Reding    description: A required child node named "pads" contains a list of
85*fb1ff013SThierry Reding      subnodes, one for each of the pads exposed by the XUSB pad controller.
86*fb1ff013SThierry Reding      Each pad may need additional resources that can be referenced in its
87*fb1ff013SThierry Reding      pad node.
88*fb1ff013SThierry Reding
89*fb1ff013SThierry Reding      The "status" property is used to enable or disable the use of a pad.
90*fb1ff013SThierry Reding      If set to "disabled", the pad will not be used on the given board. In
91*fb1ff013SThierry Reding      order to use the pad and any of its lanes, this property must be set
92*fb1ff013SThierry Reding      to "okay" or be absent.
93*fb1ff013SThierry Reding    type: object
94*fb1ff013SThierry Reding    additionalProperties: false
95*fb1ff013SThierry Reding    properties:
96*fb1ff013SThierry Reding      usb2:
97*fb1ff013SThierry Reding        type: object
98*fb1ff013SThierry Reding        additionalProperties: false
99*fb1ff013SThierry Reding        properties:
100*fb1ff013SThierry Reding          clocks:
101*fb1ff013SThierry Reding            items:
102*fb1ff013SThierry Reding              - description: USB2 tracking clock
103*fb1ff013SThierry Reding
104*fb1ff013SThierry Reding          clock-names:
105*fb1ff013SThierry Reding            items:
106*fb1ff013SThierry Reding              - const: trk
107*fb1ff013SThierry Reding
108*fb1ff013SThierry Reding          lanes:
109*fb1ff013SThierry Reding            type: object
110*fb1ff013SThierry Reding            additionalProperties: false
111*fb1ff013SThierry Reding            properties:
112*fb1ff013SThierry Reding              usb2-0:
113*fb1ff013SThierry Reding                type: object
114*fb1ff013SThierry Reding                additionalProperties: false
115*fb1ff013SThierry Reding                properties:
116*fb1ff013SThierry Reding                  "#phy-cells":
117*fb1ff013SThierry Reding                    const: 0
118*fb1ff013SThierry Reding
119*fb1ff013SThierry Reding                  nvidia,function:
120*fb1ff013SThierry Reding                    description: Function selection for this lane.
121*fb1ff013SThierry Reding                    $ref: /schemas/types.yaml#/definitions/string
122*fb1ff013SThierry Reding                    enum: [ xusb ]
123*fb1ff013SThierry Reding
124*fb1ff013SThierry Reding              usb2-1:
125*fb1ff013SThierry Reding                type: object
126*fb1ff013SThierry Reding                additionalProperties: false
127*fb1ff013SThierry Reding                properties:
128*fb1ff013SThierry Reding                  "#phy-cells":
129*fb1ff013SThierry Reding                    const: 0
130*fb1ff013SThierry Reding
131*fb1ff013SThierry Reding                  nvidia,function:
132*fb1ff013SThierry Reding                    description: Function selection for this lane.
133*fb1ff013SThierry Reding                    $ref: /schemas/types.yaml#/definitions/string
134*fb1ff013SThierry Reding                    enum: [ xusb ]
135*fb1ff013SThierry Reding
136*fb1ff013SThierry Reding              usb2-2:
137*fb1ff013SThierry Reding                type: object
138*fb1ff013SThierry Reding                additionalProperties: false
139*fb1ff013SThierry Reding                properties:
140*fb1ff013SThierry Reding                  "#phy-cells":
141*fb1ff013SThierry Reding                    const: 0
142*fb1ff013SThierry Reding
143*fb1ff013SThierry Reding                  nvidia,function:
144*fb1ff013SThierry Reding                    description: Function selection for this lane.
145*fb1ff013SThierry Reding                    $ref: /schemas/types.yaml#/definitions/string
146*fb1ff013SThierry Reding                    enum: [ xusb ]
147*fb1ff013SThierry Reding
148*fb1ff013SThierry Reding      hsic:
149*fb1ff013SThierry Reding        type: object
150*fb1ff013SThierry Reding        additionalProperties: false
151*fb1ff013SThierry Reding        properties:
152*fb1ff013SThierry Reding          clocks:
153*fb1ff013SThierry Reding            items:
154*fb1ff013SThierry Reding              - description: HSIC tracking clock
155*fb1ff013SThierry Reding
156*fb1ff013SThierry Reding          clock-names:
157*fb1ff013SThierry Reding            items:
158*fb1ff013SThierry Reding              - const: trk
159*fb1ff013SThierry Reding
160*fb1ff013SThierry Reding          lanes:
161*fb1ff013SThierry Reding            type: object
162*fb1ff013SThierry Reding            additionalProperties: false
163*fb1ff013SThierry Reding            properties:
164*fb1ff013SThierry Reding              hsic-0:
165*fb1ff013SThierry Reding                type: object
166*fb1ff013SThierry Reding                additionalProperties: false
167*fb1ff013SThierry Reding                properties:
168*fb1ff013SThierry Reding                  "#phy-cells":
169*fb1ff013SThierry Reding                    const: 0
170*fb1ff013SThierry Reding
171*fb1ff013SThierry Reding                  nvidia,function:
172*fb1ff013SThierry Reding                    description: Function selection for this lane.
173*fb1ff013SThierry Reding                    $ref: /schemas/types.yaml#/definitions/string
174*fb1ff013SThierry Reding                    enum: [ xusb ]
175*fb1ff013SThierry Reding
176*fb1ff013SThierry Reding      usb3:
177*fb1ff013SThierry Reding        type: object
178*fb1ff013SThierry Reding        additionalProperties: false
179*fb1ff013SThierry Reding        properties:
180*fb1ff013SThierry Reding          lanes:
181*fb1ff013SThierry Reding            type: object
182*fb1ff013SThierry Reding            additionalProperties: false
183*fb1ff013SThierry Reding            properties:
184*fb1ff013SThierry Reding              usb3-0:
185*fb1ff013SThierry Reding                type: object
186*fb1ff013SThierry Reding                additionalProperties: false
187*fb1ff013SThierry Reding                properties:
188*fb1ff013SThierry Reding                  "#phy-cells":
189*fb1ff013SThierry Reding                    const: 0
190*fb1ff013SThierry Reding
191*fb1ff013SThierry Reding                  nvidia,function:
192*fb1ff013SThierry Reding                    description: Function selection for this lane.
193*fb1ff013SThierry Reding                    $ref: /schemas/types.yaml#/definitions/string
194*fb1ff013SThierry Reding                    enum: [ xusb ]
195*fb1ff013SThierry Reding
196*fb1ff013SThierry Reding              usb3-1:
197*fb1ff013SThierry Reding                type: object
198*fb1ff013SThierry Reding                additionalProperties: false
199*fb1ff013SThierry Reding                properties:
200*fb1ff013SThierry Reding                  "#phy-cells":
201*fb1ff013SThierry Reding                    const: 0
202*fb1ff013SThierry Reding
203*fb1ff013SThierry Reding                  nvidia,function:
204*fb1ff013SThierry Reding                    description: Function selection for this lane.
205*fb1ff013SThierry Reding                    $ref: /schemas/types.yaml#/definitions/string
206*fb1ff013SThierry Reding                    enum: [ xusb ]
207*fb1ff013SThierry Reding
208*fb1ff013SThierry Reding              usb3-2:
209*fb1ff013SThierry Reding                type: object
210*fb1ff013SThierry Reding                additionalProperties: false
211*fb1ff013SThierry Reding                properties:
212*fb1ff013SThierry Reding                  "#phy-cells":
213*fb1ff013SThierry Reding                    const: 0
214*fb1ff013SThierry Reding
215*fb1ff013SThierry Reding                  nvidia,function:
216*fb1ff013SThierry Reding                    description: Function selection for this lane.
217*fb1ff013SThierry Reding                    $ref: /schemas/types.yaml#/definitions/string
218*fb1ff013SThierry Reding                    enum: [ xusb ]
219*fb1ff013SThierry Reding
220*fb1ff013SThierry Reding  ports:
221*fb1ff013SThierry Reding    description: A required child node named "ports" contains a list of
222*fb1ff013SThierry Reding      subnodes, one for each of the ports exposed by the XUSB pad controller.
223*fb1ff013SThierry Reding      Each port may need additional resources that can be referenced in its
224*fb1ff013SThierry Reding      port node.
225*fb1ff013SThierry Reding
226*fb1ff013SThierry Reding      The "status" property is used to enable or disable the use of a port.
227*fb1ff013SThierry Reding      If set to "disabled", the port will not be used on the given board. In
228*fb1ff013SThierry Reding      order to use the port, this property must be set to "okay".
229*fb1ff013SThierry Reding    type: object
230*fb1ff013SThierry Reding    additionalProperties: false
231*fb1ff013SThierry Reding    properties:
232*fb1ff013SThierry Reding      usb2-0:
233*fb1ff013SThierry Reding        type: object
234*fb1ff013SThierry Reding        additionalProperties: false
235*fb1ff013SThierry Reding        properties:
236*fb1ff013SThierry Reding          # no need to further describe this because the connector will
237*fb1ff013SThierry Reding          # match on gpio-usb-b-connector or usb-b-connector and cause
238*fb1ff013SThierry Reding          # that binding to be selected for the subnode
239*fb1ff013SThierry Reding          connector:
240*fb1ff013SThierry Reding            type: object
241*fb1ff013SThierry Reding
242*fb1ff013SThierry Reding          mode:
243*fb1ff013SThierry Reding            description: A string that determines the mode in which to
244*fb1ff013SThierry Reding              run the port.
245*fb1ff013SThierry Reding            $ref: /schemas/types.yaml#/definitions/string
246*fb1ff013SThierry Reding            enum: [ host, peripheral, otg ]
247*fb1ff013SThierry Reding
248*fb1ff013SThierry Reding          nvidia,internal:
249*fb1ff013SThierry Reding            description: A boolean property whose presence determines
250*fb1ff013SThierry Reding              that a port is internal. In the absence of this property
251*fb1ff013SThierry Reding              the port is considered to be external.
252*fb1ff013SThierry Reding            $ref: /schemas/types.yaml#/definitions/flag
253*fb1ff013SThierry Reding
254*fb1ff013SThierry Reding          usb-role-switch:
255*fb1ff013SThierry Reding            description: |
256*fb1ff013SThierry Reding              A boolean property whole presence indicates that the port
257*fb1ff013SThierry Reding              supports OTG or peripheral mode. If present, the port
258*fb1ff013SThierry Reding              supports switching between USB host and peripheral roles.
259*fb1ff013SThierry Reding              A connector must be added as a subnode in that case.
260*fb1ff013SThierry Reding
261*fb1ff013SThierry Reding              See ../connector/usb-connector.yaml.
262*fb1ff013SThierry Reding
263*fb1ff013SThierry Reding          vbus-supply:
264*fb1ff013SThierry Reding            description: A phandle to the regulator supplying the VBUS
265*fb1ff013SThierry Reding              voltage.
266*fb1ff013SThierry Reding
267*fb1ff013SThierry Reding        dependencies:
268*fb1ff013SThierry Reding          usb-role-switch: [ connector ]
269*fb1ff013SThierry Reding
270*fb1ff013SThierry Reding      usb2-1:
271*fb1ff013SThierry Reding        type: object
272*fb1ff013SThierry Reding        additionalProperties: false
273*fb1ff013SThierry Reding        properties:
274*fb1ff013SThierry Reding          # no need to further describe this because the connector will
275*fb1ff013SThierry Reding          # match on gpio-usb-b-connector or usb-b-connector and cause
276*fb1ff013SThierry Reding          # that binding to be selected for the subnode
277*fb1ff013SThierry Reding          connector:
278*fb1ff013SThierry Reding            type: object
279*fb1ff013SThierry Reding
280*fb1ff013SThierry Reding          mode:
281*fb1ff013SThierry Reding            description: A string that determines the mode in which to
282*fb1ff013SThierry Reding              run the port.
283*fb1ff013SThierry Reding            $ref: /schemas/types.yaml#/definitions/string
284*fb1ff013SThierry Reding            enum: [ host, peripheral, otg ]
285*fb1ff013SThierry Reding
286*fb1ff013SThierry Reding          nvidia,internal:
287*fb1ff013SThierry Reding            description: A boolean property whose presence determines
288*fb1ff013SThierry Reding              that a port is internal. In the absence of this property
289*fb1ff013SThierry Reding              the port is considered to be external.
290*fb1ff013SThierry Reding            $ref: /schemas/types.yaml#/definitions/flag
291*fb1ff013SThierry Reding
292*fb1ff013SThierry Reding          usb-role-switch:
293*fb1ff013SThierry Reding            description: |
294*fb1ff013SThierry Reding              A boolean property whole presence indicates that the port
295*fb1ff013SThierry Reding              supports OTG or peripheral mode. If present, the port
296*fb1ff013SThierry Reding              supports switching between USB host and peripheral roles.
297*fb1ff013SThierry Reding              A connector must be added as a subnode in that case.
298*fb1ff013SThierry Reding
299*fb1ff013SThierry Reding              See ../connector/usb-connector.yaml.
300*fb1ff013SThierry Reding
301*fb1ff013SThierry Reding          vbus-supply:
302*fb1ff013SThierry Reding            description: A phandle to the regulator supplying the VBUS
303*fb1ff013SThierry Reding              voltage.
304*fb1ff013SThierry Reding
305*fb1ff013SThierry Reding        dependencies:
306*fb1ff013SThierry Reding          usb-role-switch: [ connector ]
307*fb1ff013SThierry Reding
308*fb1ff013SThierry Reding      usb2-2:
309*fb1ff013SThierry Reding        type: object
310*fb1ff013SThierry Reding        additionalProperties: false
311*fb1ff013SThierry Reding        properties:
312*fb1ff013SThierry Reding          # no need to further describe this because the connector will
313*fb1ff013SThierry Reding          # match on gpio-usb-b-connector or usb-b-connector and cause
314*fb1ff013SThierry Reding          # that binding to be selected for the subnode
315*fb1ff013SThierry Reding          connector:
316*fb1ff013SThierry Reding            type: object
317*fb1ff013SThierry Reding
318*fb1ff013SThierry Reding          mode:
319*fb1ff013SThierry Reding            description: A string that determines the mode in which to
320*fb1ff013SThierry Reding              run the port.
321*fb1ff013SThierry Reding            $ref: /schemas/types.yaml#/definitions/string
322*fb1ff013SThierry Reding            enum: [ host, peripheral, otg ]
323*fb1ff013SThierry Reding
324*fb1ff013SThierry Reding          nvidia,internal:
325*fb1ff013SThierry Reding            description: A boolean property whose presence determines
326*fb1ff013SThierry Reding              that a port is internal. In the absence of this property
327*fb1ff013SThierry Reding              the port is considered to be external.
328*fb1ff013SThierry Reding            $ref: /schemas/types.yaml#/definitions/flag
329*fb1ff013SThierry Reding
330*fb1ff013SThierry Reding          usb-role-switch:
331*fb1ff013SThierry Reding            description: |
332*fb1ff013SThierry Reding              A boolean property whole presence indicates that the port
333*fb1ff013SThierry Reding              supports OTG or peripheral mode. If present, the port
334*fb1ff013SThierry Reding              supports switching between USB host and peripheral roles.
335*fb1ff013SThierry Reding              A connector must be added as a subnode in that case.
336*fb1ff013SThierry Reding
337*fb1ff013SThierry Reding              See ../connector/usb-connector.yaml.
338*fb1ff013SThierry Reding
339*fb1ff013SThierry Reding          vbus-supply:
340*fb1ff013SThierry Reding            description: A phandle to the regulator supplying the VBUS
341*fb1ff013SThierry Reding              voltage.
342*fb1ff013SThierry Reding
343*fb1ff013SThierry Reding        dependencies:
344*fb1ff013SThierry Reding          usb-role-switch: [ connector ]
345*fb1ff013SThierry Reding
346*fb1ff013SThierry Reding      hsic-0:
347*fb1ff013SThierry Reding        type: object
348*fb1ff013SThierry Reding        additionalProperties: false
349*fb1ff013SThierry Reding
350*fb1ff013SThierry Reding      usb3-0:
351*fb1ff013SThierry Reding        type: object
352*fb1ff013SThierry Reding        additionalProperties: false
353*fb1ff013SThierry Reding        properties:
354*fb1ff013SThierry Reding          nvidia,internal:
355*fb1ff013SThierry Reding            description: A boolean property whose presence determines
356*fb1ff013SThierry Reding              that a port is internal. In the absence of this property
357*fb1ff013SThierry Reding              the port is considered to be external.
358*fb1ff013SThierry Reding            $ref: /schemas/types.yaml#/definitions/flag
359*fb1ff013SThierry Reding
360*fb1ff013SThierry Reding          nvidia,usb2-companion:
361*fb1ff013SThierry Reding            description: A single cell that specifies the physical port
362*fb1ff013SThierry Reding              number to map this super-speed USB port to. The range of
363*fb1ff013SThierry Reding              valid port numbers varies with the SoC generation.
364*fb1ff013SThierry Reding            $ref: /schemas/types.yaml#/definitions/uint32
365*fb1ff013SThierry Reding            enum: [ 0, 1, 2, 3 ]
366*fb1ff013SThierry Reding
367*fb1ff013SThierry Reding          vbus-supply:
368*fb1ff013SThierry Reding            description: A phandle to the regulator supplying the VBUS
369*fb1ff013SThierry Reding              voltage.
370*fb1ff013SThierry Reding
371*fb1ff013SThierry Reding      usb3-1:
372*fb1ff013SThierry Reding        type: object
373*fb1ff013SThierry Reding        additionalProperties: false
374*fb1ff013SThierry Reding        properties:
375*fb1ff013SThierry Reding          nvidia,internal:
376*fb1ff013SThierry Reding            description: A boolean property whose presence determines
377*fb1ff013SThierry Reding              that a port is internal. In the absence of this property
378*fb1ff013SThierry Reding              the port is considered to be external.
379*fb1ff013SThierry Reding            $ref: /schemas/types.yaml#/definitions/flag
380*fb1ff013SThierry Reding
381*fb1ff013SThierry Reding          nvidia,usb2-companion:
382*fb1ff013SThierry Reding            description: A single cell that specifies the physical port
383*fb1ff013SThierry Reding              number to map this super-speed USB port to. The range of
384*fb1ff013SThierry Reding              valid port numbers varies with the SoC generation.
385*fb1ff013SThierry Reding            $ref: /schemas/types.yaml#/definitions/uint32
386*fb1ff013SThierry Reding            enum: [ 0, 1, 2, 3 ]
387*fb1ff013SThierry Reding
388*fb1ff013SThierry Reding          vbus-supply:
389*fb1ff013SThierry Reding            description: A phandle to the regulator supplying the VBUS
390*fb1ff013SThierry Reding              voltage.
391*fb1ff013SThierry Reding
392*fb1ff013SThierry Reding      usb3-2:
393*fb1ff013SThierry Reding        type: object
394*fb1ff013SThierry Reding        additionalProperties: false
395*fb1ff013SThierry Reding        properties:
396*fb1ff013SThierry Reding          nvidia,internal:
397*fb1ff013SThierry Reding            description: A boolean property whose presence determines
398*fb1ff013SThierry Reding              that a port is internal. In the absence of this property
399*fb1ff013SThierry Reding              the port is considered to be external.
400*fb1ff013SThierry Reding            $ref: /schemas/types.yaml#/definitions/flag
401*fb1ff013SThierry Reding
402*fb1ff013SThierry Reding          nvidia,usb2-companion:
403*fb1ff013SThierry Reding            description: A single cell that specifies the physical port
404*fb1ff013SThierry Reding              number to map this super-speed USB port to. The range of
405*fb1ff013SThierry Reding              valid port numbers varies with the SoC generation.
406*fb1ff013SThierry Reding            $ref: /schemas/types.yaml#/definitions/uint32
407*fb1ff013SThierry Reding            enum: [ 0, 1, 2, 3 ]
408*fb1ff013SThierry Reding
409*fb1ff013SThierry Reding          vbus-supply:
410*fb1ff013SThierry Reding            description: A phandle to the regulator supplying the VBUS
411*fb1ff013SThierry Reding              voltage.
412*fb1ff013SThierry Reding
413*fb1ff013SThierry RedingadditionalProperties: false
414*fb1ff013SThierry Reding
415*fb1ff013SThierry Redingrequired:
416*fb1ff013SThierry Reding  - compatible
417*fb1ff013SThierry Reding  - reg
418*fb1ff013SThierry Reding  - resets
419*fb1ff013SThierry Reding  - reset-names
420*fb1ff013SThierry Reding  - avdd-pll-erefeut-supply
421*fb1ff013SThierry Reding  - avdd-usb-supply
422*fb1ff013SThierry Reding  - vclamp-usb-supply
423*fb1ff013SThierry Reding  - vddio-hsic-supply
424*fb1ff013SThierry Reding
425*fb1ff013SThierry Redingexamples:
426*fb1ff013SThierry Reding  - |
427*fb1ff013SThierry Reding    #include <dt-bindings/clock/tegra186-clock.h>
428*fb1ff013SThierry Reding    #include <dt-bindings/gpio/tegra186-gpio.h>
429*fb1ff013SThierry Reding    #include <dt-bindings/interrupt-controller/arm-gic.h>
430*fb1ff013SThierry Reding    #include <dt-bindings/reset/tegra186-reset.h>
431*fb1ff013SThierry Reding
432*fb1ff013SThierry Reding    padctl@3520000 {
433*fb1ff013SThierry Reding        compatible = "nvidia,tegra186-xusb-padctl";
434*fb1ff013SThierry Reding        reg = <0x03520000 0x1000>,
435*fb1ff013SThierry Reding              <0x03540000 0x1000>;
436*fb1ff013SThierry Reding        reg-names = "padctl", "ao";
437*fb1ff013SThierry Reding        interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
438*fb1ff013SThierry Reding
439*fb1ff013SThierry Reding        resets = <&bpmp TEGRA186_RESET_XUSB_PADCTL>;
440*fb1ff013SThierry Reding        reset-names = "padctl";
441*fb1ff013SThierry Reding
442*fb1ff013SThierry Reding        avdd-pll-erefeut-supply = <&vdd_1v8_pll>;
443*fb1ff013SThierry Reding        avdd-usb-supply = <&vdd_3v3_sys>;
444*fb1ff013SThierry Reding        vclamp-usb-supply = <&vdd_1v8>;
445*fb1ff013SThierry Reding        vddio-hsic-supply = <&gnd>;
446*fb1ff013SThierry Reding
447*fb1ff013SThierry Reding        pads {
448*fb1ff013SThierry Reding            usb2 {
449*fb1ff013SThierry Reding                clocks = <&bpmp TEGRA186_CLK_USB2_TRK>;
450*fb1ff013SThierry Reding                clock-names = "trk";
451*fb1ff013SThierry Reding
452*fb1ff013SThierry Reding                lanes {
453*fb1ff013SThierry Reding                    usb2-0 {
454*fb1ff013SThierry Reding                        nvidia,function = "xusb";
455*fb1ff013SThierry Reding                        #phy-cells = <0>;
456*fb1ff013SThierry Reding                    };
457*fb1ff013SThierry Reding
458*fb1ff013SThierry Reding                    usb2-1 {
459*fb1ff013SThierry Reding                        nvidia,function = "xusb";
460*fb1ff013SThierry Reding                        #phy-cells = <0>;
461*fb1ff013SThierry Reding                    };
462*fb1ff013SThierry Reding
463*fb1ff013SThierry Reding                    usb2-2 {
464*fb1ff013SThierry Reding                        nvidia,function = "xusb";
465*fb1ff013SThierry Reding                        #phy-cells = <0>;
466*fb1ff013SThierry Reding                    };
467*fb1ff013SThierry Reding                };
468*fb1ff013SThierry Reding            };
469*fb1ff013SThierry Reding
470*fb1ff013SThierry Reding            hsic {
471*fb1ff013SThierry Reding                clocks = <&bpmp TEGRA186_CLK_HSIC_TRK>;
472*fb1ff013SThierry Reding                clock-names = "trk";
473*fb1ff013SThierry Reding                status = "disabled";
474*fb1ff013SThierry Reding
475*fb1ff013SThierry Reding                lanes {
476*fb1ff013SThierry Reding                    hsic-0 {
477*fb1ff013SThierry Reding                        status = "disabled";
478*fb1ff013SThierry Reding                        #phy-cells = <0>;
479*fb1ff013SThierry Reding                    };
480*fb1ff013SThierry Reding                };
481*fb1ff013SThierry Reding            };
482*fb1ff013SThierry Reding
483*fb1ff013SThierry Reding            usb3 {
484*fb1ff013SThierry Reding                lanes {
485*fb1ff013SThierry Reding                    usb3-0 {
486*fb1ff013SThierry Reding                        nvidia,function = "xusb";
487*fb1ff013SThierry Reding                        #phy-cells = <0>;
488*fb1ff013SThierry Reding                    };
489*fb1ff013SThierry Reding
490*fb1ff013SThierry Reding                    usb3-1 {
491*fb1ff013SThierry Reding                        nvidia,function = "xusb";
492*fb1ff013SThierry Reding                        #phy-cells = <0>;
493*fb1ff013SThierry Reding                    };
494*fb1ff013SThierry Reding
495*fb1ff013SThierry Reding                    usb3-2 {
496*fb1ff013SThierry Reding                        nvidia,function = "xusb";
497*fb1ff013SThierry Reding                        #phy-cells = <0>;
498*fb1ff013SThierry Reding                    };
499*fb1ff013SThierry Reding                };
500*fb1ff013SThierry Reding            };
501*fb1ff013SThierry Reding        };
502*fb1ff013SThierry Reding
503*fb1ff013SThierry Reding        ports {
504*fb1ff013SThierry Reding            usb2-0 {
505*fb1ff013SThierry Reding                mode = "otg";
506*fb1ff013SThierry Reding                vbus-supply = <&vdd_usb0>;
507*fb1ff013SThierry Reding                usb-role-switch;
508*fb1ff013SThierry Reding
509*fb1ff013SThierry Reding                connector {
510*fb1ff013SThierry Reding                    compatible = "gpio-usb-b-connector",
511*fb1ff013SThierry Reding                                 "usb-b-connector";
512*fb1ff013SThierry Reding                    label = "micro-USB";
513*fb1ff013SThierry Reding                    type = "micro";
514*fb1ff013SThierry Reding                    vbus-gpios = <&gpio TEGRA186_MAIN_GPIO(X, 7) GPIO_ACTIVE_LOW>;
515*fb1ff013SThierry Reding                    id-gpios = <&pmic 0 GPIO_ACTIVE_HIGH>;
516*fb1ff013SThierry Reding                };
517*fb1ff013SThierry Reding            };
518*fb1ff013SThierry Reding
519*fb1ff013SThierry Reding            usb2-1 {
520*fb1ff013SThierry Reding                vbus-supply = <&vdd_usb1>;
521*fb1ff013SThierry Reding                mode = "host";
522*fb1ff013SThierry Reding            };
523*fb1ff013SThierry Reding
524*fb1ff013SThierry Reding            usb2-2 {
525*fb1ff013SThierry Reding                status = "disabled";
526*fb1ff013SThierry Reding            };
527*fb1ff013SThierry Reding
528*fb1ff013SThierry Reding            hsic-0 {
529*fb1ff013SThierry Reding                status = "disabled";
530*fb1ff013SThierry Reding            };
531*fb1ff013SThierry Reding
532*fb1ff013SThierry Reding            usb3-0 {
533*fb1ff013SThierry Reding                nvidia,usb2-companion = <1>;
534*fb1ff013SThierry Reding            };
535*fb1ff013SThierry Reding
536*fb1ff013SThierry Reding            usb3-1 {
537*fb1ff013SThierry Reding                status = "disabled";
538*fb1ff013SThierry Reding            };
539*fb1ff013SThierry Reding
540*fb1ff013SThierry Reding            usb3-2 {
541*fb1ff013SThierry Reding                status = "disabled";
542*fb1ff013SThierry Reding            };
543*fb1ff013SThierry Reding        };
544*fb1ff013SThierry Reding    };
545