xref: /openbmc/linux/Documentation/devicetree/bindings/phy/nvidia,tegra124-xusb-padctl.yaml (revision 9a87ffc99ec8eb8d35eed7c4f816d75f5cc9662e)
1*fb1ff013SThierry Reding# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
2*fb1ff013SThierry Reding%YAML 1.2
3*fb1ff013SThierry Reding---
4*fb1ff013SThierry Reding$id: http://devicetree.org/schemas/phy/nvidia,tegra124-xusb-padctl.yaml#
5*fb1ff013SThierry Reding$schema: http://devicetree.org/meta-schemas/core.yaml#
6*fb1ff013SThierry Reding
7*fb1ff013SThierry Redingtitle: NVIDIA Tegra124 XUSB pad controller
8*fb1ff013SThierry Reding
9*fb1ff013SThierry Redingmaintainers:
10*fb1ff013SThierry Reding  - Thierry Reding <thierry.reding@gmail.com>
11*fb1ff013SThierry Reding  - Jon Hunter <jonathanh@nvidia.com>
12*fb1ff013SThierry Reding
13*fb1ff013SThierry Redingdescription: |
14*fb1ff013SThierry Reding  The Tegra XUSB pad controller manages a set of I/O lanes (with differential
15*fb1ff013SThierry Reding  signals) which connect directly to pins/pads on the SoC package. Each lane
16*fb1ff013SThierry Reding  is controlled by a HW block referred to as a "pad" in the Tegra hardware
17*fb1ff013SThierry Reding  documentation. Each such "pad" may control either one or multiple lanes,
18*fb1ff013SThierry Reding  and thus contains any logic common to all its lanes. Each lane can be
19*fb1ff013SThierry Reding  separately configured and powered up.
20*fb1ff013SThierry Reding
21*fb1ff013SThierry Reding  Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
22*fb1ff013SThierry Reding  super-speed USB. Other lanes are for various types of low-speed, full-speed
23*fb1ff013SThierry Reding  or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
24*fb1ff013SThierry Reding  contains a software-configurable mux that sits between the I/O controller
25*fb1ff013SThierry Reding  ports (e.g. PCIe) and the lanes.
26*fb1ff013SThierry Reding
27*fb1ff013SThierry Reding  In addition to per-lane configuration, USB 3.0 ports may require additional
28*fb1ff013SThierry Reding  settings on a per-board basis.
29*fb1ff013SThierry Reding
30*fb1ff013SThierry Reding  Pads will be represented as children of the top-level XUSB pad controller
31*fb1ff013SThierry Reding  device tree node. Each lane exposed by the pad will be represented by its
32*fb1ff013SThierry Reding  own subnode and can be referenced by users of the lane using the standard
33*fb1ff013SThierry Reding  PHY bindings, as described by the phy-bindings.txt file in this directory.
34*fb1ff013SThierry Reding
35*fb1ff013SThierry Reding  The Tegra hardware documentation refers to the connection between the XUSB
36*fb1ff013SThierry Reding  pad controller and the XUSB controller as "ports". This is confusing since
37*fb1ff013SThierry Reding  "port" is typically used to denote the physical USB receptacle. The device
38*fb1ff013SThierry Reding  tree binding in this document uses the term "port" to refer to the logical
39*fb1ff013SThierry Reding  abstraction of the signals that are routed to a USB receptacle (i.e. a PHY
40*fb1ff013SThierry Reding  for the USB signal, the VBUS power supply, the USB 2.0 companion port for
41*fb1ff013SThierry Reding  USB 3.0 receptacles, ...).
42*fb1ff013SThierry Reding
43*fb1ff013SThierry Redingproperties:
44*fb1ff013SThierry Reding  compatible:
45*fb1ff013SThierry Reding    oneOf:
46*fb1ff013SThierry Reding      - enum:
47*fb1ff013SThierry Reding          - nvidia,tegra124-xusb-padctl
48*fb1ff013SThierry Reding
49*fb1ff013SThierry Reding      - items:
50*fb1ff013SThierry Reding          - const: nvidia,tegra132-xusb-padctl
51*fb1ff013SThierry Reding          - const: nvidia,tegra124-xusb-padctl
52*fb1ff013SThierry Reding
53*fb1ff013SThierry Reding  reg:
54*fb1ff013SThierry Reding    maxItems: 1
55*fb1ff013SThierry Reding
56*fb1ff013SThierry Reding  interrupts:
57*fb1ff013SThierry Reding    items:
58*fb1ff013SThierry Reding      - description: XUSB pad controller interrupt
59*fb1ff013SThierry Reding
60*fb1ff013SThierry Reding  resets:
61*fb1ff013SThierry Reding    items:
62*fb1ff013SThierry Reding      - description: pad controller reset
63*fb1ff013SThierry Reding
64*fb1ff013SThierry Reding  reset-names:
65*fb1ff013SThierry Reding    items:
66*fb1ff013SThierry Reding      - const: padctl
67*fb1ff013SThierry Reding
68*fb1ff013SThierry Reding  avdd-pll-utmip-supply:
69*fb1ff013SThierry Reding    description: UTMI PLL power supply. Must supply 1.8 V.
70*fb1ff013SThierry Reding
71*fb1ff013SThierry Reding  avdd-pll-erefe-supply:
72*fb1ff013SThierry Reding    description: PLLE reference PLL power supply. Must supply 1.05 V.
73*fb1ff013SThierry Reding
74*fb1ff013SThierry Reding  avdd-pex-pll-supply:
75*fb1ff013SThierry Reding    description: PCIe/USB3 PLL power supply. Must supply 1.05 V.
76*fb1ff013SThierry Reding
77*fb1ff013SThierry Reding  hvdd-pex-pll-e-supply:
78*fb1ff013SThierry Reding    description: High-voltage PLLE power supply. Must supply 3.3 V.
79*fb1ff013SThierry Reding
80*fb1ff013SThierry Reding  pads:
81*fb1ff013SThierry Reding    description: A required child node named "pads" contains a list of
82*fb1ff013SThierry Reding      subnodes, one for each of the pads exposed by the XUSB pad controller.
83*fb1ff013SThierry Reding      Each pad may need additional resources that can be referenced in its
84*fb1ff013SThierry Reding      pad node.
85*fb1ff013SThierry Reding
86*fb1ff013SThierry Reding      The "status" property is used to enable or disable the use of a pad.
87*fb1ff013SThierry Reding      If set to "disabled", the pad will not be used on the given board. In
88*fb1ff013SThierry Reding      order to use the pad and any of its lanes, this property must be set
89*fb1ff013SThierry Reding      to "okay" or be absent.
90*fb1ff013SThierry Reding    type: object
91*fb1ff013SThierry Reding    additionalProperties: false
92*fb1ff013SThierry Reding    properties:
93*fb1ff013SThierry Reding      usb2:
94*fb1ff013SThierry Reding        type: object
95*fb1ff013SThierry Reding        additionalProperties: false
96*fb1ff013SThierry Reding        properties:
97*fb1ff013SThierry Reding          clocks:
98*fb1ff013SThierry Reding            items:
99*fb1ff013SThierry Reding              - description: USB2 tracking clock
100*fb1ff013SThierry Reding
101*fb1ff013SThierry Reding          clock-names:
102*fb1ff013SThierry Reding            items:
103*fb1ff013SThierry Reding              - const: trk
104*fb1ff013SThierry Reding
105*fb1ff013SThierry Reding          lanes:
106*fb1ff013SThierry Reding            type: object
107*fb1ff013SThierry Reding            additionalProperties: false
108*fb1ff013SThierry Reding            properties:
109*fb1ff013SThierry Reding              usb2-0:
110*fb1ff013SThierry Reding                type: object
111*fb1ff013SThierry Reding                additionalProperties: false
112*fb1ff013SThierry Reding                properties:
113*fb1ff013SThierry Reding                  "#phy-cells":
114*fb1ff013SThierry Reding                    const: 0
115*fb1ff013SThierry Reding
116*fb1ff013SThierry Reding                  nvidia,function:
117*fb1ff013SThierry Reding                    description: Function selection for this lane.
118*fb1ff013SThierry Reding                    $ref: /schemas/types.yaml#/definitions/string
119*fb1ff013SThierry Reding                    enum: [ snps, xusb, uart ]
120*fb1ff013SThierry Reding
121*fb1ff013SThierry Reding              usb2-1:
122*fb1ff013SThierry Reding                type: object
123*fb1ff013SThierry Reding                additionalProperties: false
124*fb1ff013SThierry Reding                properties:
125*fb1ff013SThierry Reding                  "#phy-cells":
126*fb1ff013SThierry Reding                    const: 0
127*fb1ff013SThierry Reding
128*fb1ff013SThierry Reding                  nvidia,function:
129*fb1ff013SThierry Reding                    description: Function selection for this lane.
130*fb1ff013SThierry Reding                    $ref: /schemas/types.yaml#/definitions/string
131*fb1ff013SThierry Reding                    enum: [ snps, xusb, uart ]
132*fb1ff013SThierry Reding
133*fb1ff013SThierry Reding              usb2-2:
134*fb1ff013SThierry Reding                type: object
135*fb1ff013SThierry Reding                additionalProperties: false
136*fb1ff013SThierry Reding                properties:
137*fb1ff013SThierry Reding                  "#phy-cells":
138*fb1ff013SThierry Reding                    const: 0
139*fb1ff013SThierry Reding
140*fb1ff013SThierry Reding                  nvidia,function:
141*fb1ff013SThierry Reding                    description: Function selection for this lane.
142*fb1ff013SThierry Reding                    $ref: /schemas/types.yaml#/definitions/string
143*fb1ff013SThierry Reding                    enum: [ snps, xusb, uart ]
144*fb1ff013SThierry Reding
145*fb1ff013SThierry Reding      ulpi:
146*fb1ff013SThierry Reding        type: object
147*fb1ff013SThierry Reding        additionalProperties: false
148*fb1ff013SThierry Reding        properties:
149*fb1ff013SThierry Reding          lanes:
150*fb1ff013SThierry Reding            type: object
151*fb1ff013SThierry Reding            additionalProperties: false
152*fb1ff013SThierry Reding            properties:
153*fb1ff013SThierry Reding              ulpi-0:
154*fb1ff013SThierry Reding                type: object
155*fb1ff013SThierry Reding                additionalProperties: false
156*fb1ff013SThierry Reding                properties:
157*fb1ff013SThierry Reding                  "#phy-cells":
158*fb1ff013SThierry Reding                    const: 0
159*fb1ff013SThierry Reding
160*fb1ff013SThierry Reding                  nvidia,function:
161*fb1ff013SThierry Reding                    description: Function selection for this lane.
162*fb1ff013SThierry Reding                    $ref: /schemas/types.yaml#/definitions/string
163*fb1ff013SThierry Reding                    enum: [ snps, xusb ]
164*fb1ff013SThierry Reding
165*fb1ff013SThierry Reding      hsic:
166*fb1ff013SThierry Reding        type: object
167*fb1ff013SThierry Reding        additionalProperties: false
168*fb1ff013SThierry Reding        properties:
169*fb1ff013SThierry Reding          clocks:
170*fb1ff013SThierry Reding            items:
171*fb1ff013SThierry Reding              - description: HSIC tracking clock
172*fb1ff013SThierry Reding
173*fb1ff013SThierry Reding          clock-names:
174*fb1ff013SThierry Reding            items:
175*fb1ff013SThierry Reding              - const: trk
176*fb1ff013SThierry Reding
177*fb1ff013SThierry Reding          lanes:
178*fb1ff013SThierry Reding            type: object
179*fb1ff013SThierry Reding            additionalProperties: false
180*fb1ff013SThierry Reding            properties:
181*fb1ff013SThierry Reding              hsic-0:
182*fb1ff013SThierry Reding                type: object
183*fb1ff013SThierry Reding                additionalProperties: false
184*fb1ff013SThierry Reding                properties:
185*fb1ff013SThierry Reding                  "#phy-cells":
186*fb1ff013SThierry Reding                    const: 0
187*fb1ff013SThierry Reding
188*fb1ff013SThierry Reding                  nvidia,function:
189*fb1ff013SThierry Reding                    description: Function selection for this lane.
190*fb1ff013SThierry Reding                    $ref: /schemas/types.yaml#/definitions/string
191*fb1ff013SThierry Reding                    enum: [ snps, xusb ]
192*fb1ff013SThierry Reding
193*fb1ff013SThierry Reding              hsic-1:
194*fb1ff013SThierry Reding                type: object
195*fb1ff013SThierry Reding                additionalProperties: false
196*fb1ff013SThierry Reding                properties:
197*fb1ff013SThierry Reding                  "#phy-cells":
198*fb1ff013SThierry Reding                    const: 0
199*fb1ff013SThierry Reding
200*fb1ff013SThierry Reding                  nvidia,function:
201*fb1ff013SThierry Reding                    description: Function selection for this lane.
202*fb1ff013SThierry Reding                    $ref: /schemas/types.yaml#/definitions/string
203*fb1ff013SThierry Reding                    enum: [ snps, xusb ]
204*fb1ff013SThierry Reding
205*fb1ff013SThierry Reding      pcie:
206*fb1ff013SThierry Reding        type: object
207*fb1ff013SThierry Reding        additionalProperties: false
208*fb1ff013SThierry Reding        properties:
209*fb1ff013SThierry Reding          clocks:
210*fb1ff013SThierry Reding            items:
211*fb1ff013SThierry Reding              - description: PLLE clock
212*fb1ff013SThierry Reding
213*fb1ff013SThierry Reding          clock-names:
214*fb1ff013SThierry Reding            items:
215*fb1ff013SThierry Reding              - const: pll
216*fb1ff013SThierry Reding
217*fb1ff013SThierry Reding          resets:
218*fb1ff013SThierry Reding            items:
219*fb1ff013SThierry Reding              - description: reset for the PCIe UPHY block
220*fb1ff013SThierry Reding
221*fb1ff013SThierry Reding          reset-names:
222*fb1ff013SThierry Reding            items:
223*fb1ff013SThierry Reding              - const: phy
224*fb1ff013SThierry Reding
225*fb1ff013SThierry Reding          lanes:
226*fb1ff013SThierry Reding            type: object
227*fb1ff013SThierry Reding            additionalProperties: false
228*fb1ff013SThierry Reding            properties:
229*fb1ff013SThierry Reding              pcie-0:
230*fb1ff013SThierry Reding                type: object
231*fb1ff013SThierry Reding                additionalProperties: false
232*fb1ff013SThierry Reding                properties:
233*fb1ff013SThierry Reding                  "#phy-cells":
234*fb1ff013SThierry Reding                    const: 0
235*fb1ff013SThierry Reding
236*fb1ff013SThierry Reding                  nvidia,function:
237*fb1ff013SThierry Reding                    description: Function selection for this lane.
238*fb1ff013SThierry Reding                    $ref: /schemas/types.yaml#/definitions/string
239*fb1ff013SThierry Reding                    enum: [ pcie, usb3-ss ]
240*fb1ff013SThierry Reding
241*fb1ff013SThierry Reding              pcie-1:
242*fb1ff013SThierry Reding                type: object
243*fb1ff013SThierry Reding                additionalProperties: false
244*fb1ff013SThierry Reding                properties:
245*fb1ff013SThierry Reding                  "#phy-cells":
246*fb1ff013SThierry Reding                    const: 0
247*fb1ff013SThierry Reding
248*fb1ff013SThierry Reding                  nvidia,function:
249*fb1ff013SThierry Reding                    description: Function selection for this lane.
250*fb1ff013SThierry Reding                    $ref: /schemas/types.yaml#/definitions/string
251*fb1ff013SThierry Reding                    enum: [ pcie, usb3-ss ]
252*fb1ff013SThierry Reding
253*fb1ff013SThierry Reding              pcie-2:
254*fb1ff013SThierry Reding                type: object
255*fb1ff013SThierry Reding                additionalProperties: false
256*fb1ff013SThierry Reding                properties:
257*fb1ff013SThierry Reding                  "#phy-cells":
258*fb1ff013SThierry Reding                    const: 0
259*fb1ff013SThierry Reding
260*fb1ff013SThierry Reding                  nvidia,function:
261*fb1ff013SThierry Reding                    description: Function selection for this lane.
262*fb1ff013SThierry Reding                    $ref: /schemas/types.yaml#/definitions/string
263*fb1ff013SThierry Reding                    enum: [ pcie, usb3-ss ]
264*fb1ff013SThierry Reding
265*fb1ff013SThierry Reding              pcie-3:
266*fb1ff013SThierry Reding                type: object
267*fb1ff013SThierry Reding                additionalProperties: false
268*fb1ff013SThierry Reding                properties:
269*fb1ff013SThierry Reding                  "#phy-cells":
270*fb1ff013SThierry Reding                    const: 0
271*fb1ff013SThierry Reding
272*fb1ff013SThierry Reding                  nvidia,function:
273*fb1ff013SThierry Reding                    description: Function selection for this lane.
274*fb1ff013SThierry Reding                    $ref: /schemas/types.yaml#/definitions/string
275*fb1ff013SThierry Reding                    enum: [ pcie, usb3-ss ]
276*fb1ff013SThierry Reding
277*fb1ff013SThierry Reding              pcie-4:
278*fb1ff013SThierry Reding                type: object
279*fb1ff013SThierry Reding                additionalProperties: false
280*fb1ff013SThierry Reding                properties:
281*fb1ff013SThierry Reding                  "#phy-cells":
282*fb1ff013SThierry Reding                    const: 0
283*fb1ff013SThierry Reding
284*fb1ff013SThierry Reding                  nvidia,function:
285*fb1ff013SThierry Reding                    description: Function selection for this lane.
286*fb1ff013SThierry Reding                    $ref: /schemas/types.yaml#/definitions/string
287*fb1ff013SThierry Reding                    enum: [ pcie, usb3-ss ]
288*fb1ff013SThierry Reding
289*fb1ff013SThierry Reding      sata:
290*fb1ff013SThierry Reding        type: object
291*fb1ff013SThierry Reding        additionalProperties: false
292*fb1ff013SThierry Reding        properties:
293*fb1ff013SThierry Reding          resets:
294*fb1ff013SThierry Reding            items:
295*fb1ff013SThierry Reding              - description: reset for the SATA UPHY block
296*fb1ff013SThierry Reding
297*fb1ff013SThierry Reding          reset-names:
298*fb1ff013SThierry Reding            items:
299*fb1ff013SThierry Reding              - const: phy
300*fb1ff013SThierry Reding
301*fb1ff013SThierry Reding          lanes:
302*fb1ff013SThierry Reding            type: object
303*fb1ff013SThierry Reding            additionalProperties: false
304*fb1ff013SThierry Reding            properties:
305*fb1ff013SThierry Reding              sata-0:
306*fb1ff013SThierry Reding                type: object
307*fb1ff013SThierry Reding                additionalProperties: false
308*fb1ff013SThierry Reding                properties:
309*fb1ff013SThierry Reding                  "#phy-cells":
310*fb1ff013SThierry Reding                    const: 0
311*fb1ff013SThierry Reding
312*fb1ff013SThierry Reding                  nvidia,function:
313*fb1ff013SThierry Reding                    description: Function selection for this lane.
314*fb1ff013SThierry Reding                    $ref: /schemas/types.yaml#/definitions/string
315*fb1ff013SThierry Reding                    enum: [ sata, usb3-ss ]
316*fb1ff013SThierry Reding
317*fb1ff013SThierry Reding  ports:
318*fb1ff013SThierry Reding    description: A required child node named "ports" contains a list of
319*fb1ff013SThierry Reding      subnodes, one for each of the ports exposed by the XUSB pad controller.
320*fb1ff013SThierry Reding      Each port may need additional resources that can be referenced in its
321*fb1ff013SThierry Reding      port node.
322*fb1ff013SThierry Reding
323*fb1ff013SThierry Reding      The "status" property is used to enable or disable the use of a port.
324*fb1ff013SThierry Reding      If set to "disabled", the port will not be used on the given board. In
325*fb1ff013SThierry Reding      order to use the port, this property must be set to "okay".
326*fb1ff013SThierry Reding    type: object
327*fb1ff013SThierry Reding    additionalProperties: false
328*fb1ff013SThierry Reding    properties:
329*fb1ff013SThierry Reding      usb2-0:
330*fb1ff013SThierry Reding        type: object
331*fb1ff013SThierry Reding        additionalProperties: false
332*fb1ff013SThierry Reding        properties:
333*fb1ff013SThierry Reding          # no need to further describe this because the connector will
334*fb1ff013SThierry Reding          # match on gpio-usb-b-connector or usb-b-connector and cause
335*fb1ff013SThierry Reding          # that binding to be selected for the subnode
336*fb1ff013SThierry Reding          connector:
337*fb1ff013SThierry Reding            type: object
338*fb1ff013SThierry Reding
339*fb1ff013SThierry Reding          mode:
340*fb1ff013SThierry Reding            description: A string that determines the mode in which to
341*fb1ff013SThierry Reding              run the port.
342*fb1ff013SThierry Reding            $ref: /schemas/types.yaml#/definitions/string
343*fb1ff013SThierry Reding            enum: [ host, peripheral, otg ]
344*fb1ff013SThierry Reding
345*fb1ff013SThierry Reding          nvidia,internal:
346*fb1ff013SThierry Reding            description: A boolean property whose presence determines
347*fb1ff013SThierry Reding              that a port is internal. In the absence of this property
348*fb1ff013SThierry Reding              the port is considered to be external.
349*fb1ff013SThierry Reding            $ref: /schemas/types.yaml#/definitions/flag
350*fb1ff013SThierry Reding
351*fb1ff013SThierry Reding          usb-role-switch:
352*fb1ff013SThierry Reding            description: |
353*fb1ff013SThierry Reding              A boolean property whole presence indicates that the port
354*fb1ff013SThierry Reding              supports OTG or peripheral mode. If present, the port
355*fb1ff013SThierry Reding              supports switching between USB host and peripheral roles.
356*fb1ff013SThierry Reding              A connector must be added as a subnode in that case.
357*fb1ff013SThierry Reding
358*fb1ff013SThierry Reding              See ../connector/usb-connector.yaml.
359*fb1ff013SThierry Reding
360*fb1ff013SThierry Reding          vbus-supply:
361*fb1ff013SThierry Reding            description: A phandle to the regulator supplying the VBUS
362*fb1ff013SThierry Reding              voltage.
363*fb1ff013SThierry Reding
364*fb1ff013SThierry Reding      usb2-1:
365*fb1ff013SThierry Reding        type: object
366*fb1ff013SThierry Reding        additionalProperties: false
367*fb1ff013SThierry Reding        properties:
368*fb1ff013SThierry Reding          # no need to further describe this because the connector will
369*fb1ff013SThierry Reding          # match on gpio-usb-b-connector or usb-b-connector and cause
370*fb1ff013SThierry Reding          # that binding to be selected for the subnode
371*fb1ff013SThierry Reding          connector:
372*fb1ff013SThierry Reding            type: object
373*fb1ff013SThierry Reding
374*fb1ff013SThierry Reding          mode:
375*fb1ff013SThierry Reding            description: A string that determines the mode in which to
376*fb1ff013SThierry Reding              run the port.
377*fb1ff013SThierry Reding            $ref: /schemas/types.yaml#/definitions/string
378*fb1ff013SThierry Reding            enum: [ host, peripheral, otg ]
379*fb1ff013SThierry Reding
380*fb1ff013SThierry Reding          nvidia,internal:
381*fb1ff013SThierry Reding            description: A boolean property whose presence determines
382*fb1ff013SThierry Reding              that a port is internal. In the absence of this property
383*fb1ff013SThierry Reding              the port is considered to be external.
384*fb1ff013SThierry Reding            $ref: /schemas/types.yaml#/definitions/flag
385*fb1ff013SThierry Reding
386*fb1ff013SThierry Reding          usb-role-switch:
387*fb1ff013SThierry Reding            description: |
388*fb1ff013SThierry Reding              A boolean property whole presence indicates that the port
389*fb1ff013SThierry Reding              supports OTG or peripheral mode. If present, the port
390*fb1ff013SThierry Reding              supports switching between USB host and peripheral roles.
391*fb1ff013SThierry Reding              A connector must be added as a subnode in that case.
392*fb1ff013SThierry Reding
393*fb1ff013SThierry Reding              See ../connector/usb-connector.yaml.
394*fb1ff013SThierry Reding
395*fb1ff013SThierry Reding          vbus-supply:
396*fb1ff013SThierry Reding            description: A phandle to the regulator supplying the VBUS
397*fb1ff013SThierry Reding              voltage.
398*fb1ff013SThierry Reding
399*fb1ff013SThierry Reding      usb2-2:
400*fb1ff013SThierry Reding        type: object
401*fb1ff013SThierry Reding        additionalProperties: false
402*fb1ff013SThierry Reding        properties:
403*fb1ff013SThierry Reding          # no need to further describe this because the connector will
404*fb1ff013SThierry Reding          # match on gpio-usb-b-connector or usb-b-connector and cause
405*fb1ff013SThierry Reding          # that binding to be selected for the subnode
406*fb1ff013SThierry Reding          connector:
407*fb1ff013SThierry Reding            type: object
408*fb1ff013SThierry Reding
409*fb1ff013SThierry Reding          mode:
410*fb1ff013SThierry Reding            description: A string that determines the mode in which to
411*fb1ff013SThierry Reding              run the port.
412*fb1ff013SThierry Reding            $ref: /schemas/types.yaml#/definitions/string
413*fb1ff013SThierry Reding            enum: [ host, peripheral, otg ]
414*fb1ff013SThierry Reding
415*fb1ff013SThierry Reding          nvidia,internal:
416*fb1ff013SThierry Reding            description: A boolean property whose presence determines
417*fb1ff013SThierry Reding              that a port is internal. In the absence of this property
418*fb1ff013SThierry Reding              the port is considered to be external.
419*fb1ff013SThierry Reding            $ref: /schemas/types.yaml#/definitions/flag
420*fb1ff013SThierry Reding
421*fb1ff013SThierry Reding          usb-role-switch:
422*fb1ff013SThierry Reding            description: |
423*fb1ff013SThierry Reding              A boolean property whole presence indicates that the port
424*fb1ff013SThierry Reding              supports OTG or peripheral mode. If present, the port
425*fb1ff013SThierry Reding              supports switching between USB host and peripheral roles.
426*fb1ff013SThierry Reding              A connector must be added as a subnode in that case.
427*fb1ff013SThierry Reding
428*fb1ff013SThierry Reding              See ../connector/usb-connector.yaml.
429*fb1ff013SThierry Reding
430*fb1ff013SThierry Reding          vbus-supply:
431*fb1ff013SThierry Reding            description: A phandle to the regulator supplying the VBUS
432*fb1ff013SThierry Reding              voltage.
433*fb1ff013SThierry Reding
434*fb1ff013SThierry Reding      ulpi-0:
435*fb1ff013SThierry Reding        type: object
436*fb1ff013SThierry Reding        additionalProperties: false
437*fb1ff013SThierry Reding        properties:
438*fb1ff013SThierry Reding          nvidia,internal:
439*fb1ff013SThierry Reding            description: A boolean property whose presence determines
440*fb1ff013SThierry Reding              that a port is internal. In the absence of this property
441*fb1ff013SThierry Reding              the port is considered to be external.
442*fb1ff013SThierry Reding            $ref: /schemas/types.yaml#/definitions/flag
443*fb1ff013SThierry Reding
444*fb1ff013SThierry Reding          vbus-supply:
445*fb1ff013SThierry Reding            description: A phandle to the regulator supplying the VBUS
446*fb1ff013SThierry Reding              voltage.
447*fb1ff013SThierry Reding
448*fb1ff013SThierry Reding      hsic-0:
449*fb1ff013SThierry Reding        type: object
450*fb1ff013SThierry Reding        additionalProperties: false
451*fb1ff013SThierry Reding        properties:
452*fb1ff013SThierry Reding          vbus-supply:
453*fb1ff013SThierry Reding            description: A phandle to the regulator supplying the VBUS
454*fb1ff013SThierry Reding              voltage.
455*fb1ff013SThierry Reding
456*fb1ff013SThierry Reding      hsic-1:
457*fb1ff013SThierry Reding        type: object
458*fb1ff013SThierry Reding        additionalProperties: false
459*fb1ff013SThierry Reding        properties:
460*fb1ff013SThierry Reding          vbus-supply:
461*fb1ff013SThierry Reding            description: A phandle to the regulator supplying the VBUS
462*fb1ff013SThierry Reding              voltage.
463*fb1ff013SThierry Reding
464*fb1ff013SThierry Reding      usb3-0:
465*fb1ff013SThierry Reding        type: object
466*fb1ff013SThierry Reding        additionalProperties: false
467*fb1ff013SThierry Reding        properties:
468*fb1ff013SThierry Reding          nvidia,internal:
469*fb1ff013SThierry Reding            description: A boolean property whose presence determines
470*fb1ff013SThierry Reding              that a port is internal. In the absence of this property
471*fb1ff013SThierry Reding              the port is considered to be external.
472*fb1ff013SThierry Reding            $ref: /schemas/types.yaml#/definitions/flag
473*fb1ff013SThierry Reding
474*fb1ff013SThierry Reding          nvidia,usb2-companion:
475*fb1ff013SThierry Reding            description: A single cell that specifies the physical port
476*fb1ff013SThierry Reding              number to map this super-speed USB port to. The range of
477*fb1ff013SThierry Reding              valid port numbers varies with the SoC generation.
478*fb1ff013SThierry Reding            $ref: /schemas/types.yaml#/definitions/uint32
479*fb1ff013SThierry Reding            enum: [ 0, 1, 2 ]
480*fb1ff013SThierry Reding
481*fb1ff013SThierry Reding          vbus-supply:
482*fb1ff013SThierry Reding            description: A phandle to the regulator supplying the VBUS
483*fb1ff013SThierry Reding              voltage.
484*fb1ff013SThierry Reding
485*fb1ff013SThierry Reding      usb3-1:
486*fb1ff013SThierry Reding        type: object
487*fb1ff013SThierry Reding        additionalProperties: false
488*fb1ff013SThierry Reding        properties:
489*fb1ff013SThierry Reding          nvidia,internal:
490*fb1ff013SThierry Reding            description: A boolean property whose presence determines
491*fb1ff013SThierry Reding              that a port is internal. In the absence of this property
492*fb1ff013SThierry Reding              the port is considered to be external.
493*fb1ff013SThierry Reding            $ref: /schemas/types.yaml#/definitions/flag
494*fb1ff013SThierry Reding
495*fb1ff013SThierry Reding          nvidia,usb2-companion:
496*fb1ff013SThierry Reding            description: A single cell that specifies the physical port
497*fb1ff013SThierry Reding              number to map this super-speed USB port to. The range of
498*fb1ff013SThierry Reding              valid port numbers varies with the SoC generation.
499*fb1ff013SThierry Reding            $ref: /schemas/types.yaml#/definitions/uint32
500*fb1ff013SThierry Reding            enum: [ 0, 1, 2 ]
501*fb1ff013SThierry Reding
502*fb1ff013SThierry Reding          vbus-supply:
503*fb1ff013SThierry Reding            description: A phandle to the regulator supplying the VBUS
504*fb1ff013SThierry Reding              voltage.
505*fb1ff013SThierry Reding
506*fb1ff013SThierry RedingadditionalProperties: false
507*fb1ff013SThierry Reding
508*fb1ff013SThierry Redingrequired:
509*fb1ff013SThierry Reding  - compatible
510*fb1ff013SThierry Reding  - reg
511*fb1ff013SThierry Reding  - resets
512*fb1ff013SThierry Reding  - reset-names
513*fb1ff013SThierry Reding  - avdd-pll-utmip-supply
514*fb1ff013SThierry Reding  - avdd-pll-erefe-supply
515*fb1ff013SThierry Reding  - avdd-pex-pll-supply
516*fb1ff013SThierry Reding  - hvdd-pex-pll-e-supply
517*fb1ff013SThierry Reding
518*fb1ff013SThierry Redingexamples:
519*fb1ff013SThierry Reding  # Tegra124 and Tegra132
520*fb1ff013SThierry Reding  - |
521*fb1ff013SThierry Reding    #include <dt-bindings/interrupt-controller/arm-gic.h>
522*fb1ff013SThierry Reding
523*fb1ff013SThierry Reding    padctl@7009f000 {
524*fb1ff013SThierry Reding        compatible = "nvidia,tegra124-xusb-padctl";
525*fb1ff013SThierry Reding        reg = <0x7009f000 0x1000>;
526*fb1ff013SThierry Reding        interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
527*fb1ff013SThierry Reding        resets = <&tegra_car 142>;
528*fb1ff013SThierry Reding        reset-names = "padctl";
529*fb1ff013SThierry Reding
530*fb1ff013SThierry Reding        avdd-pll-utmip-supply = <&vddio_1v8>;
531*fb1ff013SThierry Reding        avdd-pll-erefe-supply = <&avdd_1v05_run>;
532*fb1ff013SThierry Reding        avdd-pex-pll-supply = <&vdd_1v05_run>;
533*fb1ff013SThierry Reding        hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>;
534*fb1ff013SThierry Reding
535*fb1ff013SThierry Reding        pads {
536*fb1ff013SThierry Reding            usb2 {
537*fb1ff013SThierry Reding                lanes {
538*fb1ff013SThierry Reding                    usb2-0 {
539*fb1ff013SThierry Reding                        nvidia,function = "xusb";
540*fb1ff013SThierry Reding                        #phy-cells = <0>;
541*fb1ff013SThierry Reding                    };
542*fb1ff013SThierry Reding
543*fb1ff013SThierry Reding                    usb2-1 {
544*fb1ff013SThierry Reding                        nvidia,function = "xusb";
545*fb1ff013SThierry Reding                        #phy-cells = <0>;
546*fb1ff013SThierry Reding                    };
547*fb1ff013SThierry Reding
548*fb1ff013SThierry Reding                    usb2-2 {
549*fb1ff013SThierry Reding                        nvidia,function = "xusb";
550*fb1ff013SThierry Reding                        #phy-cells = <0>;
551*fb1ff013SThierry Reding                    };
552*fb1ff013SThierry Reding                };
553*fb1ff013SThierry Reding            };
554*fb1ff013SThierry Reding
555*fb1ff013SThierry Reding            ulpi {
556*fb1ff013SThierry Reding                lanes {
557*fb1ff013SThierry Reding                    ulpi-0 {
558*fb1ff013SThierry Reding                        status = "disabled";
559*fb1ff013SThierry Reding                        #phy-cells = <0>;
560*fb1ff013SThierry Reding                    };
561*fb1ff013SThierry Reding                };
562*fb1ff013SThierry Reding            };
563*fb1ff013SThierry Reding
564*fb1ff013SThierry Reding            hsic {
565*fb1ff013SThierry Reding                lanes {
566*fb1ff013SThierry Reding                    hsic-0 {
567*fb1ff013SThierry Reding                        status = "disabled";
568*fb1ff013SThierry Reding                        #phy-cells = <0>;
569*fb1ff013SThierry Reding                    };
570*fb1ff013SThierry Reding
571*fb1ff013SThierry Reding                    hsic-1 {
572*fb1ff013SThierry Reding                        status = "disabled";
573*fb1ff013SThierry Reding                        #phy-cells = <0>;
574*fb1ff013SThierry Reding                    };
575*fb1ff013SThierry Reding                };
576*fb1ff013SThierry Reding            };
577*fb1ff013SThierry Reding
578*fb1ff013SThierry Reding            pcie {
579*fb1ff013SThierry Reding                lanes {
580*fb1ff013SThierry Reding                    pcie-0 {
581*fb1ff013SThierry Reding                        nvidia,function = "usb3-ss";
582*fb1ff013SThierry Reding                        #phy-cells = <0>;
583*fb1ff013SThierry Reding                    };
584*fb1ff013SThierry Reding
585*fb1ff013SThierry Reding                    pcie-1 {
586*fb1ff013SThierry Reding                        status = "disabled";
587*fb1ff013SThierry Reding                        #phy-cells = <0>;
588*fb1ff013SThierry Reding                    };
589*fb1ff013SThierry Reding
590*fb1ff013SThierry Reding                    pcie-2 {
591*fb1ff013SThierry Reding                        nvidia,function = "pcie";
592*fb1ff013SThierry Reding                        #phy-cells = <0>;
593*fb1ff013SThierry Reding                    };
594*fb1ff013SThierry Reding
595*fb1ff013SThierry Reding                    pcie-3 {
596*fb1ff013SThierry Reding                        status = "disabled";
597*fb1ff013SThierry Reding                        #phy-cells = <0>;
598*fb1ff013SThierry Reding                    };
599*fb1ff013SThierry Reding
600*fb1ff013SThierry Reding                    pcie-4 {
601*fb1ff013SThierry Reding                        nvidia,function = "pcie";
602*fb1ff013SThierry Reding                        #phy-cells = <0>;
603*fb1ff013SThierry Reding                    };
604*fb1ff013SThierry Reding                };
605*fb1ff013SThierry Reding            };
606*fb1ff013SThierry Reding
607*fb1ff013SThierry Reding            sata {
608*fb1ff013SThierry Reding                lanes {
609*fb1ff013SThierry Reding                    sata-0 {
610*fb1ff013SThierry Reding                        nvidia,function = "sata";
611*fb1ff013SThierry Reding                        #phy-cells = <0>;
612*fb1ff013SThierry Reding                    };
613*fb1ff013SThierry Reding                };
614*fb1ff013SThierry Reding            };
615*fb1ff013SThierry Reding        };
616*fb1ff013SThierry Reding
617*fb1ff013SThierry Reding        ports {
618*fb1ff013SThierry Reding            /* Micro A/B */
619*fb1ff013SThierry Reding            usb2-0 {
620*fb1ff013SThierry Reding                mode = "otg";
621*fb1ff013SThierry Reding            };
622*fb1ff013SThierry Reding
623*fb1ff013SThierry Reding            /* Mini PCIe */
624*fb1ff013SThierry Reding            usb2-1 {
625*fb1ff013SThierry Reding                mode = "host";
626*fb1ff013SThierry Reding            };
627*fb1ff013SThierry Reding
628*fb1ff013SThierry Reding            /* USB3 */
629*fb1ff013SThierry Reding            usb2-2 {
630*fb1ff013SThierry Reding                vbus-supply = <&vdd_usb3_vbus>;
631*fb1ff013SThierry Reding                mode = "host";
632*fb1ff013SThierry Reding            };
633*fb1ff013SThierry Reding
634*fb1ff013SThierry Reding            ulpi-0 {
635*fb1ff013SThierry Reding                status = "disabled";
636*fb1ff013SThierry Reding            };
637*fb1ff013SThierry Reding
638*fb1ff013SThierry Reding            hsic-0 {
639*fb1ff013SThierry Reding                status = "disabled";
640*fb1ff013SThierry Reding            };
641*fb1ff013SThierry Reding
642*fb1ff013SThierry Reding            hsic-1 {
643*fb1ff013SThierry Reding                status = "disabled";
644*fb1ff013SThierry Reding            };
645*fb1ff013SThierry Reding
646*fb1ff013SThierry Reding            usb3-0 {
647*fb1ff013SThierry Reding                nvidia,usb2-companion = <2>;
648*fb1ff013SThierry Reding            };
649*fb1ff013SThierry Reding
650*fb1ff013SThierry Reding            usb3-1 {
651*fb1ff013SThierry Reding                status = "disabled";
652*fb1ff013SThierry Reding            };
653*fb1ff013SThierry Reding        };
654*fb1ff013SThierry Reding    };
655