10d69ce3cSYoshihiro Shimoda# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 20d69ce3cSYoshihiro Shimoda# Copyright (C) 2020 Renesas Electronics Corp. 30d69ce3cSYoshihiro Shimoda%YAML 1.2 40d69ce3cSYoshihiro Shimoda--- 50d69ce3cSYoshihiro Shimoda$id: http://devicetree.org/schemas/pci/rcar-pci-host.yaml# 60d69ce3cSYoshihiro Shimoda$schema: http://devicetree.org/meta-schemas/core.yaml# 70d69ce3cSYoshihiro Shimoda 80d69ce3cSYoshihiro Shimodatitle: Renesas R-Car PCIe Host 90d69ce3cSYoshihiro Shimoda 100d69ce3cSYoshihiro Shimodamaintainers: 110d69ce3cSYoshihiro Shimoda - Marek Vasut <marek.vasut+renesas@gmail.com> 120d69ce3cSYoshihiro Shimoda - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> 130d69ce3cSYoshihiro Shimoda 140d69ce3cSYoshihiro ShimodaallOf: 150d69ce3cSYoshihiro Shimoda - $ref: pci-bus.yaml# 160d69ce3cSYoshihiro Shimoda 170d69ce3cSYoshihiro Shimodaproperties: 180d69ce3cSYoshihiro Shimoda compatible: 190d69ce3cSYoshihiro Shimoda oneOf: 2062b3b366SGeert Uytterhoeven - const: renesas,pcie-r8a7779 # R-Car H1 210d69ce3cSYoshihiro Shimoda - items: 220d69ce3cSYoshihiro Shimoda - enum: 230d69ce3cSYoshihiro Shimoda - renesas,pcie-r8a7742 # RZ/G1H 240d69ce3cSYoshihiro Shimoda - renesas,pcie-r8a7743 # RZ/G1M 250d69ce3cSYoshihiro Shimoda - renesas,pcie-r8a7744 # RZ/G1N 260d69ce3cSYoshihiro Shimoda - renesas,pcie-r8a7790 # R-Car H2 270d69ce3cSYoshihiro Shimoda - renesas,pcie-r8a7791 # R-Car M2-W 280d69ce3cSYoshihiro Shimoda - renesas,pcie-r8a7793 # R-Car M2-N 290d69ce3cSYoshihiro Shimoda - const: renesas,pcie-rcar-gen2 # R-Car Gen2 and RZ/G1 300d69ce3cSYoshihiro Shimoda - items: 310d69ce3cSYoshihiro Shimoda - enum: 320d69ce3cSYoshihiro Shimoda - renesas,pcie-r8a774a1 # RZ/G2M 330d69ce3cSYoshihiro Shimoda - renesas,pcie-r8a774b1 # RZ/G2N 340d69ce3cSYoshihiro Shimoda - renesas,pcie-r8a774c0 # RZ/G2E 3564fc0a03SLad Prabhakar - renesas,pcie-r8a774e1 # RZ/G2H 360d69ce3cSYoshihiro Shimoda - renesas,pcie-r8a7795 # R-Car H3 370d69ce3cSYoshihiro Shimoda - renesas,pcie-r8a7796 # R-Car M3-W 380d69ce3cSYoshihiro Shimoda - renesas,pcie-r8a77961 # R-Car M3-W+ 392228af80SYoshihiro Shimoda - renesas,pcie-r8a77965 # R-Car M3-N 400d69ce3cSYoshihiro Shimoda - renesas,pcie-r8a77980 # R-Car V3H 410d69ce3cSYoshihiro Shimoda - renesas,pcie-r8a77990 # R-Car E3 420d69ce3cSYoshihiro Shimoda - const: renesas,pcie-rcar-gen3 # R-Car Gen3 and RZ/G2 430d69ce3cSYoshihiro Shimoda 440d69ce3cSYoshihiro Shimoda reg: 450d69ce3cSYoshihiro Shimoda maxItems: 1 460d69ce3cSYoshihiro Shimoda 470d69ce3cSYoshihiro Shimoda interrupts: 480d69ce3cSYoshihiro Shimoda minItems: 3 490d69ce3cSYoshihiro Shimoda maxItems: 3 500d69ce3cSYoshihiro Shimoda 510d69ce3cSYoshihiro Shimoda clocks: 520d69ce3cSYoshihiro Shimoda maxItems: 2 530d69ce3cSYoshihiro Shimoda 540d69ce3cSYoshihiro Shimoda clock-names: 550d69ce3cSYoshihiro Shimoda items: 560d69ce3cSYoshihiro Shimoda - const: pcie 570d69ce3cSYoshihiro Shimoda - const: pcie_bus 580d69ce3cSYoshihiro Shimoda 590d69ce3cSYoshihiro Shimoda power-domains: 600d69ce3cSYoshihiro Shimoda maxItems: 1 610d69ce3cSYoshihiro Shimoda 620d69ce3cSYoshihiro Shimoda resets: 630d69ce3cSYoshihiro Shimoda maxItems: 1 640d69ce3cSYoshihiro Shimoda 650d69ce3cSYoshihiro Shimoda phys: 660d69ce3cSYoshihiro Shimoda maxItems: 1 670d69ce3cSYoshihiro Shimoda 680d69ce3cSYoshihiro Shimoda phy-names: 690d69ce3cSYoshihiro Shimoda const: pcie 700d69ce3cSYoshihiro Shimoda 71479e4daaSWolfram Sang vpcie1v5-supply: 72479e4daaSWolfram Sang description: The 1.5v regulator to use for PCIe. 73479e4daaSWolfram Sang 74479e4daaSWolfram Sang vpcie3v3-supply: 75479e4daaSWolfram Sang description: The 3.3v regulator to use for PCIe. 76479e4daaSWolfram Sang 77479e4daaSWolfram Sang vpcie12v-supply: 78479e4daaSWolfram Sang description: The 12v regulator to use for PCIe. 79479e4daaSWolfram Sang 80*f5663292SGeert Uytterhoeven iommu-map: true 81*f5663292SGeert Uytterhoeven iommu-map-mask: true 82*f5663292SGeert Uytterhoeven 830d69ce3cSYoshihiro Shimodarequired: 840d69ce3cSYoshihiro Shimoda - compatible 850d69ce3cSYoshihiro Shimoda - reg 860d69ce3cSYoshihiro Shimoda - interrupts 870d69ce3cSYoshihiro Shimoda - clocks 880d69ce3cSYoshihiro Shimoda - clock-names 890d69ce3cSYoshihiro Shimoda - power-domains 9062b3b366SGeert Uytterhoeven 9162b3b366SGeert Uytterhoevenif: 9262b3b366SGeert Uytterhoeven not: 9362b3b366SGeert Uytterhoeven properties: 9462b3b366SGeert Uytterhoeven compatible: 9562b3b366SGeert Uytterhoeven contains: 9662b3b366SGeert Uytterhoeven const: renesas,pcie-r8a7779 9762b3b366SGeert Uytterhoeventhen: 9862b3b366SGeert Uytterhoeven required: 990d69ce3cSYoshihiro Shimoda - resets 1000d69ce3cSYoshihiro Shimoda 1010d69ce3cSYoshihiro ShimodaunevaluatedProperties: false 1020d69ce3cSYoshihiro Shimoda 1030d69ce3cSYoshihiro Shimodaexamples: 1040d69ce3cSYoshihiro Shimoda - | 1050d69ce3cSYoshihiro Shimoda #include <dt-bindings/clock/r8a7791-cpg-mssr.h> 1060d69ce3cSYoshihiro Shimoda #include <dt-bindings/interrupt-controller/arm-gic.h> 1070d69ce3cSYoshihiro Shimoda #include <dt-bindings/power/r8a7791-sysc.h> 1080d69ce3cSYoshihiro Shimoda 1090d69ce3cSYoshihiro Shimoda soc { 1100d69ce3cSYoshihiro Shimoda #address-cells = <2>; 1110d69ce3cSYoshihiro Shimoda #size-cells = <2>; 1120d69ce3cSYoshihiro Shimoda 1130d69ce3cSYoshihiro Shimoda pcie: pcie@fe000000 { 1140d69ce3cSYoshihiro Shimoda compatible = "renesas,pcie-r8a7791", "renesas,pcie-rcar-gen2"; 1150d69ce3cSYoshihiro Shimoda reg = <0 0xfe000000 0 0x80000>; 1160d69ce3cSYoshihiro Shimoda #address-cells = <3>; 1170d69ce3cSYoshihiro Shimoda #size-cells = <2>; 1180d69ce3cSYoshihiro Shimoda bus-range = <0x00 0xff>; 1190d69ce3cSYoshihiro Shimoda device_type = "pci"; 1200d69ce3cSYoshihiro Shimoda ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 1210d69ce3cSYoshihiro Shimoda <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 1220d69ce3cSYoshihiro Shimoda <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 1230d69ce3cSYoshihiro Shimoda <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 1240d69ce3cSYoshihiro Shimoda dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>, 1250d69ce3cSYoshihiro Shimoda <0x42000000 2 0x00000000 2 0x00000000 0 0x40000000>; 1260d69ce3cSYoshihiro Shimoda interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 1270d69ce3cSYoshihiro Shimoda <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 1280d69ce3cSYoshihiro Shimoda <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 1290d69ce3cSYoshihiro Shimoda #interrupt-cells = <1>; 1300d69ce3cSYoshihiro Shimoda interrupt-map-mask = <0 0 0 0>; 1310d69ce3cSYoshihiro Shimoda interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 1320d69ce3cSYoshihiro Shimoda clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 1330d69ce3cSYoshihiro Shimoda clock-names = "pcie", "pcie_bus"; 1340d69ce3cSYoshihiro Shimoda power-domains = <&sysc R8A7791_PD_ALWAYS_ON>; 1350d69ce3cSYoshihiro Shimoda resets = <&cpg 319>; 136479e4daaSWolfram Sang vpcie3v3-supply = <&pcie_3v3>; 137479e4daaSWolfram Sang vpcie12v-supply = <&pcie_12v>; 1380d69ce3cSYoshihiro Shimoda }; 1390d69ce3cSYoshihiro Shimoda }; 140