1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2# Copyright (c) 2018-2019 The Linux Foundation. All rights reserved. 3%YAML 1.2 4--- 5$id: http://devicetree.org/schemas/net/wireless/mediatek,mt76.yaml# 6$schema: http://devicetree.org/meta-schemas/core.yaml# 7 8title: MediaTek mt76 wireless devices 9 10maintainers: 11 - Felix Fietkau <nbd@nbd.name> 12 - Lorenzo Bianconi <lorenzo@kernel.org> 13 - Ryder Lee <ryder.lee@mediatek.com> 14 15description: | 16 This node provides properties for configuring the MediaTek mt76xx 17 wireless device. The node is expected to be specified as a child 18 node of the PCI controller to which the wireless chip is connected. 19 Alternatively, it can specify the wireless part of the MT7628/MT7688 20 or MT7622/MT7986 SoC. 21 22allOf: 23 - $ref: ieee80211.yaml# 24 25properties: 26 compatible: 27 enum: 28 - mediatek,mt76 29 - mediatek,mt7628-wmac 30 - mediatek,mt7622-wmac 31 - mediatek,mt7981-wmac 32 - mediatek,mt7986-wmac 33 34 reg: 35 minItems: 1 36 maxItems: 3 37 description: 38 MT7986 should contain 3 regions consys, dcm, and sku, in this order. 39 40 interrupts: 41 maxItems: 1 42 43 power-domains: 44 maxItems: 1 45 46 memory-region: 47 maxItems: 1 48 49 resets: 50 maxItems: 1 51 description: 52 Specify the consys reset for mt7986. 53 54 reset-names: 55 const: consys 56 57 clocks: 58 maxItems: 2 59 description: 60 Specify the consys clocks for mt7986. 61 62 clock-names: 63 items: 64 - const: mcu 65 - const: ap2conn 66 67 mediatek,infracfg: 68 $ref: /schemas/types.yaml#/definitions/phandle 69 description: 70 Phandle to the infrastructure bus fabric syscon node. 71 This property is MT7622 specific 72 73 ieee80211-freq-limit: true 74 75 mediatek,eeprom-data: 76 $ref: /schemas/types.yaml#/definitions/uint32-array 77 description: 78 EEPROM data embedded as array. 79 80 mediatek,mtd-eeprom: 81 $ref: /schemas/types.yaml#/definitions/phandle-array 82 items: 83 - items: 84 - description: phandle to MTD partition 85 - description: offset containing EEPROM data 86 description: 87 Phandle to a MTD partition + offset containing EEPROM data 88 89 big-endian: 90 $ref: /schemas/types.yaml#/definitions/flag 91 description: 92 Specify if the radio eeprom partition is written in big-endian 93 94 mediatek,eeprom-merge-otp: 95 type: boolean 96 description: 97 Merge EEPROM data with OTP data. Can be used on boards where the flash 98 calibration data is generic and specific calibration data should be 99 pulled from the OTP ROM 100 101 mediatek,disable-radar-background: 102 type: boolean 103 description: 104 Disable/enable radar/CAC detection running on a dedicated offchannel 105 chain available on some hw. 106 Background radar/CAC detection allows to avoid the CAC downtime 107 switching on a different channel during CAC detection on the selected 108 radar channel. 109 110 led: 111 type: object 112 $ref: /schemas/leds/common.yaml# 113 additionalProperties: false 114 properties: 115 led-active-low: 116 description: 117 LED is enabled with ground signal. 118 type: boolean 119 120 led-sources: 121 maxItems: 1 122 123 power-limits: 124 type: object 125 additionalProperties: false 126 patternProperties: 127 "^r[0-9]+": 128 type: object 129 additionalProperties: false 130 properties: 131 regdomain: 132 $ref: /schemas/types.yaml#/definitions/string 133 description: 134 Regdomain refers to a legal regulatory region. Different 135 countries define different levels of allowable transmitter 136 power, time that a channel can be occupied, and different 137 available channels 138 enum: 139 - FCC 140 - ETSI 141 - JP 142 143 patternProperties: 144 "^txpower-[256]g$": 145 type: object 146 additionalProperties: false 147 patternProperties: 148 "^b[0-9]+$": 149 type: object 150 additionalProperties: false 151 properties: 152 channels: 153 $ref: /schemas/types.yaml#/definitions/uint32-array 154 minItems: 2 155 maxItems: 2 156 description: 157 Pairs of first and last channel number of the selected 158 band 159 160 rates-cck: 161 $ref: /schemas/types.yaml#/definitions/uint8-array 162 minItems: 4 163 maxItems: 4 164 description: 165 4 half-dBm per-rate power limit values 166 167 rates-ofdm: 168 $ref: /schemas/types.yaml#/definitions/uint8-array 169 minItems: 8 170 maxItems: 8 171 description: 172 8 half-dBm per-rate power limit values 173 174 rates-mcs: 175 $ref: /schemas/types.yaml#/definitions/uint8-matrix 176 description: 177 Sets of per-rate power limit values for 802.11n/802.11ac 178 rates for multiple channel bandwidth settings. 179 Each set starts with the number of channel bandwidth 180 settings for which the rate set applies, followed by 181 either 8 or 10 power limit values. The order of the 182 channel bandwidth settings is 20, 40, 80 and 160 MHz. 183 maxItems: 4 184 items: 185 minItems: 9 186 maxItems: 11 187 188 rates-ru: 189 $ref: /schemas/types.yaml#/definitions/uint8-matrix 190 description: 191 Sets of per-rate power limit values for 802.11ax rates 192 for multiple channel bandwidth or resource unit settings. 193 Each set starts with the number of channel bandwidth or 194 resource unit settings for which the rate set applies, 195 followed by 12 power limit values. The order of the 196 channel resource unit settings is RU26, RU52, RU106, 197 RU242/SU20, RU484/SU40, RU996/SU80 and RU2x996/SU160. 198 items: 199 minItems: 13 200 maxItems: 13 201 202 txs-delta: 203 $ref: /schemas/types.yaml#/definitions/uint32-array 204 description: 205 Half-dBm power delta for different numbers of antennas 206 207required: 208 - compatible 209 - reg 210 211unevaluatedProperties: false 212 213examples: 214 - | 215 pcie0 { 216 #address-cells = <3>; 217 #size-cells = <2>; 218 wifi@0,0 { 219 compatible = "mediatek,mt76"; 220 reg = <0x0000 0 0 0 0>; 221 ieee80211-freq-limit = <5000000 6000000>; 222 mediatek,mtd-eeprom = <&factory 0x8000>; 223 big-endian; 224 225 led { 226 led-sources = <2>; 227 }; 228 229 power-limits { 230 r0 { 231 regdomain = "FCC"; 232 txpower-5g { 233 b0 { 234 channels = <36 48>; 235 rates-ofdm = /bits/ 8 <23 23 23 23 23 23 23 23>; 236 rates-mcs = /bits/ 8 <1 23 23 23 23 23 23 23 23 23 23>, 237 /bits/ 8 <3 22 22 22 22 22 22 22 22 22 22>; 238 rates-ru = /bits/ 8 <3 22 22 22 22 22 22 22 22 22 22 22 22>, 239 /bits/ 8 <4 20 20 20 20 20 20 20 20 20 20 20 20>; 240 }; 241 b1 { 242 channels = <100 181>; 243 rates-ofdm = /bits/ 8 <14 14 14 14 14 14 14 14>; 244 rates-mcs = /bits/ 8 <4 14 14 14 14 14 14 14 14 14 14>; 245 txs-delta = <12 9 6>; 246 rates-ru = /bits/ 8 <7 14 14 14 14 14 14 14 14 14 14 14 14>; 247 }; 248 }; 249 }; 250 }; 251 }; 252 }; 253 254 - | 255 wifi@10300000 { 256 compatible = "mediatek,mt7628-wmac"; 257 reg = <0x10300000 0x100000>; 258 259 interrupt-parent = <&cpuintc>; 260 interrupts = <6>; 261 262 mediatek,mtd-eeprom = <&factory 0x0>; 263 }; 264 265 - | 266 #include <dt-bindings/interrupt-controller/arm-gic.h> 267 #include <dt-bindings/interrupt-controller/irq.h> 268 wifi@18000000 { 269 compatible = "mediatek,mt7622-wmac"; 270 reg = <0x10300000 0x100000>; 271 interrupts = <GIC_SPI 211 IRQ_TYPE_LEVEL_LOW>; 272 273 mediatek,infracfg = <&infracfg>; 274 275 power-domains = <&scpsys 3>; 276 }; 277 278 - | 279 wifi@18000000 { 280 compatible = "mediatek,mt7986-wmac"; 281 resets = <&watchdog 23>; 282 reset-names = "consys"; 283 reg = <0x18000000 0x1000000>, 284 <0x10003000 0x1000>, 285 <0x11d10000 0x1000>; 286 interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>; 287 clocks = <&topckgen 50>, 288 <&topckgen 62>; 289 clock-names = "mcu", "ap2conn"; 290 memory-region = <&wmcpu_emi>; 291 }; 292