1d4f08a70SDaniel Golle# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2d4f08a70SDaniel Golle%YAML 1.2 3d4f08a70SDaniel Golle--- 4d4f08a70SDaniel Golle$id: http://devicetree.org/schemas/net/pcs/mediatek,sgmiisys.yaml# 5d4f08a70SDaniel Golle$schema: http://devicetree.org/meta-schemas/core.yaml# 6d4f08a70SDaniel Golle 7d4f08a70SDaniel Golletitle: MediaTek SGMIISYS Controller 8d4f08a70SDaniel Golle 9d4f08a70SDaniel Gollemaintainers: 10d4f08a70SDaniel Golle - Matthias Brugger <matthias.bgg@gmail.com> 11d4f08a70SDaniel Golle 12d4f08a70SDaniel Golledescription: 13d4f08a70SDaniel Golle The MediaTek SGMIISYS controller provides a SGMII PCS and some clocks 14d4f08a70SDaniel Golle to the ethernet subsystem to which it is attached. 15d4f08a70SDaniel Golle 16d4f08a70SDaniel Golleproperties: 17d4f08a70SDaniel Golle compatible: 18d4f08a70SDaniel Golle items: 19d4f08a70SDaniel Golle - enum: 20d4f08a70SDaniel Golle - mediatek,mt7622-sgmiisys 21d4f08a70SDaniel Golle - mediatek,mt7629-sgmiisys 22*4f7eb19cSDaniel Golle - mediatek,mt7981-sgmiisys_0 23*4f7eb19cSDaniel Golle - mediatek,mt7981-sgmiisys_1 24d4f08a70SDaniel Golle - mediatek,mt7986-sgmiisys_0 25d4f08a70SDaniel Golle - mediatek,mt7986-sgmiisys_1 26d4f08a70SDaniel Golle - const: syscon 27d4f08a70SDaniel Golle 28d4f08a70SDaniel Golle reg: 29d4f08a70SDaniel Golle maxItems: 1 30d4f08a70SDaniel Golle 31d4f08a70SDaniel Golle '#clock-cells': 32d4f08a70SDaniel Golle const: 1 33d4f08a70SDaniel Golle 34*4f7eb19cSDaniel Golle mediatek,pnswap: 35*4f7eb19cSDaniel Golle description: Invert polarity of the SGMII data lanes 36*4f7eb19cSDaniel Golle type: boolean 37*4f7eb19cSDaniel Golle 38d4f08a70SDaniel Gollerequired: 39d4f08a70SDaniel Golle - compatible 40d4f08a70SDaniel Golle - reg 41d4f08a70SDaniel Golle - '#clock-cells' 42d4f08a70SDaniel Golle 43d4f08a70SDaniel GolleadditionalProperties: false 44d4f08a70SDaniel Golle 45d4f08a70SDaniel Golleexamples: 46d4f08a70SDaniel Golle - | 47d4f08a70SDaniel Golle soc { 48d4f08a70SDaniel Golle #address-cells = <2>; 49d4f08a70SDaniel Golle #size-cells = <2>; 50d4f08a70SDaniel Golle sgmiisys: syscon@1b128000 { 51d4f08a70SDaniel Golle compatible = "mediatek,mt7622-sgmiisys", "syscon"; 52d4f08a70SDaniel Golle reg = <0 0x1b128000 0 0x1000>; 53d4f08a70SDaniel Golle #clock-cells = <1>; 54d4f08a70SDaniel Golle }; 55d4f08a70SDaniel Golle }; 56