1ef80c32dSZhangfei GaoHisilicon hip04 Ethernet Controller 2ef80c32dSZhangfei Gao 3ef80c32dSZhangfei Gao* Ethernet controller node 4ef80c32dSZhangfei Gao 5ef80c32dSZhangfei GaoRequired properties: 6ef80c32dSZhangfei Gao- compatible: should be "hisilicon,hip04-mac". 7ef80c32dSZhangfei Gao- reg: address and length of the register set for the device. 8ef80c32dSZhangfei Gao- interrupts: interrupt for the device. 9ef80c32dSZhangfei Gao- port-handle: <phandle port channel> 10ef80c32dSZhangfei Gao phandle, specifies a reference to the syscon ppe node 11ef80c32dSZhangfei Gao port, port number connected to the controller 12ef80c32dSZhangfei Gao channel, recv channel start from channel * number (RX_DESC_NUM) 13ef80c32dSZhangfei Gao- phy-mode: see ethernet.txt [1]. 14ef80c32dSZhangfei Gao 15ef80c32dSZhangfei GaoOptional properties: 16ef80c32dSZhangfei Gao- phy-handle: see ethernet.txt [1]. 17ef80c32dSZhangfei Gao 18ef80c32dSZhangfei Gao[1] Documentation/devicetree/bindings/net/ethernet.txt 19ef80c32dSZhangfei Gao 20ef80c32dSZhangfei Gao 21ef80c32dSZhangfei Gao* Ethernet ppe node: 22ef80c32dSZhangfei GaoControl rx & tx fifos of all ethernet controllers. 23ef80c32dSZhangfei GaoHave 2048 recv channels shared by all ethernet controllers, only if no overlap. 24ef80c32dSZhangfei GaoEach controller's recv channel start from channel * number (RX_DESC_NUM). 25ef80c32dSZhangfei Gao 26ef80c32dSZhangfei GaoRequired properties: 27ef80c32dSZhangfei Gao- compatible: "hisilicon,hip04-ppe", "syscon". 28ef80c32dSZhangfei Gao- reg: address and length of the register set for the device. 29ef80c32dSZhangfei Gao 30ef80c32dSZhangfei Gao 31ef80c32dSZhangfei Gao* MDIO bus node: 32ef80c32dSZhangfei Gao 33ef80c32dSZhangfei GaoRequired properties: 34ef80c32dSZhangfei Gao 35*fc7e37c6Shuangdaode- compatible: should be "hisilicon,mdio". 36ef80c32dSZhangfei Gao- Inherits from MDIO bus node binding [2] 37ef80c32dSZhangfei Gao[2] Documentation/devicetree/bindings/net/phy.txt 38ef80c32dSZhangfei Gao 39ef80c32dSZhangfei GaoExample: 40ef80c32dSZhangfei Gao mdio { 41*fc7e37c6Shuangdaode compatible = "hisilicon,mdio"; 42ef80c32dSZhangfei Gao reg = <0x28f1000 0x1000>; 43ef80c32dSZhangfei Gao #address-cells = <1>; 44ef80c32dSZhangfei Gao #size-cells = <0>; 45ef80c32dSZhangfei Gao 46ef80c32dSZhangfei Gao phy0: ethernet-phy@0 { 47ef80c32dSZhangfei Gao compatible = "ethernet-phy-ieee802.3-c22"; 48ef80c32dSZhangfei Gao reg = <0>; 49ef80c32dSZhangfei Gao marvell,reg-init = <18 0x14 0 0x8001>; 50ef80c32dSZhangfei Gao }; 51ef80c32dSZhangfei Gao 52ef80c32dSZhangfei Gao phy1: ethernet-phy@1 { 53ef80c32dSZhangfei Gao compatible = "ethernet-phy-ieee802.3-c22"; 54ef80c32dSZhangfei Gao reg = <1>; 55ef80c32dSZhangfei Gao marvell,reg-init = <18 0x14 0 0x8001>; 56ef80c32dSZhangfei Gao }; 57ef80c32dSZhangfei Gao }; 58ef80c32dSZhangfei Gao 59ef80c32dSZhangfei Gao ppe: ppe@28c0000 { 60ef80c32dSZhangfei Gao compatible = "hisilicon,hip04-ppe", "syscon"; 61ef80c32dSZhangfei Gao reg = <0x28c0000 0x10000>; 62ef80c32dSZhangfei Gao }; 63ef80c32dSZhangfei Gao 64ef80c32dSZhangfei Gao fe: ethernet@28b0000 { 65ef80c32dSZhangfei Gao compatible = "hisilicon,hip04-mac"; 66ef80c32dSZhangfei Gao reg = <0x28b0000 0x10000>; 67ef80c32dSZhangfei Gao interrupts = <0 413 4>; 68ef80c32dSZhangfei Gao phy-mode = "mii"; 69ef80c32dSZhangfei Gao port-handle = <&ppe 31 0>; 70ef80c32dSZhangfei Gao }; 71ef80c32dSZhangfei Gao 72ef80c32dSZhangfei Gao ge0: ethernet@2800000 { 73ef80c32dSZhangfei Gao compatible = "hisilicon,hip04-mac"; 74ef80c32dSZhangfei Gao reg = <0x2800000 0x10000>; 75ef80c32dSZhangfei Gao interrupts = <0 402 4>; 76ef80c32dSZhangfei Gao phy-mode = "sgmii"; 77ef80c32dSZhangfei Gao port-handle = <&ppe 0 1>; 78ef80c32dSZhangfei Gao phy-handle = <&phy0>; 79ef80c32dSZhangfei Gao }; 80ef80c32dSZhangfei Gao 81ef80c32dSZhangfei Gao ge8: ethernet@2880000 { 82ef80c32dSZhangfei Gao compatible = "hisilicon,hip04-mac"; 83ef80c32dSZhangfei Gao reg = <0x2880000 0x10000>; 84ef80c32dSZhangfei Gao interrupts = <0 410 4>; 85ef80c32dSZhangfei Gao phy-mode = "sgmii"; 86ef80c32dSZhangfei Gao port-handle = <&ppe 8 2>; 87ef80c32dSZhangfei Gao phy-handle = <&phy1>; 88ef80c32dSZhangfei Gao }; 89