120cc5ddeSClaudiu Manoil* ENETC ethernet device tree bindings 220cc5ddeSClaudiu Manoil 320cc5ddeSClaudiu ManoilDepending on board design and ENETC port type (internal or 420cc5ddeSClaudiu Manoilexternal) there are two supported link modes specified by 520cc5ddeSClaudiu Manoilbelow device tree bindings. 620cc5ddeSClaudiu Manoil 720cc5ddeSClaudiu ManoilRequired properties: 820cc5ddeSClaudiu Manoil 920cc5ddeSClaudiu Manoil- reg : Specifies PCIe Device Number and Function 1020cc5ddeSClaudiu Manoil Number of the ENETC endpoint device, according 1120cc5ddeSClaudiu Manoil to parent node bindings. 1220cc5ddeSClaudiu Manoil- compatible : Should be "fsl,enetc". 1320cc5ddeSClaudiu Manoil 14288a91d5SClaudiu Manoil1. The ENETC external port is connected to a MDIO configurable phy 15288a91d5SClaudiu Manoil 16288a91d5SClaudiu Manoil1.1. Using the local ENETC Port MDIO interface 1720cc5ddeSClaudiu Manoil 1820cc5ddeSClaudiu ManoilIn this case, the ENETC node should include a "mdio" sub-node 1920cc5ddeSClaudiu Manoilthat in turn should contain the "ethernet-phy" node describing the 2020cc5ddeSClaudiu Manoilexternal phy. Below properties are required, their bindings 21cb1aaebeSMauro Carvalho Chehabalready defined in Documentation/devicetree/bindings/net/ethernet.txt or 22cb1aaebeSMauro Carvalho ChehabDocumentation/devicetree/bindings/net/phy.txt. 2320cc5ddeSClaudiu Manoil 2420cc5ddeSClaudiu ManoilRequired: 2520cc5ddeSClaudiu Manoil 2620cc5ddeSClaudiu Manoil- phy-handle : Phandle to a PHY on the MDIO bus. 2720cc5ddeSClaudiu Manoil Defined in ethernet.txt. 2820cc5ddeSClaudiu Manoil 2920cc5ddeSClaudiu Manoil- phy-connection-type : Defined in ethernet.txt. 3020cc5ddeSClaudiu Manoil 3120cc5ddeSClaudiu Manoil- mdio : "mdio" node, defined in mdio.txt. 3220cc5ddeSClaudiu Manoil 3320cc5ddeSClaudiu Manoil- ethernet-phy : "ethernet-phy" node, defined in phy.txt. 3420cc5ddeSClaudiu Manoil 3520cc5ddeSClaudiu ManoilExample: 3620cc5ddeSClaudiu Manoil 3720cc5ddeSClaudiu Manoil ethernet@0,0 { 3820cc5ddeSClaudiu Manoil compatible = "fsl,enetc"; 3920cc5ddeSClaudiu Manoil reg = <0x000000 0 0 0 0>; 4020cc5ddeSClaudiu Manoil phy-handle = <&sgmii_phy0>; 4120cc5ddeSClaudiu Manoil phy-connection-type = "sgmii"; 4220cc5ddeSClaudiu Manoil 4320cc5ddeSClaudiu Manoil mdio { 4420cc5ddeSClaudiu Manoil #address-cells = <1>; 4520cc5ddeSClaudiu Manoil #size-cells = <0>; 4620cc5ddeSClaudiu Manoil sgmii_phy0: ethernet-phy@2 { 4720cc5ddeSClaudiu Manoil reg = <0x2>; 4820cc5ddeSClaudiu Manoil }; 4920cc5ddeSClaudiu Manoil }; 5020cc5ddeSClaudiu Manoil }; 5120cc5ddeSClaudiu Manoil 52288a91d5SClaudiu Manoil1.2. Using the central MDIO PCIe endpoint device 53288a91d5SClaudiu Manoil 54288a91d5SClaudiu ManoilIn this case, the mdio node should be defined as another PCIe 55288a91d5SClaudiu Manoilendpoint node, at the same level with the ENETC port nodes. 56288a91d5SClaudiu Manoil 57288a91d5SClaudiu ManoilRequired properties: 58288a91d5SClaudiu Manoil 59288a91d5SClaudiu Manoil- reg : Specifies PCIe Device Number and Function 60288a91d5SClaudiu Manoil Number of the ENETC endpoint device, according 61288a91d5SClaudiu Manoil to parent node bindings. 62288a91d5SClaudiu Manoil- compatible : Should be "fsl,enetc-mdio". 63288a91d5SClaudiu Manoil 64288a91d5SClaudiu ManoilThe remaining required mdio bus properties are standard, their bindings 65288a91d5SClaudiu Manoilalready defined in Documentation/devicetree/bindings/net/mdio.txt. 66288a91d5SClaudiu Manoil 67288a91d5SClaudiu ManoilExample: 68288a91d5SClaudiu Manoil 69288a91d5SClaudiu Manoil ethernet@0,0 { 70288a91d5SClaudiu Manoil compatible = "fsl,enetc"; 71288a91d5SClaudiu Manoil reg = <0x000000 0 0 0 0>; 72288a91d5SClaudiu Manoil phy-handle = <&sgmii_phy0>; 73288a91d5SClaudiu Manoil phy-connection-type = "sgmii"; 74288a91d5SClaudiu Manoil }; 75288a91d5SClaudiu Manoil 76288a91d5SClaudiu Manoil mdio@0,3 { 77288a91d5SClaudiu Manoil compatible = "fsl,enetc-mdio"; 78288a91d5SClaudiu Manoil reg = <0x000300 0 0 0 0>; 79288a91d5SClaudiu Manoil #address-cells = <1>; 80288a91d5SClaudiu Manoil #size-cells = <0>; 81288a91d5SClaudiu Manoil sgmii_phy0: ethernet-phy@2 { 82288a91d5SClaudiu Manoil reg = <0x2>; 83288a91d5SClaudiu Manoil }; 84288a91d5SClaudiu Manoil }; 85288a91d5SClaudiu Manoil 86288a91d5SClaudiu Manoil2. The ENETC port is an internal port or has a fixed-link external 87288a91d5SClaudiu Manoilconnection 8820cc5ddeSClaudiu Manoil 8920cc5ddeSClaudiu ManoilIn this case, the ENETC port node defines a fixed link connection, 90cb1aaebeSMauro Carvalho Chehabas specified by Documentation/devicetree/bindings/net/fixed-link.txt. 9120cc5ddeSClaudiu Manoil 9220cc5ddeSClaudiu ManoilRequired: 9320cc5ddeSClaudiu Manoil 9420cc5ddeSClaudiu Manoil- fixed-link : "fixed-link" node, defined in "fixed-link.txt". 9520cc5ddeSClaudiu Manoil 9620cc5ddeSClaudiu ManoilExample: 9720cc5ddeSClaudiu Manoil ethernet@0,2 { 9820cc5ddeSClaudiu Manoil compatible = "fsl,enetc"; 9920cc5ddeSClaudiu Manoil reg = <0x000200 0 0 0 0>; 10020cc5ddeSClaudiu Manoil fixed-link { 10120cc5ddeSClaudiu Manoil speed = <1000>; 10220cc5ddeSClaudiu Manoil full-duplex; 10320cc5ddeSClaudiu Manoil }; 10420cc5ddeSClaudiu Manoil }; 105*4ac7acc6SVladimir Oltean 106*4ac7acc6SVladimir Oltean* Integrated Endpoint Register Block bindings 107*4ac7acc6SVladimir Oltean 108*4ac7acc6SVladimir OlteanOptionally, the fsl_enetc driver can probe on the Integrated Endpoint Register 109*4ac7acc6SVladimir OlteanBlock, which preconfigures the FIFO limits for the ENETC ports. This is a node 110*4ac7acc6SVladimir Olteanwith the following properties: 111*4ac7acc6SVladimir Oltean 112*4ac7acc6SVladimir Oltean- reg : Specifies the address in the SoC memory space. 113*4ac7acc6SVladimir Oltean- compatible : Must be "fsl,ls1028a-enetc-ierb". 114*4ac7acc6SVladimir Oltean 115*4ac7acc6SVladimir OlteanExample: 116*4ac7acc6SVladimir Oltean ierb@1f0800000 { 117*4ac7acc6SVladimir Oltean compatible = "fsl,ls1028a-enetc-ierb"; 118*4ac7acc6SVladimir Oltean reg = <0x01 0xf0800000 0x0 0x10000>; 119*4ac7acc6SVladimir Oltean }; 120