xref: /openbmc/linux/Documentation/devicetree/bindings/net/dsa/mediatek,mt7530.yaml (revision 1ac731c529cd4d6adbce134754b51ff7d822b145)
1e0dda311SFrank Wunderlich# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2e0dda311SFrank Wunderlich%YAML 1.2
3e0dda311SFrank Wunderlich---
4e0dda311SFrank Wunderlich$id: http://devicetree.org/schemas/net/dsa/mediatek,mt7530.yaml#
5e0dda311SFrank Wunderlich$schema: http://devicetree.org/meta-schemas/core.yaml#
6e0dda311SFrank Wunderlich
7214537cdSArınç ÜNALtitle: Mediatek MT7530 and MT7531 Ethernet Switches
8e0dda311SFrank Wunderlich
9e0dda311SFrank Wunderlichmaintainers:
10214537cdSArınç ÜNAL  - Arınç ÜNAL <arinc.unal@arinc9.com>
11e0dda311SFrank Wunderlich  - Landen Chao <Landen.Chao@mediatek.com>
12e0dda311SFrank Wunderlich  - DENG Qingfang <dqfext@gmail.com>
13214537cdSArınç ÜNAL  - Sean Wang <sean.wang@mediatek.com>
14*386f5fc9SDaniel Golle  - Daniel Golle <daniel@makrotopia.org>
15e0dda311SFrank Wunderlich
16e0dda311SFrank Wunderlichdescription: |
17*386f5fc9SDaniel Golle  There are three versions of MT7530, standalone, in a multi-chip module and
18*386f5fc9SDaniel Golle  built-into a SoC.
19e0dda311SFrank Wunderlich
20cd7e2b97SArınç ÜNAL  MT7530 is a part of the multi-chip module in MT7620AN, MT7620DA, MT7620DAN,
21cd7e2b97SArınç ÜNAL  MT7620NN, MT7621AT, MT7621DAT, MT7621ST and MT7623AI SoCs.
22e0dda311SFrank Wunderlich
23*386f5fc9SDaniel Golle  The MT7988 SoC comes with a built-in switch similar to MT7531 as well as four
24*386f5fc9SDaniel Golle  Gigabit Ethernet PHYs. The switch registers are directly mapped into the SoC's
25*386f5fc9SDaniel Golle  memory map rather than using MDIO. The switch got an internally connected 10G
26*386f5fc9SDaniel Golle  CPU port and 4 user ports connected to the built-in Gigabit Ethernet PHYs.
27*386f5fc9SDaniel Golle
28cd7e2b97SArınç ÜNAL  MT7530 in MT7620AN, MT7620DA, MT7620DAN and MT7620NN SoCs has got 10/100 PHYs
29cd7e2b97SArınç ÜNAL  and the switch registers are directly mapped into SoC's memory map rather than
30*386f5fc9SDaniel Golle  using MDIO. The DSA driver currently doesn't support MT7620 variants.
31e0dda311SFrank Wunderlich
32cd7e2b97SArınç ÜNAL  There is only the standalone version of MT7531.
33e0dda311SFrank Wunderlich
34a71fad0fSArınç ÜNAL  Port 5 on MT7530 has got various ways of configuration:
35cd7e2b97SArınç ÜNAL
36cd7e2b97SArınç ÜNAL    - Port 5 can be used as a CPU port.
37cd7e2b97SArınç ÜNAL
38a71fad0fSArınç ÜNAL    - PHY 0 or 4 of the switch can be muxed to gmac5 of the switch. Therefore,
39a71fad0fSArınç ÜNAL      the gmac of the SoC which is wired to port 5 can connect to the PHY.
40a71fad0fSArınç ÜNAL      This is usually used for connecting the wan port directly to the CPU to
41a71fad0fSArınç ÜNAL      achieve 2 Gbps routing in total.
42cd7e2b97SArınç ÜNAL
43a71fad0fSArınç ÜNAL      The driver looks up the reg on the ethernet-phy node, which the phy-handle
44a71fad0fSArınç ÜNAL      property on the gmac node refers to, to mux the specified phy.
45cd7e2b97SArınç ÜNAL
46cd7e2b97SArınç ÜNAL      The driver requires the gmac of the SoC to have "mediatek,eth-mac" as the
47a71fad0fSArınç ÜNAL      compatible string and the reg must be 1. So, for now, only gmac1 of a
48cd7e2b97SArınç ÜNAL      MediaTek SoC can benefit this. Banana Pi BPI-R2 suits this.
49cd7e2b97SArınç ÜNAL
50cd7e2b97SArınç ÜNAL      For the MT7621 SoCs, rgmii2 group must be claimed with rgmii2 function.
51a71fad0fSArınç ÜNAL
52cd7e2b97SArınç ÜNAL      Check out example 5.
53cd7e2b97SArınç ÜNAL
54a71fad0fSArınç ÜNAL    - For the multi-chip module MT7530, in case of an external phy wired to
55a71fad0fSArınç ÜNAL      gmac1 of the SoC, port 5 must not be enabled.
56cd7e2b97SArınç ÜNAL
57cd7e2b97SArınç ÜNAL      In case of muxing PHY 0 or 4, the external phy must not be enabled.
58cd7e2b97SArınç ÜNAL
59cd7e2b97SArınç ÜNAL      For the MT7621 SoCs, rgmii2 group must be claimed with rgmii2 function.
60a71fad0fSArınç ÜNAL
61cd7e2b97SArınç ÜNAL      Check out example 6.
62cd7e2b97SArınç ÜNAL
63a71fad0fSArınç ÜNAL    - Port 5 can be wired to an external phy. Port 5 becomes a DSA slave.
64cd7e2b97SArınç ÜNAL
65a71fad0fSArınç ÜNAL      For the multi-chip module MT7530, the external phy must be wired TX to TX
66a71fad0fSArınç ÜNAL      to gmac1 of the SoC for this to work. Ubiquiti EdgeRouter X SFP is wired
67a71fad0fSArınç ÜNAL      this way.
68a71fad0fSArınç ÜNAL
69a71fad0fSArınç ÜNAL      For the multi-chip module MT7530, muxing PHY 0 or 4 won't work when the
70a71fad0fSArınç ÜNAL      external phy is connected TX to TX.
71cd7e2b97SArınç ÜNAL
72cd7e2b97SArınç ÜNAL      For the MT7621 SoCs, rgmii2 group must be claimed with gpio function.
73a71fad0fSArınç ÜNAL
74cd7e2b97SArınç ÜNAL      Check out example 7.
75e0dda311SFrank Wunderlich
76e0dda311SFrank Wunderlichproperties:
77e0dda311SFrank Wunderlich  compatible:
78214537cdSArınç ÜNAL    oneOf:
79214537cdSArınç ÜNAL      - description:
80214537cdSArınç ÜNAL          Standalone MT7530 and multi-chip module MT7530 in MT7623AI SoC
81214537cdSArınç ÜNAL        const: mediatek,mt7530
82214537cdSArınç ÜNAL
83214537cdSArınç ÜNAL      - description:
84214537cdSArınç ÜNAL          Standalone MT7531
85214537cdSArınç ÜNAL        const: mediatek,mt7531
86214537cdSArınç ÜNAL
87214537cdSArınç ÜNAL      - description:
88214537cdSArınç ÜNAL          Multi-chip module MT7530 in MT7621AT, MT7621DAT and MT7621ST SoCs
89214537cdSArınç ÜNAL        const: mediatek,mt7621
90e0dda311SFrank Wunderlich
91*386f5fc9SDaniel Golle      - description:
92*386f5fc9SDaniel Golle          Built-in switch of the MT7988 SoC
93*386f5fc9SDaniel Golle        const: mediatek,mt7988-switch
94*386f5fc9SDaniel Golle
953359619aSRob Herring  reg:
963359619aSRob Herring    maxItems: 1
973359619aSRob Herring
98e0dda311SFrank Wunderlich  core-supply:
99e0dda311SFrank Wunderlich    description:
100e0dda311SFrank Wunderlich      Phandle to the regulator node necessary for the core power.
101e0dda311SFrank Wunderlich
102e0dda311SFrank Wunderlich  "#gpio-cells":
103e0dda311SFrank Wunderlich    const: 2
104e0dda311SFrank Wunderlich
105e0dda311SFrank Wunderlich  gpio-controller:
106e0dda311SFrank Wunderlich    type: boolean
1077d8c4891SArınç ÜNAL    description: |
1080fbca84eSArınç ÜNAL      If defined, LED controller of the MT7530 switch will run on GPIO mode.
1090fbca84eSArınç ÜNAL
1100fbca84eSArınç ÜNAL      There are 15 controllable pins.
1110fbca84eSArınç ÜNAL      port 0 LED 0..2 as GPIO 0..2
1120fbca84eSArınç ÜNAL      port 1 LED 0..2 as GPIO 3..5
1130fbca84eSArınç ÜNAL      port 2 LED 0..2 as GPIO 6..8
1140fbca84eSArınç ÜNAL      port 3 LED 0..2 as GPIO 9..11
1150fbca84eSArınç ÜNAL      port 4 LED 0..2 as GPIO 12..14
116e0dda311SFrank Wunderlich
117e0dda311SFrank Wunderlich  "#interrupt-cells":
118e0dda311SFrank Wunderlich    const: 1
119e0dda311SFrank Wunderlich
120e0dda311SFrank Wunderlich  interrupt-controller: true
121e0dda311SFrank Wunderlich
122e0dda311SFrank Wunderlich  interrupts:
123e0dda311SFrank Wunderlich    maxItems: 1
124e0dda311SFrank Wunderlich
125e0dda311SFrank Wunderlich  io-supply:
1267d8c4891SArınç ÜNAL    description: |
127e0dda311SFrank Wunderlich      Phandle to the regulator node necessary for the I/O power.
128214537cdSArınç ÜNAL      See Documentation/devicetree/bindings/regulator/mt6323-regulator.txt for
129214537cdSArınç ÜNAL      details for the regulator setup on these boards.
130e0dda311SFrank Wunderlich
131e0dda311SFrank Wunderlich  mediatek,mcm:
132e0dda311SFrank Wunderlich    type: boolean
133e0dda311SFrank Wunderlich    description:
134ba9476f7SArınç ÜNAL      Used for MT7621AT, MT7621DAT, MT7621ST and MT7623AI SoCs which the MT7530
135ba9476f7SArınç ÜNAL      switch is a part of the multi-chip module.
136e0dda311SFrank Wunderlich
137e0dda311SFrank Wunderlich  reset-gpios:
1387d8c4891SArınç ÜNAL    description: |
139f565c54eSArınç ÜNAL      GPIO to reset the switch. Use this if mediatek,mcm is not used.
140f565c54eSArınç ÜNAL      This property is optional because some boards share the reset line with
141f565c54eSArınç ÜNAL      other components which makes it impossible to probe the switch if the
142f565c54eSArınç ÜNAL      reset line is used.
143e0dda311SFrank Wunderlich    maxItems: 1
144e0dda311SFrank Wunderlich
145e0dda311SFrank Wunderlich  reset-names:
146e0dda311SFrank Wunderlich    const: mcm
147e0dda311SFrank Wunderlich
148e0dda311SFrank Wunderlich  resets:
149e0dda311SFrank Wunderlich    description:
150214537cdSArınç ÜNAL      Phandle pointing to the system reset controller with line index for the
151214537cdSArınç ÜNAL      ethsys.
152e0dda311SFrank Wunderlich    maxItems: 1
153e0dda311SFrank Wunderlich
154e0dda311SFrank WunderlichpatternProperties:
155e0dda311SFrank Wunderlich  "^(ethernet-)?ports$":
156e0dda311SFrank Wunderlich    type: object
157e0dda311SFrank Wunderlich
158e0dda311SFrank Wunderlich    patternProperties:
159e0dda311SFrank Wunderlich      "^(ethernet-)?port@[0-9]+$":
160e0dda311SFrank Wunderlich        type: object
161e0dda311SFrank Wunderlich
162e0dda311SFrank Wunderlich        properties:
163e0dda311SFrank Wunderlich          reg:
164e0dda311SFrank Wunderlich            description:
165214537cdSArınç ÜNAL              Port address described must be 5 or 6 for CPU port and from 0 to 5
166214537cdSArınç ÜNAL              for user ports.
167e0dda311SFrank Wunderlich
168e0dda311SFrank Wunderlich        allOf:
169e0dda311SFrank Wunderlich          - if:
1703f301a28SVladimir Oltean              required: [ ethernet ]
171e0dda311SFrank Wunderlich            then:
172214537cdSArınç ÜNAL              properties:
173214537cdSArınç ÜNAL                reg:
174214537cdSArınç ÜNAL                  enum:
175214537cdSArınç ÜNAL                    - 5
176214537cdSArınç ÜNAL                    - 6
177214537cdSArınç ÜNAL
178e0dda311SFrank Wunderlichrequired:
179e0dda311SFrank Wunderlich  - compatible
180e0dda311SFrank Wunderlich  - reg
181e0dda311SFrank Wunderlich
18279a16c3bSArınç ÜNAL$defs:
18379a16c3bSArınç ÜNAL  mt7530-dsa-port:
18479a16c3bSArınç ÜNAL    patternProperties:
18579a16c3bSArınç ÜNAL      "^(ethernet-)?ports$":
18679a16c3bSArınç ÜNAL        patternProperties:
18779a16c3bSArınç ÜNAL          "^(ethernet-)?port@[0-9]+$":
18879a16c3bSArınç ÜNAL            if:
1893f301a28SVladimir Oltean              required: [ ethernet ]
19079a16c3bSArınç ÜNAL            then:
19179a16c3bSArınç ÜNAL              if:
19279a16c3bSArınç ÜNAL                properties:
19379a16c3bSArınç ÜNAL                  reg:
19479a16c3bSArınç ÜNAL                    const: 5
19579a16c3bSArınç ÜNAL              then:
19679a16c3bSArınç ÜNAL                properties:
19779a16c3bSArınç ÜNAL                  phy-mode:
19879a16c3bSArınç ÜNAL                    enum:
19979a16c3bSArınç ÜNAL                      - gmii
20079a16c3bSArınç ÜNAL                      - mii
20179a16c3bSArınç ÜNAL                      - rgmii
20279a16c3bSArınç ÜNAL              else:
20379a16c3bSArınç ÜNAL                properties:
20479a16c3bSArınç ÜNAL                  phy-mode:
20579a16c3bSArınç ÜNAL                    enum:
20679a16c3bSArınç ÜNAL                      - rgmii
20779a16c3bSArınç ÜNAL                      - trgmii
20879a16c3bSArınç ÜNAL
20979a16c3bSArınç ÜNAL  mt7531-dsa-port:
21079a16c3bSArınç ÜNAL    patternProperties:
21179a16c3bSArınç ÜNAL      "^(ethernet-)?ports$":
21279a16c3bSArınç ÜNAL        patternProperties:
21379a16c3bSArınç ÜNAL          "^(ethernet-)?port@[0-9]+$":
21479a16c3bSArınç ÜNAL            if:
2153f301a28SVladimir Oltean              required: [ ethernet ]
21679a16c3bSArınç ÜNAL            then:
21779a16c3bSArınç ÜNAL              if:
21879a16c3bSArınç ÜNAL                properties:
21979a16c3bSArınç ÜNAL                  reg:
22079a16c3bSArınç ÜNAL                    const: 5
22179a16c3bSArınç ÜNAL              then:
22279a16c3bSArınç ÜNAL                properties:
22379a16c3bSArınç ÜNAL                  phy-mode:
22479a16c3bSArınç ÜNAL                    enum:
22579a16c3bSArınç ÜNAL                      - 1000base-x
22679a16c3bSArınç ÜNAL                      - 2500base-x
22779a16c3bSArınç ÜNAL                      - rgmii
22879a16c3bSArınç ÜNAL                      - sgmii
22979a16c3bSArınç ÜNAL              else:
23079a16c3bSArınç ÜNAL                properties:
23179a16c3bSArınç ÜNAL                  phy-mode:
23279a16c3bSArınç ÜNAL                    enum:
23379a16c3bSArınç ÜNAL                      - 1000base-x
23479a16c3bSArınç ÜNAL                      - 2500base-x
23579a16c3bSArınç ÜNAL                      - sgmii
23679a16c3bSArınç ÜNAL
237e0dda311SFrank WunderlichallOf:
2383cec368aSColin Foster  - $ref: dsa.yaml#/$defs/ethernet-ports
239e0dda311SFrank Wunderlich  - if:
240e0dda311SFrank Wunderlich      required:
241e0dda311SFrank Wunderlich        - mediatek,mcm
242e0dda311SFrank Wunderlich    then:
243f565c54eSArınç ÜNAL      properties:
244f565c54eSArınç ÜNAL        reset-gpios: false
245f565c54eSArınç ÜNAL
246e0dda311SFrank Wunderlich      required:
247e0dda311SFrank Wunderlich        - resets
248e0dda311SFrank Wunderlich        - reset-names
249e0dda311SFrank Wunderlich
250e0dda311SFrank Wunderlich  - dependencies:
251e0dda311SFrank Wunderlich      interrupt-controller: [ interrupts ]
252e0dda311SFrank Wunderlich
253e0dda311SFrank Wunderlich  - if:
254e0dda311SFrank Wunderlich      properties:
255e0dda311SFrank Wunderlich        compatible:
256214537cdSArınç ÜNAL          const: mediatek,mt7530
257e0dda311SFrank Wunderlich    then:
25879a16c3bSArınç ÜNAL      $ref: "#/$defs/mt7530-dsa-port"
259e0dda311SFrank Wunderlich      required:
260e0dda311SFrank Wunderlich        - core-supply
261e0dda311SFrank Wunderlich        - io-supply
262e0dda311SFrank Wunderlich
263f565c54eSArınç ÜNAL  - if:
264f565c54eSArınç ÜNAL      properties:
265f565c54eSArınç ÜNAL        compatible:
266f565c54eSArınç ÜNAL          const: mediatek,mt7531
267f565c54eSArınç ÜNAL    then:
26879a16c3bSArınç ÜNAL      $ref: "#/$defs/mt7531-dsa-port"
269f565c54eSArınç ÜNAL      properties:
2700fbca84eSArınç ÜNAL        gpio-controller: false
271f565c54eSArınç ÜNAL        mediatek,mcm: false
272f565c54eSArınç ÜNAL
273f565c54eSArınç ÜNAL  - if:
274f565c54eSArınç ÜNAL      properties:
275f565c54eSArınç ÜNAL        compatible:
276f565c54eSArınç ÜNAL          const: mediatek,mt7621
277f565c54eSArınç ÜNAL    then:
27879a16c3bSArınç ÜNAL      $ref: "#/$defs/mt7530-dsa-port"
279f565c54eSArınç ÜNAL      required:
280f565c54eSArınç ÜNAL        - mediatek,mcm
281f565c54eSArınç ÜNAL
282*386f5fc9SDaniel Golle  - if:
283*386f5fc9SDaniel Golle      properties:
284*386f5fc9SDaniel Golle        compatible:
285*386f5fc9SDaniel Golle          const: mediatek,mt7988-switch
286*386f5fc9SDaniel Golle    then:
287*386f5fc9SDaniel Golle      $ref: "#/$defs/mt7530-dsa-port"
288*386f5fc9SDaniel Golle      properties:
289*386f5fc9SDaniel Golle        gpio-controller: false
290*386f5fc9SDaniel Golle        mediatek,mcm: false
291*386f5fc9SDaniel Golle        reset-names: false
292*386f5fc9SDaniel Golle
293e0dda311SFrank WunderlichunevaluatedProperties: false
294e0dda311SFrank Wunderlich
295e0dda311SFrank Wunderlichexamples:
296c9aece04SArınç ÜNAL  # Example 1: Standalone MT7530
297e0dda311SFrank Wunderlich  - |
298e0dda311SFrank Wunderlich    #include <dt-bindings/gpio/gpio.h>
299c9aece04SArınç ÜNAL
300e0dda311SFrank Wunderlich    mdio {
301e0dda311SFrank Wunderlich        #address-cells = <1>;
302e0dda311SFrank Wunderlich        #size-cells = <0>;
303c9aece04SArınç ÜNAL
3043737c6aaSArınç ÜNAL        switch@1f {
305e0dda311SFrank Wunderlich            compatible = "mediatek,mt7530";
3063737c6aaSArınç ÜNAL            reg = <0x1f>;
307e0dda311SFrank Wunderlich
308c9aece04SArınç ÜNAL            reset-gpios = <&pio 33 0>;
309c9aece04SArınç ÜNAL
310e0dda311SFrank Wunderlich            core-supply = <&mt6323_vpa_reg>;
311e0dda311SFrank Wunderlich            io-supply = <&mt6323_vemc3v3_reg>;
312e0dda311SFrank Wunderlich
313e0dda311SFrank Wunderlich            ethernet-ports {
314e0dda311SFrank Wunderlich                #address-cells = <1>;
315e0dda311SFrank Wunderlich                #size-cells = <0>;
316c9aece04SArınç ÜNAL
317e0dda311SFrank Wunderlich                port@0 {
318e0dda311SFrank Wunderlich                    reg = <0>;
319c9aece04SArınç ÜNAL                    label = "lan1";
320e0dda311SFrank Wunderlich                };
321e0dda311SFrank Wunderlich
322e0dda311SFrank Wunderlich                port@1 {
323e0dda311SFrank Wunderlich                    reg = <1>;
324c9aece04SArınç ÜNAL                    label = "lan2";
325e0dda311SFrank Wunderlich                };
326e0dda311SFrank Wunderlich
327e0dda311SFrank Wunderlich                port@2 {
328e0dda311SFrank Wunderlich                    reg = <2>;
329c9aece04SArınç ÜNAL                    label = "lan3";
330e0dda311SFrank Wunderlich                };
331e0dda311SFrank Wunderlich
332e0dda311SFrank Wunderlich                port@3 {
333e0dda311SFrank Wunderlich                    reg = <3>;
334c9aece04SArınç ÜNAL                    label = "lan4";
335c9aece04SArınç ÜNAL                };
336c9aece04SArınç ÜNAL
337c9aece04SArınç ÜNAL                port@4 {
338c9aece04SArınç ÜNAL                    reg = <4>;
339c9aece04SArınç ÜNAL                    label = "wan";
340c9aece04SArınç ÜNAL                };
341c9aece04SArınç ÜNAL
342c9aece04SArınç ÜNAL                port@6 {
343c9aece04SArınç ÜNAL                    reg = <6>;
344c9aece04SArınç ÜNAL                    ethernet = <&gmac0>;
345c9aece04SArınç ÜNAL                    phy-mode = "rgmii";
346c9aece04SArınç ÜNAL
347c9aece04SArınç ÜNAL                    fixed-link {
348c9aece04SArınç ÜNAL                        speed = <1000>;
349c9aece04SArınç ÜNAL                        full-duplex;
350c9aece04SArınç ÜNAL                        pause;
351c9aece04SArınç ÜNAL                    };
352c9aece04SArınç ÜNAL                };
353c9aece04SArınç ÜNAL            };
354c9aece04SArınç ÜNAL        };
355c9aece04SArınç ÜNAL    };
356c9aece04SArınç ÜNAL
357c9aece04SArınç ÜNAL  # Example 2: MT7530 in MT7623AI SoC
358c9aece04SArınç ÜNAL  - |
359c9aece04SArınç ÜNAL    #include <dt-bindings/reset/mt2701-resets.h>
360c9aece04SArınç ÜNAL
361c9aece04SArınç ÜNAL    mdio {
362c9aece04SArınç ÜNAL        #address-cells = <1>;
363c9aece04SArınç ÜNAL        #size-cells = <0>;
364c9aece04SArınç ÜNAL
3653737c6aaSArınç ÜNAL        switch@1f {
366c9aece04SArınç ÜNAL            compatible = "mediatek,mt7530";
3673737c6aaSArınç ÜNAL            reg = <0x1f>;
368c9aece04SArınç ÜNAL
369c9aece04SArınç ÜNAL            mediatek,mcm;
370c9aece04SArınç ÜNAL            resets = <&ethsys MT2701_ETHSYS_MCM_RST>;
371c9aece04SArınç ÜNAL            reset-names = "mcm";
372c9aece04SArınç ÜNAL
373c9aece04SArınç ÜNAL            core-supply = <&mt6323_vpa_reg>;
374c9aece04SArınç ÜNAL            io-supply = <&mt6323_vemc3v3_reg>;
375c9aece04SArınç ÜNAL
376c9aece04SArınç ÜNAL            ethernet-ports {
377c9aece04SArınç ÜNAL                #address-cells = <1>;
378c9aece04SArınç ÜNAL                #size-cells = <0>;
379c9aece04SArınç ÜNAL
380c9aece04SArınç ÜNAL                port@0 {
381c9aece04SArınç ÜNAL                    reg = <0>;
382c9aece04SArınç ÜNAL                    label = "lan1";
383c9aece04SArınç ÜNAL                };
384c9aece04SArınç ÜNAL
385c9aece04SArınç ÜNAL                port@1 {
386c9aece04SArınç ÜNAL                    reg = <1>;
387c9aece04SArınç ÜNAL                    label = "lan2";
388c9aece04SArınç ÜNAL                };
389c9aece04SArınç ÜNAL
390c9aece04SArınç ÜNAL                port@2 {
391c9aece04SArınç ÜNAL                    reg = <2>;
392e0dda311SFrank Wunderlich                    label = "lan3";
393e0dda311SFrank Wunderlich                };
394e0dda311SFrank Wunderlich
395c9aece04SArınç ÜNAL                port@3 {
396c9aece04SArınç ÜNAL                    reg = <3>;
397c9aece04SArınç ÜNAL                    label = "lan4";
398c9aece04SArınç ÜNAL                };
399c9aece04SArınç ÜNAL
400e0dda311SFrank Wunderlich                port@4 {
401e0dda311SFrank Wunderlich                    reg = <4>;
402e0dda311SFrank Wunderlich                    label = "wan";
403e0dda311SFrank Wunderlich                };
404e0dda311SFrank Wunderlich
405e0dda311SFrank Wunderlich                port@6 {
406e0dda311SFrank Wunderlich                    reg = <6>;
407e0dda311SFrank Wunderlich                    ethernet = <&gmac0>;
408e0dda311SFrank Wunderlich                    phy-mode = "trgmii";
409e0dda311SFrank Wunderlich
410e0dda311SFrank Wunderlich                    fixed-link {
411e0dda311SFrank Wunderlich                        speed = <1000>;
412e0dda311SFrank Wunderlich                        full-duplex;
413e0dda311SFrank Wunderlich                        pause;
414e0dda311SFrank Wunderlich                    };
415e0dda311SFrank Wunderlich                };
416c9aece04SArınç ÜNAL            };
417c9aece04SArınç ÜNAL        };
418e0dda311SFrank Wunderlich    };
419e0dda311SFrank Wunderlich
420c9aece04SArınç ÜNAL  # Example 3: Standalone MT7531
421c9aece04SArınç ÜNAL  - |
422c9aece04SArınç ÜNAL    #include <dt-bindings/gpio/gpio.h>
423c9aece04SArınç ÜNAL    #include <dt-bindings/interrupt-controller/irq.h>
424c9aece04SArınç ÜNAL
425c9aece04SArınç ÜNAL    mdio {
426e0dda311SFrank Wunderlich        #address-cells = <1>;
427e0dda311SFrank Wunderlich        #size-cells = <0>;
428e0dda311SFrank Wunderlich
429c9aece04SArınç ÜNAL        switch@0 {
430c9aece04SArınç ÜNAL            compatible = "mediatek,mt7531";
431c9aece04SArınç ÜNAL            reg = <0>;
432e0dda311SFrank Wunderlich
433c9aece04SArınç ÜNAL            reset-gpios = <&pio 54 0>;
434e0dda311SFrank Wunderlich
435c9aece04SArınç ÜNAL            interrupt-controller;
436c9aece04SArınç ÜNAL            #interrupt-cells = <1>;
437c9aece04SArınç ÜNAL            interrupt-parent = <&pio>;
438c9aece04SArınç ÜNAL            interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
439e0dda311SFrank Wunderlich
440e0dda311SFrank Wunderlich            ethernet-ports {
441e0dda311SFrank Wunderlich                #address-cells = <1>;
442e0dda311SFrank Wunderlich                #size-cells = <0>;
443e0dda311SFrank Wunderlich
444e0dda311SFrank Wunderlich                port@0 {
445e0dda311SFrank Wunderlich                    reg = <0>;
446c9aece04SArınç ÜNAL                    label = "lan1";
447e0dda311SFrank Wunderlich                };
448e0dda311SFrank Wunderlich
449e0dda311SFrank Wunderlich                port@1 {
450e0dda311SFrank Wunderlich                    reg = <1>;
451c9aece04SArınç ÜNAL                    label = "lan2";
452e0dda311SFrank Wunderlich                };
453e0dda311SFrank Wunderlich
454e0dda311SFrank Wunderlich                port@2 {
455e0dda311SFrank Wunderlich                    reg = <2>;
456c9aece04SArınç ÜNAL                    label = "lan3";
457e0dda311SFrank Wunderlich                };
458e0dda311SFrank Wunderlich
459e0dda311SFrank Wunderlich                port@3 {
460e0dda311SFrank Wunderlich                    reg = <3>;
461c9aece04SArınç ÜNAL                    label = "lan4";
462c9aece04SArınç ÜNAL                };
463c9aece04SArınç ÜNAL
464c9aece04SArınç ÜNAL                port@4 {
465c9aece04SArınç ÜNAL                    reg = <4>;
466c9aece04SArınç ÜNAL                    label = "wan";
467c9aece04SArınç ÜNAL                };
468c9aece04SArınç ÜNAL
469c9aece04SArınç ÜNAL                port@6 {
470c9aece04SArınç ÜNAL                    reg = <6>;
471c9aece04SArınç ÜNAL                    ethernet = <&gmac0>;
472c9aece04SArınç ÜNAL                    phy-mode = "2500base-x";
473c9aece04SArınç ÜNAL
474c9aece04SArınç ÜNAL                    fixed-link {
475c9aece04SArınç ÜNAL                        speed = <2500>;
476c9aece04SArınç ÜNAL                        full-duplex;
477c9aece04SArınç ÜNAL                        pause;
478c9aece04SArınç ÜNAL                    };
479c9aece04SArınç ÜNAL                };
480c9aece04SArınç ÜNAL            };
481c9aece04SArınç ÜNAL        };
482c9aece04SArınç ÜNAL    };
483c9aece04SArınç ÜNAL
484c9aece04SArınç ÜNAL  # Example 4: MT7530 in MT7621AT, MT7621DAT and MT7621ST SoCs
485c9aece04SArınç ÜNAL  - |
486c9aece04SArınç ÜNAL    #include <dt-bindings/interrupt-controller/mips-gic.h>
487c9aece04SArınç ÜNAL    #include <dt-bindings/reset/mt7621-reset.h>
488c9aece04SArınç ÜNAL
489c9aece04SArınç ÜNAL    mdio {
490c9aece04SArınç ÜNAL        #address-cells = <1>;
491c9aece04SArınç ÜNAL        #size-cells = <0>;
492c9aece04SArınç ÜNAL
4933737c6aaSArınç ÜNAL        switch@1f {
494c9aece04SArınç ÜNAL            compatible = "mediatek,mt7621";
4953737c6aaSArınç ÜNAL            reg = <0x1f>;
496c9aece04SArınç ÜNAL
497c9aece04SArınç ÜNAL            mediatek,mcm;
498c9aece04SArınç ÜNAL            resets = <&sysc MT7621_RST_MCM>;
499c9aece04SArınç ÜNAL            reset-names = "mcm";
500c9aece04SArınç ÜNAL
501c9aece04SArınç ÜNAL            interrupt-controller;
502c9aece04SArınç ÜNAL            #interrupt-cells = <1>;
503c9aece04SArınç ÜNAL            interrupt-parent = <&gic>;
504c9aece04SArınç ÜNAL            interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
505c9aece04SArınç ÜNAL
506c9aece04SArınç ÜNAL            ethernet-ports {
507c9aece04SArınç ÜNAL                #address-cells = <1>;
508c9aece04SArınç ÜNAL                #size-cells = <0>;
509c9aece04SArınç ÜNAL
510c9aece04SArınç ÜNAL                port@0 {
511c9aece04SArınç ÜNAL                    reg = <0>;
512c9aece04SArınç ÜNAL                    label = "lan1";
513c9aece04SArınç ÜNAL                };
514c9aece04SArınç ÜNAL
515c9aece04SArınç ÜNAL                port@1 {
516c9aece04SArınç ÜNAL                    reg = <1>;
517c9aece04SArınç ÜNAL                    label = "lan2";
518c9aece04SArınç ÜNAL                };
519c9aece04SArınç ÜNAL
520c9aece04SArınç ÜNAL                port@2 {
521c9aece04SArınç ÜNAL                    reg = <2>;
522e0dda311SFrank Wunderlich                    label = "lan3";
523e0dda311SFrank Wunderlich                };
524e0dda311SFrank Wunderlich
525c9aece04SArınç ÜNAL                port@3 {
526c9aece04SArınç ÜNAL                    reg = <3>;
527c9aece04SArınç ÜNAL                    label = "lan4";
528c9aece04SArınç ÜNAL                };
529c9aece04SArınç ÜNAL
530e0dda311SFrank Wunderlich                port@4 {
531e0dda311SFrank Wunderlich                    reg = <4>;
532c9aece04SArınç ÜNAL                    label = "wan";
533c9aece04SArınç ÜNAL                };
534c9aece04SArınç ÜNAL
535c9aece04SArınç ÜNAL                port@6 {
536c9aece04SArınç ÜNAL                    reg = <6>;
537c9aece04SArınç ÜNAL                    ethernet = <&gmac0>;
538c9aece04SArınç ÜNAL                    phy-mode = "trgmii";
539c9aece04SArınç ÜNAL
540c9aece04SArınç ÜNAL                    fixed-link {
541c9aece04SArınç ÜNAL                        speed = <1000>;
542c9aece04SArınç ÜNAL                        full-duplex;
543c9aece04SArınç ÜNAL                        pause;
544c9aece04SArınç ÜNAL                    };
545c9aece04SArınç ÜNAL                };
546c9aece04SArınç ÜNAL            };
547c9aece04SArınç ÜNAL        };
548c9aece04SArınç ÜNAL    };
549c9aece04SArınç ÜNAL
550c9aece04SArınç ÜNAL  # Example 5: MT7621: mux MT7530's phy4 to SoC's gmac1
551c9aece04SArınç ÜNAL  - |
552c9aece04SArınç ÜNAL    #include <dt-bindings/interrupt-controller/mips-gic.h>
553c9aece04SArınç ÜNAL    #include <dt-bindings/reset/mt7621-reset.h>
554c9aece04SArınç ÜNAL
555c9aece04SArınç ÜNAL    ethernet {
556c9aece04SArınç ÜNAL        #address-cells = <1>;
557c9aece04SArınç ÜNAL        #size-cells = <0>;
558c9aece04SArınç ÜNAL
559c9aece04SArınç ÜNAL        pinctrl-names = "default";
560c9aece04SArınç ÜNAL        pinctrl-0 = <&rgmii2_pins>;
561c9aece04SArınç ÜNAL
562c9aece04SArınç ÜNAL        mac@1 {
563c9aece04SArınç ÜNAL            compatible = "mediatek,eth-mac";
564c9aece04SArınç ÜNAL            reg = <1>;
565c9aece04SArınç ÜNAL
566c9aece04SArınç ÜNAL            phy-mode = "rgmii";
567c9aece04SArınç ÜNAL            phy-handle = <&example5_ethphy4>;
568c9aece04SArınç ÜNAL        };
569c9aece04SArınç ÜNAL
570c9aece04SArınç ÜNAL        mdio {
571c9aece04SArınç ÜNAL            #address-cells = <1>;
572c9aece04SArınç ÜNAL            #size-cells = <0>;
573c9aece04SArınç ÜNAL
574c9aece04SArınç ÜNAL            /* MT7530's phy4 */
575c9aece04SArınç ÜNAL            example5_ethphy4: ethernet-phy@4 {
576c9aece04SArınç ÜNAL                reg = <4>;
577c9aece04SArınç ÜNAL            };
578c9aece04SArınç ÜNAL
5793737c6aaSArınç ÜNAL            switch@1f {
580c9aece04SArınç ÜNAL                compatible = "mediatek,mt7621";
5813737c6aaSArınç ÜNAL                reg = <0x1f>;
582c9aece04SArınç ÜNAL
583c9aece04SArınç ÜNAL                mediatek,mcm;
584c9aece04SArınç ÜNAL                resets = <&sysc MT7621_RST_MCM>;
585c9aece04SArınç ÜNAL                reset-names = "mcm";
586c9aece04SArınç ÜNAL
587c9aece04SArınç ÜNAL                interrupt-controller;
588c9aece04SArınç ÜNAL                #interrupt-cells = <1>;
589c9aece04SArınç ÜNAL                interrupt-parent = <&gic>;
590c9aece04SArınç ÜNAL                interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
591c9aece04SArınç ÜNAL
592c9aece04SArınç ÜNAL                ethernet-ports {
593c9aece04SArınç ÜNAL                    #address-cells = <1>;
594c9aece04SArınç ÜNAL                    #size-cells = <0>;
595c9aece04SArınç ÜNAL
596c9aece04SArınç ÜNAL                    port@0 {
597c9aece04SArınç ÜNAL                        reg = <0>;
598c9aece04SArınç ÜNAL                        label = "lan1";
599c9aece04SArınç ÜNAL                    };
600c9aece04SArınç ÜNAL
601c9aece04SArınç ÜNAL                    port@1 {
602c9aece04SArınç ÜNAL                        reg = <1>;
603c9aece04SArınç ÜNAL                        label = "lan2";
604c9aece04SArınç ÜNAL                    };
605c9aece04SArınç ÜNAL
606c9aece04SArınç ÜNAL                    port@2 {
607c9aece04SArınç ÜNAL                        reg = <2>;
608c9aece04SArınç ÜNAL                        label = "lan3";
609c9aece04SArınç ÜNAL                    };
610c9aece04SArınç ÜNAL
611c9aece04SArınç ÜNAL                    port@3 {
612c9aece04SArınç ÜNAL                        reg = <3>;
613e0dda311SFrank Wunderlich                        label = "lan4";
614e0dda311SFrank Wunderlich                    };
615c9aece04SArınç ÜNAL
616a71fad0fSArınç ÜNAL                    /* Commented out, phy4 is connected to gmac1.
617c9aece04SArınç ÜNAL                    port@4 {
618c9aece04SArınç ÜNAL                        reg = <4>;
619c9aece04SArınç ÜNAL                        label = "wan";
620c9aece04SArınç ÜNAL                    };
621e0dda311SFrank Wunderlich                    */
622e0dda311SFrank Wunderlich
623e0dda311SFrank Wunderlich                    port@6 {
624e0dda311SFrank Wunderlich                        reg = <6>;
625e0dda311SFrank Wunderlich                        ethernet = <&gmac0>;
626c9aece04SArınç ÜNAL                        phy-mode = "trgmii";
627e0dda311SFrank Wunderlich
628e0dda311SFrank Wunderlich                        fixed-link {
629e0dda311SFrank Wunderlich                            speed = <1000>;
630e0dda311SFrank Wunderlich                            full-duplex;
631e0dda311SFrank Wunderlich                            pause;
632e0dda311SFrank Wunderlich                        };
633e0dda311SFrank Wunderlich                    };
634e0dda311SFrank Wunderlich                };
635e0dda311SFrank Wunderlich            };
636e0dda311SFrank Wunderlich        };
637e0dda311SFrank Wunderlich    };
638e0dda311SFrank Wunderlich
639c9aece04SArınç ÜNAL  # Example 6: MT7621: mux external phy to SoC's gmac1
640e0dda311SFrank Wunderlich  - |
641c9aece04SArınç ÜNAL    #include <dt-bindings/interrupt-controller/mips-gic.h>
642c9aece04SArınç ÜNAL    #include <dt-bindings/reset/mt7621-reset.h>
643e0dda311SFrank Wunderlich
644e0dda311SFrank Wunderlich    ethernet {
645e0dda311SFrank Wunderlich        #address-cells = <1>;
646e0dda311SFrank Wunderlich        #size-cells = <0>;
647c9aece04SArınç ÜNAL
648c9aece04SArınç ÜNAL        pinctrl-names = "default";
649c9aece04SArınç ÜNAL        pinctrl-0 = <&rgmii2_pins>;
650c9aece04SArınç ÜNAL
651c9aece04SArınç ÜNAL        mac@1 {
652e0dda311SFrank Wunderlich            compatible = "mediatek,eth-mac";
653c9aece04SArınç ÜNAL            reg = <1>;
654c9aece04SArınç ÜNAL
655e0dda311SFrank Wunderlich            phy-mode = "rgmii";
656c9aece04SArınç ÜNAL            phy-handle = <&example6_ethphy7>;
657e0dda311SFrank Wunderlich        };
658e0dda311SFrank Wunderlich
659c9aece04SArınç ÜNAL        mdio {
660e0dda311SFrank Wunderlich            #address-cells = <1>;
661e0dda311SFrank Wunderlich            #size-cells = <0>;
662e0dda311SFrank Wunderlich
663c9aece04SArınç ÜNAL            /* External PHY */
664c9aece04SArınç ÜNAL            example6_ethphy7: ethernet-phy@7 {
665e0dda311SFrank Wunderlich                reg = <7>;
666c9aece04SArınç ÜNAL                phy-mode = "rgmii";
667e0dda311SFrank Wunderlich            };
668e0dda311SFrank Wunderlich
6693737c6aaSArınç ÜNAL            switch@1f {
670e0dda311SFrank Wunderlich                compatible = "mediatek,mt7621";
6713737c6aaSArınç ÜNAL                reg = <0x1f>;
672e0dda311SFrank Wunderlich
673c9aece04SArınç ÜNAL                mediatek,mcm;
674c9aece04SArınç ÜNAL                resets = <&sysc MT7621_RST_MCM>;
675e0dda311SFrank Wunderlich                reset-names = "mcm";
676e0dda311SFrank Wunderlich
677c9aece04SArınç ÜNAL                interrupt-controller;
678c9aece04SArınç ÜNAL                #interrupt-cells = <1>;
679c9aece04SArınç ÜNAL                interrupt-parent = <&gic>;
680c9aece04SArınç ÜNAL                interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
681c9aece04SArınç ÜNAL
682e0dda311SFrank Wunderlich                ethernet-ports {
683e0dda311SFrank Wunderlich                    #address-cells = <1>;
684e0dda311SFrank Wunderlich                    #size-cells = <0>;
685e0dda311SFrank Wunderlich
686e0dda311SFrank Wunderlich                    port@0 {
687e0dda311SFrank Wunderlich                        reg = <0>;
688c9aece04SArınç ÜNAL                        label = "lan1";
689e0dda311SFrank Wunderlich                    };
690e0dda311SFrank Wunderlich
691e0dda311SFrank Wunderlich                    port@1 {
692e0dda311SFrank Wunderlich                        reg = <1>;
693c9aece04SArınç ÜNAL                        label = "lan2";
694e0dda311SFrank Wunderlich                    };
695e0dda311SFrank Wunderlich
696e0dda311SFrank Wunderlich                    port@2 {
697e0dda311SFrank Wunderlich                        reg = <2>;
698c9aece04SArınç ÜNAL                        label = "lan3";
699e0dda311SFrank Wunderlich                    };
700e0dda311SFrank Wunderlich
701e0dda311SFrank Wunderlich                    port@3 {
702e0dda311SFrank Wunderlich                        reg = <3>;
703c9aece04SArınç ÜNAL                        label = "lan4";
704e0dda311SFrank Wunderlich                    };
705e0dda311SFrank Wunderlich
706e0dda311SFrank Wunderlich                    port@4 {
707e0dda311SFrank Wunderlich                        reg = <4>;
708c9aece04SArınç ÜNAL                        label = "wan";
709c9aece04SArınç ÜNAL                    };
710c9aece04SArınç ÜNAL
711c9aece04SArınç ÜNAL                    port@6 {
712c9aece04SArınç ÜNAL                        reg = <6>;
713c9aece04SArınç ÜNAL                        ethernet = <&gmac0>;
714c9aece04SArınç ÜNAL                        phy-mode = "trgmii";
715c9aece04SArınç ÜNAL
716c9aece04SArınç ÜNAL                        fixed-link {
717c9aece04SArınç ÜNAL                            speed = <1000>;
718c9aece04SArınç ÜNAL                            full-duplex;
719c9aece04SArınç ÜNAL                            pause;
720c9aece04SArınç ÜNAL                        };
721c9aece04SArınç ÜNAL                    };
722c9aece04SArınç ÜNAL                };
723c9aece04SArınç ÜNAL            };
724c9aece04SArınç ÜNAL        };
725c9aece04SArınç ÜNAL    };
726c9aece04SArınç ÜNAL
727c9aece04SArınç ÜNAL  # Example 7: MT7621: mux external phy to MT7530's port 5
728c9aece04SArınç ÜNAL  - |
729c9aece04SArınç ÜNAL    #include <dt-bindings/interrupt-controller/mips-gic.h>
730c9aece04SArınç ÜNAL    #include <dt-bindings/reset/mt7621-reset.h>
731c9aece04SArınç ÜNAL
732c9aece04SArınç ÜNAL    ethernet {
733c9aece04SArınç ÜNAL        #address-cells = <1>;
734c9aece04SArınç ÜNAL        #size-cells = <0>;
735c9aece04SArınç ÜNAL
736c9aece04SArınç ÜNAL        pinctrl-names = "default";
737c9aece04SArınç ÜNAL        pinctrl-0 = <&rgmii2_pins>;
738c9aece04SArınç ÜNAL
739c9aece04SArınç ÜNAL        mdio {
740c9aece04SArınç ÜNAL            #address-cells = <1>;
741c9aece04SArınç ÜNAL            #size-cells = <0>;
742c9aece04SArınç ÜNAL
743c9aece04SArınç ÜNAL            /* External PHY */
744c9aece04SArınç ÜNAL            example7_ethphy7: ethernet-phy@7 {
745c9aece04SArınç ÜNAL                reg = <7>;
746c9aece04SArınç ÜNAL                phy-mode = "rgmii";
747c9aece04SArınç ÜNAL            };
748c9aece04SArınç ÜNAL
7493737c6aaSArınç ÜNAL            switch@1f {
750c9aece04SArınç ÜNAL                compatible = "mediatek,mt7621";
7513737c6aaSArınç ÜNAL                reg = <0x1f>;
752c9aece04SArınç ÜNAL
753c9aece04SArınç ÜNAL                mediatek,mcm;
754c9aece04SArınç ÜNAL                resets = <&sysc MT7621_RST_MCM>;
755c9aece04SArınç ÜNAL                reset-names = "mcm";
756c9aece04SArınç ÜNAL
757c9aece04SArınç ÜNAL                interrupt-controller;
758c9aece04SArınç ÜNAL                #interrupt-cells = <1>;
759c9aece04SArınç ÜNAL                interrupt-parent = <&gic>;
760c9aece04SArınç ÜNAL                interrupts = <GIC_SHARED 23 IRQ_TYPE_LEVEL_HIGH>;
761c9aece04SArınç ÜNAL
762c9aece04SArınç ÜNAL                ethernet-ports {
763c9aece04SArınç ÜNAL                    #address-cells = <1>;
764c9aece04SArınç ÜNAL                    #size-cells = <0>;
765c9aece04SArınç ÜNAL
766c9aece04SArınç ÜNAL                    port@0 {
767c9aece04SArınç ÜNAL                        reg = <0>;
768c9aece04SArınç ÜNAL                        label = "lan1";
769c9aece04SArınç ÜNAL                    };
770c9aece04SArınç ÜNAL
771c9aece04SArınç ÜNAL                    port@1 {
772c9aece04SArınç ÜNAL                        reg = <1>;
773c9aece04SArınç ÜNAL                        label = "lan2";
774c9aece04SArınç ÜNAL                    };
775c9aece04SArınç ÜNAL
776c9aece04SArınç ÜNAL                    port@2 {
777c9aece04SArınç ÜNAL                        reg = <2>;
778c9aece04SArınç ÜNAL                        label = "lan3";
779c9aece04SArınç ÜNAL                    };
780c9aece04SArınç ÜNAL
781c9aece04SArınç ÜNAL                    port@3 {
782c9aece04SArınç ÜNAL                        reg = <3>;
783e0dda311SFrank Wunderlich                        label = "lan4";
784e0dda311SFrank Wunderlich                    };
785e0dda311SFrank Wunderlich
786c9aece04SArınç ÜNAL                    port@4 {
787c9aece04SArınç ÜNAL                        reg = <4>;
788c9aece04SArınç ÜNAL                        label = "wan";
789c9aece04SArınç ÜNAL                    };
790c9aece04SArınç ÜNAL
791e0dda311SFrank Wunderlich                    port@5 {
792e0dda311SFrank Wunderlich                        reg = <5>;
793c9aece04SArınç ÜNAL                        label = "extphy";
794c9aece04SArınç ÜNAL                        phy-mode = "rgmii-txid";
795c9aece04SArınç ÜNAL                        phy-handle = <&example7_ethphy7>;
796e0dda311SFrank Wunderlich                    };
797e0dda311SFrank Wunderlich
798c9aece04SArınç ÜNAL                    port@6 {
799e0dda311SFrank Wunderlich                        reg = <6>;
800c9aece04SArınç ÜNAL                        ethernet = <&gmac0>;
801c9aece04SArınç ÜNAL                        phy-mode = "trgmii";
802e0dda311SFrank Wunderlich
803e0dda311SFrank Wunderlich                        fixed-link {
804e0dda311SFrank Wunderlich                            speed = <1000>;
805e0dda311SFrank Wunderlich                            full-duplex;
806e0dda311SFrank Wunderlich                            pause;
807e0dda311SFrank Wunderlich                        };
808e0dda311SFrank Wunderlich                    };
809e0dda311SFrank Wunderlich                };
810e0dda311SFrank Wunderlich            };
811e0dda311SFrank Wunderlich        };
812e0dda311SFrank Wunderlich    };
813