1*72f47aecSJisheng Zhang# SPDX-License-Identifier: GPL-2.0 2*72f47aecSJisheng Zhang%YAML 1.2 3*72f47aecSJisheng Zhang--- 4*72f47aecSJisheng Zhang$id: http://devicetree.org/schemas/mmc/mmc-pwrseq-simple.yaml# 5*72f47aecSJisheng Zhang$schema: http://devicetree.org/meta-schemas/core.yaml# 6*72f47aecSJisheng Zhang 7*72f47aecSJisheng Zhangtitle: Simple MMC power sequence provider binding 8*72f47aecSJisheng Zhang 9*72f47aecSJisheng Zhangmaintainers: 10*72f47aecSJisheng Zhang - Ulf Hansson <ulf.hansson@linaro.org> 11*72f47aecSJisheng Zhang 12*72f47aecSJisheng Zhangdescription: 13*72f47aecSJisheng Zhang The purpose of the simple MMC power sequence provider is to supports a set 14*72f47aecSJisheng Zhang of common properties between various SOC designs. It thus enables us to use 15*72f47aecSJisheng Zhang the same provider for several SOC designs. 16*72f47aecSJisheng Zhang 17*72f47aecSJisheng Zhangproperties: 18*72f47aecSJisheng Zhang compatible: 19*72f47aecSJisheng Zhang const: mmc-pwrseq-simple 20*72f47aecSJisheng Zhang 21*72f47aecSJisheng Zhang reset-gpios: 22*72f47aecSJisheng Zhang minItems: 1 23*72f47aecSJisheng Zhang description: 24*72f47aecSJisheng Zhang contains a list of GPIO specifiers. The reset GPIOs are asserted 25*72f47aecSJisheng Zhang at initialization and prior we start the power up procedure of the card. 26*72f47aecSJisheng Zhang They will be de-asserted right after the power has been provided to the 27*72f47aecSJisheng Zhang card. 28*72f47aecSJisheng Zhang 29*72f47aecSJisheng Zhang clocks: 30*72f47aecSJisheng Zhang minItems: 1 31*72f47aecSJisheng Zhang description: Handle for the entry in clock-names. 32*72f47aecSJisheng Zhang 33*72f47aecSJisheng Zhang clock-names: 34*72f47aecSJisheng Zhang items: 35*72f47aecSJisheng Zhang - const: ext_clock 36*72f47aecSJisheng Zhang description: External clock provided to the card. 37*72f47aecSJisheng Zhang 38*72f47aecSJisheng Zhang post-power-on-delay-ms: 39*72f47aecSJisheng Zhang description: 40*72f47aecSJisheng Zhang Delay in ms after powering the card and de-asserting the 41*72f47aecSJisheng Zhang reset-gpios (if any). 42*72f47aecSJisheng Zhang $ref: /schemas/types.yaml#/definitions/uint32 43*72f47aecSJisheng Zhang 44*72f47aecSJisheng Zhang power-off-delay-us: 45*72f47aecSJisheng Zhang description: 46*72f47aecSJisheng Zhang Delay in us after asserting the reset-gpios (if any) 47*72f47aecSJisheng Zhang during power off of the card. 48*72f47aecSJisheng Zhang $ref: /schemas/types.yaml#/definitions/uint32 49*72f47aecSJisheng Zhang 50*72f47aecSJisheng Zhangrequired: 51*72f47aecSJisheng Zhang - compatible 52*72f47aecSJisheng Zhang 53*72f47aecSJisheng Zhangexamples: 54*72f47aecSJisheng Zhang - | 55*72f47aecSJisheng Zhang #include <dt-bindings/gpio/gpio.h> 56*72f47aecSJisheng Zhang sdhci0_pwrseq { 57*72f47aecSJisheng Zhang compatible = "mmc-pwrseq-simple"; 58*72f47aecSJisheng Zhang reset-gpios = <&gpio1 12 GPIO_ACTIVE_LOW>; 59*72f47aecSJisheng Zhang clocks = <&clk_32768_ck>; 60*72f47aecSJisheng Zhang clock-names = "ext_clock"; 61*72f47aecSJisheng Zhang }; 62*72f47aecSJisheng Zhang... 63