1*b1d9d6cbSPeng Hao* QEMU PVPANIC MMIO Configuration bindings 2*b1d9d6cbSPeng Hao 3*b1d9d6cbSPeng HaoQEMU's emulation / virtualization targets provide the following PVPANIC 4*b1d9d6cbSPeng HaoMMIO Configuration interface on the "virt" machine. 5*b1d9d6cbSPeng Haotype: 6*b1d9d6cbSPeng Hao 7*b1d9d6cbSPeng Hao- a read-write, 16-bit wide data register. 8*b1d9d6cbSPeng Hao 9*b1d9d6cbSPeng HaoQEMU exposes the data register to guests as memory mapped registers. 10*b1d9d6cbSPeng Hao 11*b1d9d6cbSPeng HaoRequired properties: 12*b1d9d6cbSPeng Hao 13*b1d9d6cbSPeng Hao- compatible: "qemu,pvpanic-mmio". 14*b1d9d6cbSPeng Hao- reg: the MMIO region used by the device. 15*b1d9d6cbSPeng Hao * Bytes 0x0 Write panic event to the reg when guest OS panics. 16*b1d9d6cbSPeng Hao * Bytes 0x1 Reserved. 17*b1d9d6cbSPeng Hao 18*b1d9d6cbSPeng HaoExample: 19*b1d9d6cbSPeng Hao 20*b1d9d6cbSPeng Hao/ { 21*b1d9d6cbSPeng Hao #size-cells = <0x2>; 22*b1d9d6cbSPeng Hao #address-cells = <0x2>; 23*b1d9d6cbSPeng Hao 24*b1d9d6cbSPeng Hao pvpanic-mmio@9060000 { 25*b1d9d6cbSPeng Hao compatible = "qemu,pvpanic-mmio"; 26*b1d9d6cbSPeng Hao reg = <0x0 0x9060000 0x0 0x2>; 27*b1d9d6cbSPeng Hao }; 28*b1d9d6cbSPeng Hao}; 29*b1d9d6cbSPeng Hao 30