1*ce210d35SDavid Daney* Central Interrupt Unit v3 2*ce210d35SDavid Daney 3*ce210d35SDavid DaneyProperties: 4*ce210d35SDavid Daney- compatible: "cavium,octeon-7890-ciu3" 5*ce210d35SDavid Daney 6*ce210d35SDavid Daney Compatibility with 78XX and 73XX SOCs. 7*ce210d35SDavid Daney 8*ce210d35SDavid Daney- interrupt-controller: This is an interrupt controller. 9*ce210d35SDavid Daney 10*ce210d35SDavid Daney- reg: The base address of the CIU's register bank. 11*ce210d35SDavid Daney 12*ce210d35SDavid Daney- #interrupt-cells: Must be <2>. The first cell is source number. 13*ce210d35SDavid Daney The second cell indicates the triggering semantics, and may have a 14*ce210d35SDavid Daney value of either 4 for level semantics, or 1 for edge semantics. 15*ce210d35SDavid Daney 16*ce210d35SDavid DaneyExample: 17*ce210d35SDavid Daney interrupt-controller@1010000000000 { 18*ce210d35SDavid Daney compatible = "cavium,octeon-7890-ciu3"; 19*ce210d35SDavid Daney interrupt-controller; 20*ce210d35SDavid Daney /* Interrupts are specified by two parts: 21*ce210d35SDavid Daney * 1) Source number (20 significant bits) 22*ce210d35SDavid Daney * 2) Trigger type: (4 == level, 1 == edge) 23*ce210d35SDavid Daney */ 24*ce210d35SDavid Daney #address-cells = <0>; 25*ce210d35SDavid Daney #interrupt-cells = <2>; 26*ce210d35SDavid Daney reg = <0x10100 0x00000000 0x0 0xb0000000>; 27*ce210d35SDavid Daney }; 28