xref: /openbmc/linux/Documentation/devicetree/bindings/mfd/mxs-lradc.txt (revision cf40a76e7d5874bb25f4404eecc58a2e033af885)
1*b2d47640SKsenija Stanojevic* Freescale MXS LRADC device driver
2*b2d47640SKsenija Stanojevic
3*b2d47640SKsenija StanojevicRequired properties:
4*b2d47640SKsenija Stanojevic- compatible: Should be "fsl,imx23-lradc" for i.MX23 SoC and "fsl,imx28-lradc"
5*b2d47640SKsenija Stanojevic              for i.MX28 SoC
6*b2d47640SKsenija Stanojevic- reg: Address and length of the register set for the device
7*b2d47640SKsenija Stanojevic- interrupts: Should contain the LRADC interrupts
8*b2d47640SKsenija Stanojevic
9*b2d47640SKsenija StanojevicOptional properties:
10*b2d47640SKsenija Stanojevic- fsl,lradc-touchscreen-wires: Number of wires used to connect the touchscreen
11*b2d47640SKsenija Stanojevic                               to LRADC. Valid value is either 4 or 5. If this
12*b2d47640SKsenija Stanojevic                               property is not present, then the touchscreen is
13*b2d47640SKsenija Stanojevic                               disabled. 5 wires is valid for i.MX28 SoC only.
14*b2d47640SKsenija Stanojevic- fsl,ave-ctrl: number of samples per direction to calculate an average value.
15*b2d47640SKsenija Stanojevic                Allowed value is 1 ... 32, default is 4
16*b2d47640SKsenija Stanojevic- fsl,ave-delay: delay between consecutive samples. Allowed value is
17*b2d47640SKsenija Stanojevic                 2 ... 2048. It is used if 'fsl,ave-ctrl' > 1, counts at
18*b2d47640SKsenija Stanojevic                 2 kHz and its default is 2 (= 1 ms)
19*b2d47640SKsenija Stanojevic- fsl,settling: delay between plate switch to next sample. Allowed value is
20*b2d47640SKsenija Stanojevic                1 ... 2047. It counts at 2 kHz and its default is
21*b2d47640SKsenija Stanojevic                10 (= 5 ms)
22*b2d47640SKsenija Stanojevic
23*b2d47640SKsenija StanojevicExample for i.MX23 SoC:
24*b2d47640SKsenija Stanojevic
25*b2d47640SKsenija Stanojevic	lradc@80050000 {
26*b2d47640SKsenija Stanojevic		compatible = "fsl,imx23-lradc";
27*b2d47640SKsenija Stanojevic		reg = <0x80050000 0x2000>;
28*b2d47640SKsenija Stanojevic		interrupts = <36 37 38 39 40 41 42 43 44>;
29*b2d47640SKsenija Stanojevic		fsl,lradc-touchscreen-wires = <4>;
30*b2d47640SKsenija Stanojevic		fsl,ave-ctrl = <4>;
31*b2d47640SKsenija Stanojevic		fsl,ave-delay = <2>;
32*b2d47640SKsenija Stanojevic		fsl,settling = <10>;
33*b2d47640SKsenija Stanojevic	};
34*b2d47640SKsenija Stanojevic
35*b2d47640SKsenija StanojevicExample for i.MX28 SoC:
36*b2d47640SKsenija Stanojevic
37*b2d47640SKsenija Stanojevic	lradc@80050000 {
38*b2d47640SKsenija Stanojevic		compatible = "fsl,imx28-lradc";
39*b2d47640SKsenija Stanojevic		reg = <0x80050000 0x2000>;
40*b2d47640SKsenija Stanojevic		interrupts = <10 14 15 16 17 18 19 20 21 22 23 24 25>;
41*b2d47640SKsenija Stanojevic		fsl,lradc-touchscreen-wires = <5>;
42*b2d47640SKsenija Stanojevic		fsl,ave-ctrl = <4>;
43*b2d47640SKsenija Stanojevic		fsl,ave-delay = <2>;
44*b2d47640SKsenija Stanojevic		fsl,settling = <10>;
45*b2d47640SKsenija Stanojevic	};
46