xref: /openbmc/linux/Documentation/devicetree/bindings/media/samsung,exynos4212-fimc-is.yaml (revision 1ac731c529cd4d6adbce134754b51ff7d822b145)

# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/media/samsung,exynos4212-fimc-is.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Samsung Exynos4212/4412 SoC Imaging Subsystem (FIMC-IS)

maintainers:
  - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
  - Sylwester Nawrocki <s.nawrocki@samsung.com>

description:
  The FIMC-IS is a subsystem for processing image signal from an image sensor.
  The Exynos4x12 SoC series FIMC-IS V1.5 comprises of a dedicated ARM Cortex-A5
  processor, ISP, DRC and FD IP blocks and peripheral devices such as UART, I2C
  and SPI bus controllers, PWM and ADC.

properties:
  compatible:
    enum:
      - samsung,exynos4212-fimc-is

  reg:
    maxItems: 1

  ranges: true

  '#address-cells':
    const: 1

  '#size-cells':
    const: 1

  clocks:
    maxItems: 21

  clock-names:
    items:
      - const: lite0
      - const: lite1
      - const: ppmuispx
      - const: ppmuispmx
      - const: isp
      - const: drc
      - const: fd
      - const: mcuisp
      - const: gicisp
      - const: mcuctl_isp
      - const: pwm_isp
      - const: ispdiv0
      - const: ispdiv1
      - const: mcuispdiv0
      - const: mcuispdiv1
      - const: mpll
      - const: aclk200
      - const: aclk400mcuisp
      - const: div_aclk200
      - const: div_aclk400mcuisp
      - const: uart

  interrupts:
    maxItems: 2

  iommus:
    maxItems: 4

  iommu-names:
    items:
      - const: isp
      - const: drc
      - const: fd
      - const: mcuctl

  power-domains:
    maxItems: 1

patternProperties:
  "^pmu@[0-9a-f]+$":
    type: object
    additionalProperties: false
    description:
      Node representing the SoC's Power Management Unit (duplicated with the
      correct PMU node in the SoC).

    properties:
      reg:
        maxItems: 1

    required:
      - reg

  "^i2c-isp@[0-9a-f]+$":
    type: object
    $ref: /schemas/i2c/i2c-controller.yaml#
    unevaluatedProperties: false
    description:
      ISP I2C bus controller

    properties:
      compatible:
        const: samsung,exynos4212-i2c-isp

      reg:
        maxItems: 1


      clocks:
        maxItems: 1

      clock-names:
        items:
          - const: i2c_isp

      pinctrl-0: true
      pinctrl-names:
        items:
          - const: default

    required:
      - compatible
      - reg
      - clocks
      - clock-names

required:
  - compatible
  - reg
  - '#address-cells'
  - clocks
  - clock-names
  - interrupts
  - ranges
  - '#size-cells'

additionalProperties: false

examples:
  - |
    #include <dt-bindings/clock/exynos4.h>
    #include <dt-bindings/gpio/gpio.h>
    #include <dt-bindings/interrupt-controller/arm-gic.h>

    fimc-is@12000000 {
        compatible = "samsung,exynos4212-fimc-is";
        reg = <0x12000000 0x260000>;
        interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>,
                     <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
        clocks = <&isp_clock CLK_ISP_FIMC_LITE0>,
                 <&isp_clock CLK_ISP_FIMC_LITE1>,
                 <&isp_clock CLK_ISP_PPMUISPX>,
                 <&isp_clock CLK_ISP_PPMUISPMX>,
                 <&isp_clock CLK_ISP_FIMC_ISP>,
                 <&isp_clock CLK_ISP_FIMC_DRC>,
                 <&isp_clock CLK_ISP_FIMC_FD>,
                 <&isp_clock CLK_ISP_MCUISP>,
                 <&isp_clock CLK_ISP_GICISP>,
                 <&isp_clock CLK_ISP_MCUCTL_ISP>,
                 <&isp_clock CLK_ISP_PWM_ISP>,
                 <&isp_clock CLK_ISP_DIV_ISP0>,
                 <&isp_clock CLK_ISP_DIV_ISP1>,
                 <&isp_clock CLK_ISP_DIV_MCUISP0>,
                 <&isp_clock CLK_ISP_DIV_MCUISP1>,
                 <&clock CLK_MOUT_MPLL_USER_T>,
                 <&clock CLK_ACLK200>,
                 <&clock CLK_ACLK400_MCUISP>,
                 <&clock CLK_DIV_ACLK200>,
                 <&clock CLK_DIV_ACLK400_MCUISP>,
                 <&clock CLK_UART_ISP_SCLK>;
        clock-names = "lite0", "lite1", "ppmuispx",
                      "ppmuispmx", "isp",
                      "drc", "fd", "mcuisp",
                      "gicisp", "mcuctl_isp", "pwm_isp",
                      "ispdiv0", "ispdiv1", "mcuispdiv0",
                      "mcuispdiv1", "mpll", "aclk200",
                      "aclk400mcuisp", "div_aclk200",
                      "div_aclk400mcuisp", "uart";
        iommus = <&sysmmu_fimc_isp>, <&sysmmu_fimc_drc>,
                 <&sysmmu_fimc_fd>, <&sysmmu_fimc_mcuctl>;
        iommu-names = "isp", "drc", "fd", "mcuctl";
        power-domains = <&pd_isp>;

        #address-cells = <1>;
        #size-cells = <1>;
        ranges;

        pmu@10020000 {
            reg = <0x10020000 0x3000>;
        };

        i2c-isp@12140000 {
            compatible = "samsung,exynos4212-i2c-isp";
            reg = <0x12140000 0x100>;
            clocks = <&isp_clock CLK_ISP_I2C1_ISP>;
            clock-names = "i2c_isp";
            pinctrl-0 = <&fimc_is_i2c1>;
            pinctrl-names = "default";
            #address-cells = <1>;
            #size-cells = <0>;

            image-sensor@10 {
                compatible = "samsung,s5k6a3";
                reg = <0x10>;
                svdda-supply = <&cam_io_reg>;
                svddio-supply = <&ldo19_reg>;
                afvdd-supply = <&ldo19_reg>;
                clock-frequency = <24000000>;
                clocks = <&camera 1>;
                clock-names = "extclk";
                gpios = <&gpm1 6 GPIO_ACTIVE_LOW>;

                port {
                    endpoint {
                        remote-endpoint = <&csis1_ep>;
                        data-lanes = <1>;
                    };
                };
            };
        };
    };