xref: /openbmc/linux/Documentation/devicetree/bindings/media/renesas,vin.yaml (revision 90c3493e4d9e2e1450b5d3ffd314ff350f5132a0)
1905fc6b1SNiklas Söderlund# SPDX-License-Identifier: GPL-2.0-only
2905fc6b1SNiklas Söderlund# Copyright (C) 2020 Renesas Electronics Corp.
3905fc6b1SNiklas Söderlund%YAML 1.2
4905fc6b1SNiklas Söderlund---
5905fc6b1SNiklas Söderlund$id: http://devicetree.org/schemas/media/renesas,vin.yaml#
6905fc6b1SNiklas Söderlund$schema: http://devicetree.org/meta-schemas/core.yaml#
7905fc6b1SNiklas Söderlund
8905fc6b1SNiklas Söderlundtitle: Renesas R-Car Video Input (VIN)
9905fc6b1SNiklas Söderlund
10905fc6b1SNiklas Söderlundmaintainers:
11905fc6b1SNiklas Söderlund  - Niklas Söderlund <niklas.soderlund@ragnatech.se>
12905fc6b1SNiklas Söderlund
13905fc6b1SNiklas Söderlunddescription:
14905fc6b1SNiklas Söderlund  The R-Car Video Input (VIN) device provides video input capabilities for the
15905fc6b1SNiklas Söderlund  Renesas R-Car family of devices.
16905fc6b1SNiklas Söderlund
17905fc6b1SNiklas Söderlund  Each VIN instance has a single parallel input that supports RGB and YUV video,
18905fc6b1SNiklas Söderlund  with both external synchronization and BT.656 synchronization for the latter.
19905fc6b1SNiklas Söderlund  Depending on the instance the VIN input is connected to external SoC pins, or
20905fc6b1SNiklas Söderlund  on Gen3 and RZ/G2 platforms to a CSI-2 receiver.
21905fc6b1SNiklas Söderlund
22905fc6b1SNiklas Söderlundproperties:
23905fc6b1SNiklas Söderlund  compatible:
24905fc6b1SNiklas Söderlund    oneOf:
25905fc6b1SNiklas Söderlund      - items:
26905fc6b1SNiklas Söderlund          - enum:
2777fd2ca6SLad Prabhakar              - renesas,vin-r8a7742  # RZ/G1H
28905fc6b1SNiklas Söderlund              - renesas,vin-r8a7743  # RZ/G1M
29905fc6b1SNiklas Söderlund              - renesas,vin-r8a7744  # RZ/G1N
30905fc6b1SNiklas Söderlund              - renesas,vin-r8a7745  # RZ/G1E
31905fc6b1SNiklas Söderlund              - renesas,vin-r8a77470 # RZ/G1C
32905fc6b1SNiklas Söderlund              - renesas,vin-r8a7790  # R-Car H2
33905fc6b1SNiklas Söderlund              - renesas,vin-r8a7791  # R-Car M2-W
34905fc6b1SNiklas Söderlund              - renesas,vin-r8a7792  # R-Car V2H
35905fc6b1SNiklas Söderlund              - renesas,vin-r8a7793  # R-Car M2-N
36905fc6b1SNiklas Söderlund              - renesas,vin-r8a7794  # R-Car E2
37905fc6b1SNiklas Söderlund          - const: renesas,rcar-gen2-vin # Generic R-Car Gen2 or RZ/G1
38905fc6b1SNiklas Söderlund
39905fc6b1SNiklas Söderlund      - items:
40905fc6b1SNiklas Söderlund          - enum:
41905fc6b1SNiklas Söderlund              - renesas,vin-r8a774a1 # RZ/G2M
42905fc6b1SNiklas Söderlund              - renesas,vin-r8a774b1 # RZ/G2N
43905fc6b1SNiklas Söderlund              - renesas,vin-r8a774c0 # RZ/G2E
44200b0d9aSLad Prabhakar              - renesas,vin-r8a774e1 # RZ/G2H
45905fc6b1SNiklas Söderlund              - renesas,vin-r8a7778  # R-Car M1
46905fc6b1SNiklas Söderlund              - renesas,vin-r8a7779  # R-Car H1
47905fc6b1SNiklas Söderlund              - renesas,vin-r8a7795  # R-Car H3
48905fc6b1SNiklas Söderlund              - renesas,vin-r8a7796  # R-Car M3-W
49*90c3493eSNiklas Söderlund              - renesas,vin-r8a77961 # R-Car M3-W+
50905fc6b1SNiklas Söderlund              - renesas,vin-r8a77965 # R-Car M3-N
51905fc6b1SNiklas Söderlund              - renesas,vin-r8a77970 # R-Car V3M
52905fc6b1SNiklas Söderlund              - renesas,vin-r8a77980 # R-Car V3H
53905fc6b1SNiklas Söderlund              - renesas,vin-r8a77990 # R-Car E3
54905fc6b1SNiklas Söderlund              - renesas,vin-r8a77995 # R-Car D3
558f6a0eabSNiklas Söderlund              - renesas,vin-r8a779a0 # R-Car V3U
56905fc6b1SNiklas Söderlund
57905fc6b1SNiklas Söderlund  reg:
58905fc6b1SNiklas Söderlund    maxItems: 1
59905fc6b1SNiklas Söderlund
60905fc6b1SNiklas Söderlund  interrupts:
61905fc6b1SNiklas Söderlund    maxItems: 1
62905fc6b1SNiklas Söderlund
63905fc6b1SNiklas Söderlund  clocks:
64905fc6b1SNiklas Söderlund    maxItems: 1
65905fc6b1SNiklas Söderlund
66905fc6b1SNiklas Söderlund  power-domains:
67905fc6b1SNiklas Söderlund    maxItems: 1
68905fc6b1SNiklas Söderlund
69905fc6b1SNiklas Söderlund  resets:
70905fc6b1SNiklas Söderlund    maxItems: 1
71905fc6b1SNiklas Söderlund
72905fc6b1SNiklas Söderlund  #The per-board settings for Gen2 and RZ/G1 platforms:
73905fc6b1SNiklas Söderlund  port:
74066a94e2SRob Herring    $ref: /schemas/graph.yaml#/$defs/port-base
75066a94e2SRob Herring    unevaluatedProperties: false
76905fc6b1SNiklas Söderlund    description:
77066a94e2SRob Herring      A node containing a parallel input
78905fc6b1SNiklas Söderlund
79905fc6b1SNiklas Söderlund    properties:
80905fc6b1SNiklas Söderlund      endpoint:
81066a94e2SRob Herring        $ref: video-interfaces.yaml#
82066a94e2SRob Herring        unevaluatedProperties: false
83905fc6b1SNiklas Söderlund
84905fc6b1SNiklas Söderlund        properties:
85905fc6b1SNiklas Söderlund          hsync-active:
86905fc6b1SNiklas Söderlund            description:
87905fc6b1SNiklas Söderlund              If both HSYNC and VSYNC polarities are not specified, embedded
88905fc6b1SNiklas Söderlund              synchronization is selected.
89905fc6b1SNiklas Söderlund            default: 1
90905fc6b1SNiklas Söderlund
91905fc6b1SNiklas Söderlund          vsync-active:
92905fc6b1SNiklas Söderlund            description:
93905fc6b1SNiklas Söderlund              If both HSYNC and VSYNC polarities are not specified, embedded
94905fc6b1SNiklas Söderlund              synchronization is selected.
95905fc6b1SNiklas Söderlund            default: 1
96905fc6b1SNiklas Söderlund
97905fc6b1SNiklas Söderlund          field-active-even: true
98905fc6b1SNiklas Söderlund
99905fc6b1SNiklas Söderlund          bus-width: true
100905fc6b1SNiklas Söderlund
101905fc6b1SNiklas Söderlund          data-shift: true
102905fc6b1SNiklas Söderlund
103905fc6b1SNiklas Söderlund          data-enable-active:
104905fc6b1SNiklas Söderlund            description: Polarity of CLKENB signal
105905fc6b1SNiklas Söderlund            default: 1
106905fc6b1SNiklas Söderlund
107905fc6b1SNiklas Söderlund          pclk-sample: true
108905fc6b1SNiklas Söderlund
109905fc6b1SNiklas Söderlund          data-active: true
110905fc6b1SNiklas Söderlund
111905fc6b1SNiklas Söderlund  #The per-board settings for Gen3 and RZ/G2 platforms:
112905fc6b1SNiklas Söderlund  renesas,id:
113905fc6b1SNiklas Söderlund    description: VIN channel number
1143d21a460SRob Herring    $ref: /schemas/types.yaml#/definitions/uint32
1153d21a460SRob Herring    minimum: 0
1168f6a0eabSNiklas Söderlund    maximum: 31
117905fc6b1SNiklas Söderlund
118905fc6b1SNiklas Söderlund  ports:
119066a94e2SRob Herring    $ref: /schemas/graph.yaml#/properties/ports
120905fc6b1SNiklas Söderlund
121905fc6b1SNiklas Söderlund    properties:
122905fc6b1SNiklas Söderlund      port@0:
123066a94e2SRob Herring        $ref: /schemas/graph.yaml#/properties/port
124905fc6b1SNiklas Söderlund        description:
125905fc6b1SNiklas Söderlund          Input port node, single endpoint describing a parallel input source.
126905fc6b1SNiklas Söderlund
127905fc6b1SNiklas Söderlund        properties:
128905fc6b1SNiklas Söderlund          endpoint:
129066a94e2SRob Herring            $ref: video-interfaces.yaml#
130066a94e2SRob Herring            unevaluatedProperties: false
131905fc6b1SNiklas Söderlund
132905fc6b1SNiklas Söderlund            properties:
133905fc6b1SNiklas Söderlund              hsync-active:
134905fc6b1SNiklas Söderlund                description:
135905fc6b1SNiklas Söderlund                  If both HSYNC and VSYNC polarities are not specified, embedded
136905fc6b1SNiklas Söderlund                  synchronization is selected.
137905fc6b1SNiklas Söderlund                default: 1
138905fc6b1SNiklas Söderlund
139905fc6b1SNiklas Söderlund              vsync-active:
140905fc6b1SNiklas Söderlund                description:
141905fc6b1SNiklas Söderlund                  If both HSYNC and VSYNC polarities are not specified, embedded
142905fc6b1SNiklas Söderlund                  synchronization is selected.
143905fc6b1SNiklas Söderlund                default: 1
144905fc6b1SNiklas Söderlund
145905fc6b1SNiklas Söderlund              field-active-even: true
146905fc6b1SNiklas Söderlund
147905fc6b1SNiklas Söderlund              bus-width: true
148905fc6b1SNiklas Söderlund
149905fc6b1SNiklas Söderlund              data-shift: true
150905fc6b1SNiklas Söderlund
151905fc6b1SNiklas Söderlund              data-enable-active:
152905fc6b1SNiklas Söderlund                description: Polarity of CLKENB signal
153905fc6b1SNiklas Söderlund                default: 1
154905fc6b1SNiklas Söderlund
155905fc6b1SNiklas Söderlund              pclk-sample: true
156905fc6b1SNiklas Söderlund
157905fc6b1SNiklas Söderlund              data-active: true
158905fc6b1SNiklas Söderlund
159905fc6b1SNiklas Söderlund      port@1:
160066a94e2SRob Herring        $ref: /schemas/graph.yaml#/properties/port
161905fc6b1SNiklas Söderlund        description:
162905fc6b1SNiklas Söderlund          Input port node, multiple endpoints describing all the R-Car CSI-2
163905fc6b1SNiklas Söderlund          modules connected the VIN.
164905fc6b1SNiklas Söderlund
165905fc6b1SNiklas Söderlund        properties:
166905fc6b1SNiklas Söderlund          endpoint@0:
167066a94e2SRob Herring            $ref: /schemas/graph.yaml#/properties/endpoint
168905fc6b1SNiklas Söderlund            description: Endpoint connected to CSI20.
169905fc6b1SNiklas Söderlund
170905fc6b1SNiklas Söderlund          endpoint@1:
171066a94e2SRob Herring            $ref: /schemas/graph.yaml#/properties/endpoint
172905fc6b1SNiklas Söderlund            description: Endpoint connected to CSI21.
173905fc6b1SNiklas Söderlund
174905fc6b1SNiklas Söderlund          endpoint@2:
175066a94e2SRob Herring            $ref: /schemas/graph.yaml#/properties/endpoint
176905fc6b1SNiklas Söderlund            description: Endpoint connected to CSI40.
177905fc6b1SNiklas Söderlund
178905fc6b1SNiklas Söderlund          endpoint@3:
179066a94e2SRob Herring            $ref: /schemas/graph.yaml#/properties/endpoint
180905fc6b1SNiklas Söderlund            description: Endpoint connected to CSI41.
181905fc6b1SNiklas Söderlund
182905fc6b1SNiklas Söderlund        anyOf:
183905fc6b1SNiklas Söderlund          - required:
184905fc6b1SNiklas Söderlund              - endpoint@0
185905fc6b1SNiklas Söderlund          - required:
186905fc6b1SNiklas Söderlund              - endpoint@1
187905fc6b1SNiklas Söderlund          - required:
188905fc6b1SNiklas Söderlund              - endpoint@2
189905fc6b1SNiklas Söderlund          - required:
190905fc6b1SNiklas Söderlund              - endpoint@3
191905fc6b1SNiklas Söderlund
1928f6a0eabSNiklas Söderlund      port@2:
1938f6a0eabSNiklas Söderlund        $ref: /schemas/graph.yaml#/properties/port
1948f6a0eabSNiklas Söderlund        description:
1958f6a0eabSNiklas Söderlund          Input port node, multiple endpoints describing all the R-Car ISP
1968f6a0eabSNiklas Söderlund          modules connected the VIN.
1978f6a0eabSNiklas Söderlund
1988f6a0eabSNiklas Söderlund        properties:
1998f6a0eabSNiklas Söderlund          endpoint@0:
2008f6a0eabSNiklas Söderlund            $ref: /schemas/graph.yaml#/properties/endpoint
2018f6a0eabSNiklas Söderlund            description: Endpoint connected to ISP0.
2028f6a0eabSNiklas Söderlund
2038f6a0eabSNiklas Söderlund          endpoint@1:
2048f6a0eabSNiklas Söderlund            $ref: /schemas/graph.yaml#/properties/endpoint
2058f6a0eabSNiklas Söderlund            description: Endpoint connected to ISP1.
2068f6a0eabSNiklas Söderlund
2078f6a0eabSNiklas Söderlund          endpoint@2:
2088f6a0eabSNiklas Söderlund            $ref: /schemas/graph.yaml#/properties/endpoint
2098f6a0eabSNiklas Söderlund            description: Endpoint connected to ISP2.
2108f6a0eabSNiklas Söderlund
2118f6a0eabSNiklas Söderlund          endpoint@3:
2128f6a0eabSNiklas Söderlund            $ref: /schemas/graph.yaml#/properties/endpoint
2138f6a0eabSNiklas Söderlund            description: Endpoint connected to ISP3.
2148f6a0eabSNiklas Söderlund
215905fc6b1SNiklas Söderlundrequired:
216905fc6b1SNiklas Söderlund  - compatible
217905fc6b1SNiklas Söderlund  - reg
218905fc6b1SNiklas Söderlund  - interrupts
219905fc6b1SNiklas Söderlund  - clocks
220905fc6b1SNiklas Söderlund  - power-domains
2217935bb56SGeert Uytterhoeven
2227935bb56SGeert UytterhoevenallOf:
2237935bb56SGeert Uytterhoeven  - if:
2247935bb56SGeert Uytterhoeven      not:
2257935bb56SGeert Uytterhoeven        properties:
2267935bb56SGeert Uytterhoeven          compatible:
2277935bb56SGeert Uytterhoeven            contains:
2287935bb56SGeert Uytterhoeven              enum:
2297935bb56SGeert Uytterhoeven                - renesas,vin-r8a7778
2307935bb56SGeert Uytterhoeven                - renesas,vin-r8a7779
2317935bb56SGeert Uytterhoeven    then:
2327935bb56SGeert Uytterhoeven      required:
233905fc6b1SNiklas Söderlund        - resets
234905fc6b1SNiklas Söderlund
2357935bb56SGeert Uytterhoeven  - if:
236905fc6b1SNiklas Söderlund      properties:
237905fc6b1SNiklas Söderlund        compatible:
238905fc6b1SNiklas Söderlund          contains:
239905fc6b1SNiklas Söderlund            enum:
240905fc6b1SNiklas Söderlund              - renesas,vin-r8a7778
241905fc6b1SNiklas Söderlund              - renesas,vin-r8a7779
242905fc6b1SNiklas Söderlund              - renesas,rcar-gen2-vin
243905fc6b1SNiklas Söderlund    then:
244905fc6b1SNiklas Söderlund      required:
245905fc6b1SNiklas Söderlund        - port
246905fc6b1SNiklas Söderlund    else:
247905fc6b1SNiklas Söderlund      required:
248905fc6b1SNiklas Söderlund        - renesas,id
249905fc6b1SNiklas Söderlund        - ports
250905fc6b1SNiklas Söderlund
251905fc6b1SNiklas SöderlundadditionalProperties: false
252905fc6b1SNiklas Söderlund
253905fc6b1SNiklas Söderlundexamples:
254905fc6b1SNiklas Söderlund  # Device node example for Gen2 platform
255905fc6b1SNiklas Söderlund  - |
256905fc6b1SNiklas Söderlund    #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
257905fc6b1SNiklas Söderlund    #include <dt-bindings/interrupt-controller/arm-gic.h>
258905fc6b1SNiklas Söderlund    #include <dt-bindings/power/r8a7790-sysc.h>
259905fc6b1SNiklas Söderlund
260905fc6b1SNiklas Söderlund    vin1: vin@e6ef1000 {
261905fc6b1SNiklas Söderlund            compatible = "renesas,vin-r8a7790",
262905fc6b1SNiklas Söderlund                         "renesas,rcar-gen2-vin";
263fba56184SRob Herring            reg = <0xe6ef1000 0x1000>;
264905fc6b1SNiklas Söderlund            interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
265905fc6b1SNiklas Söderlund            clocks = <&cpg CPG_MOD 810>;
266905fc6b1SNiklas Söderlund            power-domains = <&sysc R8A7790_PD_ALWAYS_ON>;
267905fc6b1SNiklas Söderlund            resets = <&cpg 810>;
268905fc6b1SNiklas Söderlund
269905fc6b1SNiklas Söderlund            port {
270905fc6b1SNiklas Söderlund                    vin1ep0: endpoint {
271905fc6b1SNiklas Söderlund                            remote-endpoint = <&adv7180>;
272905fc6b1SNiklas Söderlund                            bus-width = <8>;
273905fc6b1SNiklas Söderlund                    };
274905fc6b1SNiklas Söderlund            };
275905fc6b1SNiklas Söderlund    };
276905fc6b1SNiklas Söderlund
277905fc6b1SNiklas Söderlund  # Device node example for Gen3 platform with only CSI-2
278905fc6b1SNiklas Söderlund  - |
279905fc6b1SNiklas Söderlund    #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
280905fc6b1SNiklas Söderlund    #include <dt-bindings/interrupt-controller/arm-gic.h>
281905fc6b1SNiklas Söderlund    #include <dt-bindings/power/r8a7795-sysc.h>
282905fc6b1SNiklas Söderlund
283905fc6b1SNiklas Söderlund    vin0: video@e6ef0000 {
284905fc6b1SNiklas Söderlund            compatible = "renesas,vin-r8a7795";
285fba56184SRob Herring            reg = <0xe6ef0000 0x1000>;
286905fc6b1SNiklas Söderlund            interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
287905fc6b1SNiklas Söderlund            clocks = <&cpg CPG_MOD 811>;
288905fc6b1SNiklas Söderlund            power-domains = <&sysc R8A7795_PD_ALWAYS_ON>;
289905fc6b1SNiklas Söderlund            resets = <&cpg 811>;
290905fc6b1SNiklas Söderlund            renesas,id = <0>;
291905fc6b1SNiklas Söderlund
292905fc6b1SNiklas Söderlund            ports {
293905fc6b1SNiklas Söderlund                    #address-cells = <1>;
294905fc6b1SNiklas Söderlund                    #size-cells = <0>;
295905fc6b1SNiklas Söderlund
296905fc6b1SNiklas Söderlund                    port@1 {
297905fc6b1SNiklas Söderlund                            #address-cells = <1>;
298905fc6b1SNiklas Söderlund                            #size-cells = <0>;
299905fc6b1SNiklas Söderlund
300905fc6b1SNiklas Söderlund                            reg = <1>;
301905fc6b1SNiklas Söderlund
302905fc6b1SNiklas Söderlund                            vin0csi20: endpoint@0 {
303905fc6b1SNiklas Söderlund                                    reg = <0>;
304905fc6b1SNiklas Söderlund                                    remote-endpoint= <&csi20vin0>;
305905fc6b1SNiklas Söderlund                            };
306905fc6b1SNiklas Söderlund                            vin0csi40: endpoint@2 {
307905fc6b1SNiklas Söderlund                                    reg = <2>;
308905fc6b1SNiklas Söderlund                                    remote-endpoint= <&csi40vin0>;
309905fc6b1SNiklas Söderlund                            };
310905fc6b1SNiklas Söderlund                    };
311905fc6b1SNiklas Söderlund            };
312905fc6b1SNiklas Söderlund    };
313905fc6b1SNiklas Söderlund
314905fc6b1SNiklas Söderlund  # Device node example for Gen3 platform with CSI-2 and parallel
315905fc6b1SNiklas Söderlund  - |
316905fc6b1SNiklas Söderlund    #include <dt-bindings/clock/r8a77970-cpg-mssr.h>
317905fc6b1SNiklas Söderlund    #include <dt-bindings/interrupt-controller/arm-gic.h>
318905fc6b1SNiklas Söderlund    #include <dt-bindings/power/r8a77970-sysc.h>
319905fc6b1SNiklas Söderlund
320905fc6b1SNiklas Söderlund    vin2: video@e6ef2000 {
321905fc6b1SNiklas Söderlund            compatible = "renesas,vin-r8a77970";
322fba56184SRob Herring            reg = <0xe6ef2000 0x1000>;
323905fc6b1SNiklas Söderlund            interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>;
324905fc6b1SNiklas Söderlund            clocks = <&cpg CPG_MOD 809>;
325905fc6b1SNiklas Söderlund            power-domains = <&sysc R8A77970_PD_ALWAYS_ON>;
326905fc6b1SNiklas Söderlund            resets = <&cpg 809>;
327905fc6b1SNiklas Söderlund            renesas,id = <2>;
328905fc6b1SNiklas Söderlund
329905fc6b1SNiklas Söderlund            ports {
330905fc6b1SNiklas Söderlund                    #address-cells = <1>;
331905fc6b1SNiklas Söderlund                    #size-cells = <0>;
332905fc6b1SNiklas Söderlund
333905fc6b1SNiklas Söderlund                    port@0 {
334905fc6b1SNiklas Söderlund                            reg = <0>;
335905fc6b1SNiklas Söderlund
336905fc6b1SNiklas Söderlund                            vin2_in: endpoint {
337905fc6b1SNiklas Söderlund                                    remote-endpoint = <&adv7612_out>;
338905fc6b1SNiklas Söderlund                                    hsync-active = <0>;
339905fc6b1SNiklas Söderlund                                    vsync-active = <0>;
340905fc6b1SNiklas Söderlund                            };
341905fc6b1SNiklas Söderlund                    };
342905fc6b1SNiklas Söderlund
343905fc6b1SNiklas Söderlund                    port@1 {
344905fc6b1SNiklas Söderlund                            #address-cells = <1>;
345905fc6b1SNiklas Söderlund                            #size-cells = <0>;
346905fc6b1SNiklas Söderlund
347905fc6b1SNiklas Söderlund                            reg = <1>;
348905fc6b1SNiklas Söderlund
349905fc6b1SNiklas Söderlund                            vin2csi40: endpoint@2 {
350905fc6b1SNiklas Söderlund                                    reg = <2>;
351905fc6b1SNiklas Söderlund                                    remote-endpoint = <&csi40vin2>;
352905fc6b1SNiklas Söderlund                            };
353905fc6b1SNiklas Söderlund                    };
354905fc6b1SNiklas Söderlund            };
355905fc6b1SNiklas Söderlund    };
356