1905fc6b1SNiklas Söderlund# SPDX-License-Identifier: GPL-2.0-only 2905fc6b1SNiklas Söderlund# Copyright (C) 2020 Renesas Electronics Corp. 3905fc6b1SNiklas Söderlund%YAML 1.2 4905fc6b1SNiklas Söderlund--- 5905fc6b1SNiklas Söderlund$id: http://devicetree.org/schemas/media/renesas,vin.yaml# 6905fc6b1SNiklas Söderlund$schema: http://devicetree.org/meta-schemas/core.yaml# 7905fc6b1SNiklas Söderlund 8905fc6b1SNiklas Söderlundtitle: Renesas R-Car Video Input (VIN) 9905fc6b1SNiklas Söderlund 10905fc6b1SNiklas Söderlundmaintainers: 11905fc6b1SNiklas Söderlund - Niklas Söderlund <niklas.soderlund@ragnatech.se> 12905fc6b1SNiklas Söderlund 13905fc6b1SNiklas Söderlunddescription: 14905fc6b1SNiklas Söderlund The R-Car Video Input (VIN) device provides video input capabilities for the 15905fc6b1SNiklas Söderlund Renesas R-Car family of devices. 16905fc6b1SNiklas Söderlund 17905fc6b1SNiklas Söderlund Each VIN instance has a single parallel input that supports RGB and YUV video, 18905fc6b1SNiklas Söderlund with both external synchronization and BT.656 synchronization for the latter. 19905fc6b1SNiklas Söderlund Depending on the instance the VIN input is connected to external SoC pins, or 20905fc6b1SNiklas Söderlund on Gen3 and RZ/G2 platforms to a CSI-2 receiver. 21905fc6b1SNiklas Söderlund 22905fc6b1SNiklas Söderlundproperties: 23905fc6b1SNiklas Söderlund compatible: 24905fc6b1SNiklas Söderlund oneOf: 25905fc6b1SNiklas Söderlund - items: 26905fc6b1SNiklas Söderlund - enum: 2777fd2ca6SLad Prabhakar - renesas,vin-r8a7742 # RZ/G1H 28905fc6b1SNiklas Söderlund - renesas,vin-r8a7743 # RZ/G1M 29905fc6b1SNiklas Söderlund - renesas,vin-r8a7744 # RZ/G1N 30905fc6b1SNiklas Söderlund - renesas,vin-r8a7745 # RZ/G1E 31905fc6b1SNiklas Söderlund - renesas,vin-r8a77470 # RZ/G1C 32905fc6b1SNiklas Söderlund - renesas,vin-r8a7790 # R-Car H2 33905fc6b1SNiklas Söderlund - renesas,vin-r8a7791 # R-Car M2-W 34905fc6b1SNiklas Söderlund - renesas,vin-r8a7792 # R-Car V2H 35905fc6b1SNiklas Söderlund - renesas,vin-r8a7793 # R-Car M2-N 36905fc6b1SNiklas Söderlund - renesas,vin-r8a7794 # R-Car E2 37905fc6b1SNiklas Söderlund - const: renesas,rcar-gen2-vin # Generic R-Car Gen2 or RZ/G1 38905fc6b1SNiklas Söderlund 39905fc6b1SNiklas Söderlund - items: 40905fc6b1SNiklas Söderlund - enum: 41905fc6b1SNiklas Söderlund - renesas,vin-r8a774a1 # RZ/G2M 42905fc6b1SNiklas Söderlund - renesas,vin-r8a774b1 # RZ/G2N 43905fc6b1SNiklas Söderlund - renesas,vin-r8a774c0 # RZ/G2E 44200b0d9aSLad Prabhakar - renesas,vin-r8a774e1 # RZ/G2H 45905fc6b1SNiklas Söderlund - renesas,vin-r8a7778 # R-Car M1 46905fc6b1SNiklas Söderlund - renesas,vin-r8a7779 # R-Car H1 47905fc6b1SNiklas Söderlund - renesas,vin-r8a7795 # R-Car H3 48905fc6b1SNiklas Söderlund - renesas,vin-r8a7796 # R-Car M3-W 49905fc6b1SNiklas Söderlund - renesas,vin-r8a77965 # R-Car M3-N 50905fc6b1SNiklas Söderlund - renesas,vin-r8a77970 # R-Car V3M 51905fc6b1SNiklas Söderlund - renesas,vin-r8a77980 # R-Car V3H 52905fc6b1SNiklas Söderlund - renesas,vin-r8a77990 # R-Car E3 53905fc6b1SNiklas Söderlund - renesas,vin-r8a77995 # R-Car D3 54905fc6b1SNiklas Söderlund 55905fc6b1SNiklas Söderlund reg: 56905fc6b1SNiklas Söderlund maxItems: 1 57905fc6b1SNiklas Söderlund 58905fc6b1SNiklas Söderlund interrupts: 59905fc6b1SNiklas Söderlund maxItems: 1 60905fc6b1SNiklas Söderlund 61905fc6b1SNiklas Söderlund clocks: 62905fc6b1SNiklas Söderlund maxItems: 1 63905fc6b1SNiklas Söderlund 64905fc6b1SNiklas Söderlund power-domains: 65905fc6b1SNiklas Söderlund maxItems: 1 66905fc6b1SNiklas Söderlund 67905fc6b1SNiklas Söderlund resets: 68905fc6b1SNiklas Söderlund maxItems: 1 69905fc6b1SNiklas Söderlund 70905fc6b1SNiklas Söderlund #The per-board settings for Gen2 and RZ/G1 platforms: 71905fc6b1SNiklas Söderlund port: 72066a94e2SRob Herring $ref: /schemas/graph.yaml#/$defs/port-base 73066a94e2SRob Herring unevaluatedProperties: false 74905fc6b1SNiklas Söderlund description: 75066a94e2SRob Herring A node containing a parallel input 76905fc6b1SNiklas Söderlund 77905fc6b1SNiklas Söderlund properties: 78905fc6b1SNiklas Söderlund endpoint: 79066a94e2SRob Herring $ref: video-interfaces.yaml# 80066a94e2SRob Herring unevaluatedProperties: false 81905fc6b1SNiklas Söderlund 82905fc6b1SNiklas Söderlund properties: 83905fc6b1SNiklas Söderlund hsync-active: 84905fc6b1SNiklas Söderlund description: 85905fc6b1SNiklas Söderlund If both HSYNC and VSYNC polarities are not specified, embedded 86905fc6b1SNiklas Söderlund synchronization is selected. 87905fc6b1SNiklas Söderlund default: 1 88905fc6b1SNiklas Söderlund 89905fc6b1SNiklas Söderlund vsync-active: 90905fc6b1SNiklas Söderlund description: 91905fc6b1SNiklas Söderlund If both HSYNC and VSYNC polarities are not specified, embedded 92905fc6b1SNiklas Söderlund synchronization is selected. 93905fc6b1SNiklas Söderlund default: 1 94905fc6b1SNiklas Söderlund 95905fc6b1SNiklas Söderlund field-active-even: true 96905fc6b1SNiklas Söderlund 97905fc6b1SNiklas Söderlund bus-width: true 98905fc6b1SNiklas Söderlund 99905fc6b1SNiklas Söderlund data-shift: true 100905fc6b1SNiklas Söderlund 101905fc6b1SNiklas Söderlund data-enable-active: 102905fc6b1SNiklas Söderlund description: Polarity of CLKENB signal 103905fc6b1SNiklas Söderlund default: 1 104905fc6b1SNiklas Söderlund 105905fc6b1SNiklas Söderlund pclk-sample: true 106905fc6b1SNiklas Söderlund 107905fc6b1SNiklas Söderlund data-active: true 108905fc6b1SNiklas Söderlund 109905fc6b1SNiklas Söderlund #The per-board settings for Gen3 and RZ/G2 platforms: 110905fc6b1SNiklas Söderlund renesas,id: 111905fc6b1SNiklas Söderlund description: VIN channel number 1123d21a460SRob Herring $ref: /schemas/types.yaml#/definitions/uint32 1133d21a460SRob Herring minimum: 0 1143d21a460SRob Herring maximum: 15 115905fc6b1SNiklas Söderlund 116905fc6b1SNiklas Söderlund ports: 117066a94e2SRob Herring $ref: /schemas/graph.yaml#/properties/ports 118905fc6b1SNiklas Söderlund 119905fc6b1SNiklas Söderlund properties: 120905fc6b1SNiklas Söderlund port@0: 121066a94e2SRob Herring $ref: /schemas/graph.yaml#/properties/port 122905fc6b1SNiklas Söderlund description: 123905fc6b1SNiklas Söderlund Input port node, single endpoint describing a parallel input source. 124905fc6b1SNiklas Söderlund 125905fc6b1SNiklas Söderlund properties: 126905fc6b1SNiklas Söderlund endpoint: 127066a94e2SRob Herring $ref: video-interfaces.yaml# 128066a94e2SRob Herring unevaluatedProperties: false 129905fc6b1SNiklas Söderlund 130905fc6b1SNiklas Söderlund properties: 131905fc6b1SNiklas Söderlund hsync-active: 132905fc6b1SNiklas Söderlund description: 133905fc6b1SNiklas Söderlund If both HSYNC and VSYNC polarities are not specified, embedded 134905fc6b1SNiklas Söderlund synchronization is selected. 135905fc6b1SNiklas Söderlund default: 1 136905fc6b1SNiklas Söderlund 137905fc6b1SNiklas Söderlund vsync-active: 138905fc6b1SNiklas Söderlund description: 139905fc6b1SNiklas Söderlund If both HSYNC and VSYNC polarities are not specified, embedded 140905fc6b1SNiklas Söderlund synchronization is selected. 141905fc6b1SNiklas Söderlund default: 1 142905fc6b1SNiklas Söderlund 143905fc6b1SNiklas Söderlund field-active-even: true 144905fc6b1SNiklas Söderlund 145905fc6b1SNiklas Söderlund bus-width: true 146905fc6b1SNiklas Söderlund 147905fc6b1SNiklas Söderlund data-shift: true 148905fc6b1SNiklas Söderlund 149905fc6b1SNiklas Söderlund data-enable-active: 150905fc6b1SNiklas Söderlund description: Polarity of CLKENB signal 151905fc6b1SNiklas Söderlund default: 1 152905fc6b1SNiklas Söderlund 153905fc6b1SNiklas Söderlund pclk-sample: true 154905fc6b1SNiklas Söderlund 155905fc6b1SNiklas Söderlund data-active: true 156905fc6b1SNiklas Söderlund 157905fc6b1SNiklas Söderlund port@1: 158066a94e2SRob Herring $ref: /schemas/graph.yaml#/properties/port 159905fc6b1SNiklas Söderlund description: 160905fc6b1SNiklas Söderlund Input port node, multiple endpoints describing all the R-Car CSI-2 161905fc6b1SNiklas Söderlund modules connected the VIN. 162905fc6b1SNiklas Söderlund 163905fc6b1SNiklas Söderlund properties: 164905fc6b1SNiklas Söderlund endpoint@0: 165066a94e2SRob Herring $ref: /schemas/graph.yaml#/properties/endpoint 166905fc6b1SNiklas Söderlund description: Endpoint connected to CSI20. 167905fc6b1SNiklas Söderlund 168905fc6b1SNiklas Söderlund endpoint@1: 169066a94e2SRob Herring $ref: /schemas/graph.yaml#/properties/endpoint 170905fc6b1SNiklas Söderlund description: Endpoint connected to CSI21. 171905fc6b1SNiklas Söderlund 172905fc6b1SNiklas Söderlund endpoint@2: 173066a94e2SRob Herring $ref: /schemas/graph.yaml#/properties/endpoint 174905fc6b1SNiklas Söderlund description: Endpoint connected to CSI40. 175905fc6b1SNiklas Söderlund 176905fc6b1SNiklas Söderlund endpoint@3: 177066a94e2SRob Herring $ref: /schemas/graph.yaml#/properties/endpoint 178905fc6b1SNiklas Söderlund description: Endpoint connected to CSI41. 179905fc6b1SNiklas Söderlund 180905fc6b1SNiklas Söderlund anyOf: 181905fc6b1SNiklas Söderlund - required: 182905fc6b1SNiklas Söderlund - endpoint@0 183905fc6b1SNiklas Söderlund - required: 184905fc6b1SNiklas Söderlund - endpoint@1 185905fc6b1SNiklas Söderlund - required: 186905fc6b1SNiklas Söderlund - endpoint@2 187905fc6b1SNiklas Söderlund - required: 188905fc6b1SNiklas Söderlund - endpoint@3 189905fc6b1SNiklas Söderlund 190905fc6b1SNiklas Söderlundrequired: 191905fc6b1SNiklas Söderlund - compatible 192905fc6b1SNiklas Söderlund - reg 193905fc6b1SNiklas Söderlund - interrupts 194905fc6b1SNiklas Söderlund - clocks 195905fc6b1SNiklas Söderlund - power-domains 196*7935bb56SGeert Uytterhoeven 197*7935bb56SGeert UytterhoevenallOf: 198*7935bb56SGeert Uytterhoeven - if: 199*7935bb56SGeert Uytterhoeven not: 200*7935bb56SGeert Uytterhoeven properties: 201*7935bb56SGeert Uytterhoeven compatible: 202*7935bb56SGeert Uytterhoeven contains: 203*7935bb56SGeert Uytterhoeven enum: 204*7935bb56SGeert Uytterhoeven - renesas,vin-r8a7778 205*7935bb56SGeert Uytterhoeven - renesas,vin-r8a7779 206*7935bb56SGeert Uytterhoeven then: 207*7935bb56SGeert Uytterhoeven required: 208905fc6b1SNiklas Söderlund - resets 209905fc6b1SNiklas Söderlund 210*7935bb56SGeert Uytterhoeven - if: 211905fc6b1SNiklas Söderlund properties: 212905fc6b1SNiklas Söderlund compatible: 213905fc6b1SNiklas Söderlund contains: 214905fc6b1SNiklas Söderlund enum: 215905fc6b1SNiklas Söderlund - renesas,vin-r8a7778 216905fc6b1SNiklas Söderlund - renesas,vin-r8a7779 217905fc6b1SNiklas Söderlund - renesas,rcar-gen2-vin 218905fc6b1SNiklas Söderlund then: 219905fc6b1SNiklas Söderlund required: 220905fc6b1SNiklas Söderlund - port 221905fc6b1SNiklas Söderlund else: 222905fc6b1SNiklas Söderlund required: 223905fc6b1SNiklas Söderlund - renesas,id 224905fc6b1SNiklas Söderlund - ports 225905fc6b1SNiklas Söderlund 226905fc6b1SNiklas SöderlundadditionalProperties: false 227905fc6b1SNiklas Söderlund 228905fc6b1SNiklas Söderlundexamples: 229905fc6b1SNiklas Söderlund # Device node example for Gen2 platform 230905fc6b1SNiklas Söderlund - | 231905fc6b1SNiklas Söderlund #include <dt-bindings/clock/r8a7790-cpg-mssr.h> 232905fc6b1SNiklas Söderlund #include <dt-bindings/interrupt-controller/arm-gic.h> 233905fc6b1SNiklas Söderlund #include <dt-bindings/power/r8a7790-sysc.h> 234905fc6b1SNiklas Söderlund 235905fc6b1SNiklas Söderlund vin1: vin@e6ef1000 { 236905fc6b1SNiklas Söderlund compatible = "renesas,vin-r8a7790", 237905fc6b1SNiklas Söderlund "renesas,rcar-gen2-vin"; 238fba56184SRob Herring reg = <0xe6ef1000 0x1000>; 239905fc6b1SNiklas Söderlund interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 240905fc6b1SNiklas Söderlund clocks = <&cpg CPG_MOD 810>; 241905fc6b1SNiklas Söderlund power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 242905fc6b1SNiklas Söderlund resets = <&cpg 810>; 243905fc6b1SNiklas Söderlund 244905fc6b1SNiklas Söderlund port { 245905fc6b1SNiklas Söderlund vin1ep0: endpoint { 246905fc6b1SNiklas Söderlund remote-endpoint = <&adv7180>; 247905fc6b1SNiklas Söderlund bus-width = <8>; 248905fc6b1SNiklas Söderlund }; 249905fc6b1SNiklas Söderlund }; 250905fc6b1SNiklas Söderlund }; 251905fc6b1SNiklas Söderlund 252905fc6b1SNiklas Söderlund # Device node example for Gen3 platform with only CSI-2 253905fc6b1SNiklas Söderlund - | 254905fc6b1SNiklas Söderlund #include <dt-bindings/clock/r8a7795-cpg-mssr.h> 255905fc6b1SNiklas Söderlund #include <dt-bindings/interrupt-controller/arm-gic.h> 256905fc6b1SNiklas Söderlund #include <dt-bindings/power/r8a7795-sysc.h> 257905fc6b1SNiklas Söderlund 258905fc6b1SNiklas Söderlund vin0: video@e6ef0000 { 259905fc6b1SNiklas Söderlund compatible = "renesas,vin-r8a7795"; 260fba56184SRob Herring reg = <0xe6ef0000 0x1000>; 261905fc6b1SNiklas Söderlund interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 262905fc6b1SNiklas Söderlund clocks = <&cpg CPG_MOD 811>; 263905fc6b1SNiklas Söderlund power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 264905fc6b1SNiklas Söderlund resets = <&cpg 811>; 265905fc6b1SNiklas Söderlund renesas,id = <0>; 266905fc6b1SNiklas Söderlund 267905fc6b1SNiklas Söderlund ports { 268905fc6b1SNiklas Söderlund #address-cells = <1>; 269905fc6b1SNiklas Söderlund #size-cells = <0>; 270905fc6b1SNiklas Söderlund 271905fc6b1SNiklas Söderlund port@1 { 272905fc6b1SNiklas Söderlund #address-cells = <1>; 273905fc6b1SNiklas Söderlund #size-cells = <0>; 274905fc6b1SNiklas Söderlund 275905fc6b1SNiklas Söderlund reg = <1>; 276905fc6b1SNiklas Söderlund 277905fc6b1SNiklas Söderlund vin0csi20: endpoint@0 { 278905fc6b1SNiklas Söderlund reg = <0>; 279905fc6b1SNiklas Söderlund remote-endpoint= <&csi20vin0>; 280905fc6b1SNiklas Söderlund }; 281905fc6b1SNiklas Söderlund vin0csi40: endpoint@2 { 282905fc6b1SNiklas Söderlund reg = <2>; 283905fc6b1SNiklas Söderlund remote-endpoint= <&csi40vin0>; 284905fc6b1SNiklas Söderlund }; 285905fc6b1SNiklas Söderlund }; 286905fc6b1SNiklas Söderlund }; 287905fc6b1SNiklas Söderlund }; 288905fc6b1SNiklas Söderlund 289905fc6b1SNiklas Söderlund # Device node example for Gen3 platform with CSI-2 and parallel 290905fc6b1SNiklas Söderlund - | 291905fc6b1SNiklas Söderlund #include <dt-bindings/clock/r8a77970-cpg-mssr.h> 292905fc6b1SNiklas Söderlund #include <dt-bindings/interrupt-controller/arm-gic.h> 293905fc6b1SNiklas Söderlund #include <dt-bindings/power/r8a77970-sysc.h> 294905fc6b1SNiklas Söderlund 295905fc6b1SNiklas Söderlund vin2: video@e6ef2000 { 296905fc6b1SNiklas Söderlund compatible = "renesas,vin-r8a77970"; 297fba56184SRob Herring reg = <0xe6ef2000 0x1000>; 298905fc6b1SNiklas Söderlund interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 299905fc6b1SNiklas Söderlund clocks = <&cpg CPG_MOD 809>; 300905fc6b1SNiklas Söderlund power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; 301905fc6b1SNiklas Söderlund resets = <&cpg 809>; 302905fc6b1SNiklas Söderlund renesas,id = <2>; 303905fc6b1SNiklas Söderlund 304905fc6b1SNiklas Söderlund ports { 305905fc6b1SNiklas Söderlund #address-cells = <1>; 306905fc6b1SNiklas Söderlund #size-cells = <0>; 307905fc6b1SNiklas Söderlund 308905fc6b1SNiklas Söderlund port@0 { 309905fc6b1SNiklas Söderlund reg = <0>; 310905fc6b1SNiklas Söderlund 311905fc6b1SNiklas Söderlund vin2_in: endpoint { 312905fc6b1SNiklas Söderlund remote-endpoint = <&adv7612_out>; 313905fc6b1SNiklas Söderlund hsync-active = <0>; 314905fc6b1SNiklas Söderlund vsync-active = <0>; 315905fc6b1SNiklas Söderlund }; 316905fc6b1SNiklas Söderlund }; 317905fc6b1SNiklas Söderlund 318905fc6b1SNiklas Söderlund port@1 { 319905fc6b1SNiklas Söderlund #address-cells = <1>; 320905fc6b1SNiklas Söderlund #size-cells = <0>; 321905fc6b1SNiklas Söderlund 322905fc6b1SNiklas Söderlund reg = <1>; 323905fc6b1SNiklas Söderlund 324905fc6b1SNiklas Söderlund vin2csi40: endpoint@2 { 325905fc6b1SNiklas Söderlund reg = <2>; 326905fc6b1SNiklas Söderlund remote-endpoint = <&csi40vin2>; 327905fc6b1SNiklas Söderlund }; 328905fc6b1SNiklas Söderlund }; 329905fc6b1SNiklas Söderlund }; 330905fc6b1SNiklas Söderlund }; 331