1905fc6b1SNiklas Söderlund# SPDX-License-Identifier: GPL-2.0-only 2905fc6b1SNiklas Söderlund# Copyright (C) 2020 Renesas Electronics Corp. 3905fc6b1SNiklas Söderlund%YAML 1.2 4905fc6b1SNiklas Söderlund--- 5905fc6b1SNiklas Söderlund$id: http://devicetree.org/schemas/media/renesas,vin.yaml# 6905fc6b1SNiklas Söderlund$schema: http://devicetree.org/meta-schemas/core.yaml# 7905fc6b1SNiklas Söderlund 8905fc6b1SNiklas Söderlundtitle: Renesas R-Car Video Input (VIN) 9905fc6b1SNiklas Söderlund 10905fc6b1SNiklas Söderlundmaintainers: 11905fc6b1SNiklas Söderlund - Niklas Söderlund <niklas.soderlund@ragnatech.se> 12905fc6b1SNiklas Söderlund 13905fc6b1SNiklas Söderlunddescription: 14905fc6b1SNiklas Söderlund The R-Car Video Input (VIN) device provides video input capabilities for the 15905fc6b1SNiklas Söderlund Renesas R-Car family of devices. 16905fc6b1SNiklas Söderlund 17905fc6b1SNiklas Söderlund Each VIN instance has a single parallel input that supports RGB and YUV video, 18905fc6b1SNiklas Söderlund with both external synchronization and BT.656 synchronization for the latter. 19905fc6b1SNiklas Söderlund Depending on the instance the VIN input is connected to external SoC pins, or 20905fc6b1SNiklas Söderlund on Gen3 and RZ/G2 platforms to a CSI-2 receiver. 21905fc6b1SNiklas Söderlund 22905fc6b1SNiklas Söderlundproperties: 23905fc6b1SNiklas Söderlund compatible: 24905fc6b1SNiklas Söderlund oneOf: 25905fc6b1SNiklas Söderlund - items: 26905fc6b1SNiklas Söderlund - enum: 2777fd2ca6SLad Prabhakar - renesas,vin-r8a7742 # RZ/G1H 28905fc6b1SNiklas Söderlund - renesas,vin-r8a7743 # RZ/G1M 29905fc6b1SNiklas Söderlund - renesas,vin-r8a7744 # RZ/G1N 30905fc6b1SNiklas Söderlund - renesas,vin-r8a7745 # RZ/G1E 31905fc6b1SNiklas Söderlund - renesas,vin-r8a77470 # RZ/G1C 32905fc6b1SNiklas Söderlund - renesas,vin-r8a7790 # R-Car H2 33905fc6b1SNiklas Söderlund - renesas,vin-r8a7791 # R-Car M2-W 34905fc6b1SNiklas Söderlund - renesas,vin-r8a7792 # R-Car V2H 35905fc6b1SNiklas Söderlund - renesas,vin-r8a7793 # R-Car M2-N 36905fc6b1SNiklas Söderlund - renesas,vin-r8a7794 # R-Car E2 37905fc6b1SNiklas Söderlund - const: renesas,rcar-gen2-vin # Generic R-Car Gen2 or RZ/G1 38905fc6b1SNiklas Söderlund 39905fc6b1SNiklas Söderlund - items: 40905fc6b1SNiklas Söderlund - enum: 41905fc6b1SNiklas Söderlund - renesas,vin-r8a774a1 # RZ/G2M 42905fc6b1SNiklas Söderlund - renesas,vin-r8a774b1 # RZ/G2N 43905fc6b1SNiklas Söderlund - renesas,vin-r8a774c0 # RZ/G2E 44200b0d9aSLad Prabhakar - renesas,vin-r8a774e1 # RZ/G2H 45905fc6b1SNiklas Söderlund - renesas,vin-r8a7778 # R-Car M1 46905fc6b1SNiklas Söderlund - renesas,vin-r8a7779 # R-Car H1 47905fc6b1SNiklas Söderlund - renesas,vin-r8a7795 # R-Car H3 48905fc6b1SNiklas Söderlund - renesas,vin-r8a7796 # R-Car M3-W 49905fc6b1SNiklas Söderlund - renesas,vin-r8a77965 # R-Car M3-N 50905fc6b1SNiklas Söderlund - renesas,vin-r8a77970 # R-Car V3M 51905fc6b1SNiklas Söderlund - renesas,vin-r8a77980 # R-Car V3H 52905fc6b1SNiklas Söderlund - renesas,vin-r8a77990 # R-Car E3 53905fc6b1SNiklas Söderlund - renesas,vin-r8a77995 # R-Car D3 54905fc6b1SNiklas Söderlund 55905fc6b1SNiklas Söderlund reg: 56905fc6b1SNiklas Söderlund maxItems: 1 57905fc6b1SNiklas Söderlund 58905fc6b1SNiklas Söderlund interrupts: 59905fc6b1SNiklas Söderlund maxItems: 1 60905fc6b1SNiklas Söderlund 61905fc6b1SNiklas Söderlund clocks: 62905fc6b1SNiklas Söderlund maxItems: 1 63905fc6b1SNiklas Söderlund 64905fc6b1SNiklas Söderlund power-domains: 65905fc6b1SNiklas Söderlund maxItems: 1 66905fc6b1SNiklas Söderlund 67905fc6b1SNiklas Söderlund resets: 68905fc6b1SNiklas Söderlund maxItems: 1 69905fc6b1SNiklas Söderlund 70905fc6b1SNiklas Söderlund #The per-board settings for Gen2 and RZ/G1 platforms: 71905fc6b1SNiklas Söderlund port: 72066a94e2SRob Herring $ref: /schemas/graph.yaml#/$defs/port-base 73066a94e2SRob Herring unevaluatedProperties: false 74905fc6b1SNiklas Söderlund description: 75066a94e2SRob Herring A node containing a parallel input 76905fc6b1SNiklas Söderlund 77905fc6b1SNiklas Söderlund properties: 78905fc6b1SNiklas Söderlund endpoint: 79066a94e2SRob Herring $ref: video-interfaces.yaml# 80066a94e2SRob Herring unevaluatedProperties: false 81905fc6b1SNiklas Söderlund 82905fc6b1SNiklas Söderlund properties: 83905fc6b1SNiklas Söderlund hsync-active: 84905fc6b1SNiklas Söderlund description: 85905fc6b1SNiklas Söderlund If both HSYNC and VSYNC polarities are not specified, embedded 86905fc6b1SNiklas Söderlund synchronization is selected. 87905fc6b1SNiklas Söderlund default: 1 88905fc6b1SNiklas Söderlund 89905fc6b1SNiklas Söderlund vsync-active: 90905fc6b1SNiklas Söderlund description: 91905fc6b1SNiklas Söderlund If both HSYNC and VSYNC polarities are not specified, embedded 92905fc6b1SNiklas Söderlund synchronization is selected. 93905fc6b1SNiklas Söderlund default: 1 94905fc6b1SNiklas Söderlund 95905fc6b1SNiklas Söderlund field-active-even: true 96905fc6b1SNiklas Söderlund 97905fc6b1SNiklas Söderlund bus-width: true 98905fc6b1SNiklas Söderlund 99905fc6b1SNiklas Söderlund data-shift: true 100905fc6b1SNiklas Söderlund 101905fc6b1SNiklas Söderlund data-enable-active: 102905fc6b1SNiklas Söderlund description: Polarity of CLKENB signal 103905fc6b1SNiklas Söderlund default: 1 104905fc6b1SNiklas Söderlund 105905fc6b1SNiklas Söderlund pclk-sample: true 106905fc6b1SNiklas Söderlund 107905fc6b1SNiklas Söderlund data-active: true 108905fc6b1SNiklas Söderlund 109905fc6b1SNiklas Söderlund #The per-board settings for Gen3 and RZ/G2 platforms: 110905fc6b1SNiklas Söderlund renesas,id: 111905fc6b1SNiklas Söderlund description: VIN channel number 1123d21a460SRob Herring $ref: /schemas/types.yaml#/definitions/uint32 1133d21a460SRob Herring minimum: 0 1143d21a460SRob Herring maximum: 15 115905fc6b1SNiklas Söderlund 116905fc6b1SNiklas Söderlund ports: 117066a94e2SRob Herring $ref: /schemas/graph.yaml#/properties/ports 118905fc6b1SNiklas Söderlund 119905fc6b1SNiklas Söderlund properties: 120905fc6b1SNiklas Söderlund port@0: 121*6a9a930dSRob Herring $ref: /schemas/graph.yaml#/$defs/port-base 122*6a9a930dSRob Herring unevaluatedProperties: false 123905fc6b1SNiklas Söderlund description: 124905fc6b1SNiklas Söderlund Input port node, single endpoint describing a parallel input source. 125905fc6b1SNiklas Söderlund 126905fc6b1SNiklas Söderlund properties: 127905fc6b1SNiklas Söderlund endpoint: 128066a94e2SRob Herring $ref: video-interfaces.yaml# 129066a94e2SRob Herring unevaluatedProperties: false 130905fc6b1SNiklas Söderlund 131905fc6b1SNiklas Söderlund properties: 132905fc6b1SNiklas Söderlund hsync-active: 133905fc6b1SNiklas Söderlund description: 134905fc6b1SNiklas Söderlund If both HSYNC and VSYNC polarities are not specified, embedded 135905fc6b1SNiklas Söderlund synchronization is selected. 136905fc6b1SNiklas Söderlund default: 1 137905fc6b1SNiklas Söderlund 138905fc6b1SNiklas Söderlund vsync-active: 139905fc6b1SNiklas Söderlund description: 140905fc6b1SNiklas Söderlund If both HSYNC and VSYNC polarities are not specified, embedded 141905fc6b1SNiklas Söderlund synchronization is selected. 142905fc6b1SNiklas Söderlund default: 1 143905fc6b1SNiklas Söderlund 144905fc6b1SNiklas Söderlund field-active-even: true 145905fc6b1SNiklas Söderlund 146905fc6b1SNiklas Söderlund bus-width: true 147905fc6b1SNiklas Söderlund 148905fc6b1SNiklas Söderlund data-shift: true 149905fc6b1SNiklas Söderlund 150905fc6b1SNiklas Söderlund data-enable-active: 151905fc6b1SNiklas Söderlund description: Polarity of CLKENB signal 152905fc6b1SNiklas Söderlund default: 1 153905fc6b1SNiklas Söderlund 154905fc6b1SNiklas Söderlund pclk-sample: true 155905fc6b1SNiklas Söderlund 156905fc6b1SNiklas Söderlund data-active: true 157905fc6b1SNiklas Söderlund 158905fc6b1SNiklas Söderlund port@1: 159066a94e2SRob Herring $ref: /schemas/graph.yaml#/properties/port 160905fc6b1SNiklas Söderlund description: 161905fc6b1SNiklas Söderlund Input port node, multiple endpoints describing all the R-Car CSI-2 162905fc6b1SNiklas Söderlund modules connected the VIN. 163905fc6b1SNiklas Söderlund 164905fc6b1SNiklas Söderlund properties: 165905fc6b1SNiklas Söderlund endpoint@0: 166066a94e2SRob Herring $ref: /schemas/graph.yaml#/properties/endpoint 167905fc6b1SNiklas Söderlund description: Endpoint connected to CSI20. 168905fc6b1SNiklas Söderlund 169905fc6b1SNiklas Söderlund endpoint@1: 170066a94e2SRob Herring $ref: /schemas/graph.yaml#/properties/endpoint 171905fc6b1SNiklas Söderlund description: Endpoint connected to CSI21. 172905fc6b1SNiklas Söderlund 173905fc6b1SNiklas Söderlund endpoint@2: 174066a94e2SRob Herring $ref: /schemas/graph.yaml#/properties/endpoint 175905fc6b1SNiklas Söderlund description: Endpoint connected to CSI40. 176905fc6b1SNiklas Söderlund 177905fc6b1SNiklas Söderlund endpoint@3: 178066a94e2SRob Herring $ref: /schemas/graph.yaml#/properties/endpoint 179905fc6b1SNiklas Söderlund description: Endpoint connected to CSI41. 180905fc6b1SNiklas Söderlund 181905fc6b1SNiklas Söderlund anyOf: 182905fc6b1SNiklas Söderlund - required: 183905fc6b1SNiklas Söderlund - endpoint@0 184905fc6b1SNiklas Söderlund - required: 185905fc6b1SNiklas Söderlund - endpoint@1 186905fc6b1SNiklas Söderlund - required: 187905fc6b1SNiklas Söderlund - endpoint@2 188905fc6b1SNiklas Söderlund - required: 189905fc6b1SNiklas Söderlund - endpoint@3 190905fc6b1SNiklas Söderlund 191905fc6b1SNiklas Söderlundrequired: 192905fc6b1SNiklas Söderlund - compatible 193905fc6b1SNiklas Söderlund - reg 194905fc6b1SNiklas Söderlund - interrupts 195905fc6b1SNiklas Söderlund - clocks 196905fc6b1SNiklas Söderlund - power-domains 1977935bb56SGeert Uytterhoeven 1987935bb56SGeert UytterhoevenallOf: 1997935bb56SGeert Uytterhoeven - if: 2007935bb56SGeert Uytterhoeven not: 2017935bb56SGeert Uytterhoeven properties: 2027935bb56SGeert Uytterhoeven compatible: 2037935bb56SGeert Uytterhoeven contains: 2047935bb56SGeert Uytterhoeven enum: 2057935bb56SGeert Uytterhoeven - renesas,vin-r8a7778 2067935bb56SGeert Uytterhoeven - renesas,vin-r8a7779 2077935bb56SGeert Uytterhoeven then: 2087935bb56SGeert Uytterhoeven required: 209905fc6b1SNiklas Söderlund - resets 210905fc6b1SNiklas Söderlund 2117935bb56SGeert Uytterhoeven - if: 212905fc6b1SNiklas Söderlund properties: 213905fc6b1SNiklas Söderlund compatible: 214905fc6b1SNiklas Söderlund contains: 215905fc6b1SNiklas Söderlund enum: 216905fc6b1SNiklas Söderlund - renesas,vin-r8a7778 217905fc6b1SNiklas Söderlund - renesas,vin-r8a7779 218905fc6b1SNiklas Söderlund - renesas,rcar-gen2-vin 219905fc6b1SNiklas Söderlund then: 220905fc6b1SNiklas Söderlund required: 221905fc6b1SNiklas Söderlund - port 222905fc6b1SNiklas Söderlund else: 223905fc6b1SNiklas Söderlund required: 224905fc6b1SNiklas Söderlund - renesas,id 225905fc6b1SNiklas Söderlund - ports 226905fc6b1SNiklas Söderlund 227905fc6b1SNiklas SöderlundadditionalProperties: false 228905fc6b1SNiklas Söderlund 229905fc6b1SNiklas Söderlundexamples: 230905fc6b1SNiklas Söderlund # Device node example for Gen2 platform 231905fc6b1SNiklas Söderlund - | 232905fc6b1SNiklas Söderlund #include <dt-bindings/clock/r8a7790-cpg-mssr.h> 233905fc6b1SNiklas Söderlund #include <dt-bindings/interrupt-controller/arm-gic.h> 234905fc6b1SNiklas Söderlund #include <dt-bindings/power/r8a7790-sysc.h> 235905fc6b1SNiklas Söderlund 236905fc6b1SNiklas Söderlund vin1: vin@e6ef1000 { 237905fc6b1SNiklas Söderlund compatible = "renesas,vin-r8a7790", 238905fc6b1SNiklas Söderlund "renesas,rcar-gen2-vin"; 239fba56184SRob Herring reg = <0xe6ef1000 0x1000>; 240905fc6b1SNiklas Söderlund interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 241905fc6b1SNiklas Söderlund clocks = <&cpg CPG_MOD 810>; 242905fc6b1SNiklas Söderlund power-domains = <&sysc R8A7790_PD_ALWAYS_ON>; 243905fc6b1SNiklas Söderlund resets = <&cpg 810>; 244905fc6b1SNiklas Söderlund 245905fc6b1SNiklas Söderlund port { 246905fc6b1SNiklas Söderlund vin1ep0: endpoint { 247905fc6b1SNiklas Söderlund remote-endpoint = <&adv7180>; 248905fc6b1SNiklas Söderlund bus-width = <8>; 249905fc6b1SNiklas Söderlund }; 250905fc6b1SNiklas Söderlund }; 251905fc6b1SNiklas Söderlund }; 252905fc6b1SNiklas Söderlund 253905fc6b1SNiklas Söderlund # Device node example for Gen3 platform with only CSI-2 254905fc6b1SNiklas Söderlund - | 255905fc6b1SNiklas Söderlund #include <dt-bindings/clock/r8a7795-cpg-mssr.h> 256905fc6b1SNiklas Söderlund #include <dt-bindings/interrupt-controller/arm-gic.h> 257905fc6b1SNiklas Söderlund #include <dt-bindings/power/r8a7795-sysc.h> 258905fc6b1SNiklas Söderlund 259905fc6b1SNiklas Söderlund vin0: video@e6ef0000 { 260905fc6b1SNiklas Söderlund compatible = "renesas,vin-r8a7795"; 261fba56184SRob Herring reg = <0xe6ef0000 0x1000>; 262905fc6b1SNiklas Söderlund interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 263905fc6b1SNiklas Söderlund clocks = <&cpg CPG_MOD 811>; 264905fc6b1SNiklas Söderlund power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; 265905fc6b1SNiklas Söderlund resets = <&cpg 811>; 266905fc6b1SNiklas Söderlund renesas,id = <0>; 267905fc6b1SNiklas Söderlund 268905fc6b1SNiklas Söderlund ports { 269905fc6b1SNiklas Söderlund #address-cells = <1>; 270905fc6b1SNiklas Söderlund #size-cells = <0>; 271905fc6b1SNiklas Söderlund 272905fc6b1SNiklas Söderlund port@1 { 273905fc6b1SNiklas Söderlund #address-cells = <1>; 274905fc6b1SNiklas Söderlund #size-cells = <0>; 275905fc6b1SNiklas Söderlund 276905fc6b1SNiklas Söderlund reg = <1>; 277905fc6b1SNiklas Söderlund 278905fc6b1SNiklas Söderlund vin0csi20: endpoint@0 { 279905fc6b1SNiklas Söderlund reg = <0>; 280905fc6b1SNiklas Söderlund remote-endpoint= <&csi20vin0>; 281905fc6b1SNiklas Söderlund }; 282905fc6b1SNiklas Söderlund vin0csi40: endpoint@2 { 283905fc6b1SNiklas Söderlund reg = <2>; 284905fc6b1SNiklas Söderlund remote-endpoint= <&csi40vin0>; 285905fc6b1SNiklas Söderlund }; 286905fc6b1SNiklas Söderlund }; 287905fc6b1SNiklas Söderlund }; 288905fc6b1SNiklas Söderlund }; 289905fc6b1SNiklas Söderlund 290905fc6b1SNiklas Söderlund # Device node example for Gen3 platform with CSI-2 and parallel 291905fc6b1SNiklas Söderlund - | 292905fc6b1SNiklas Söderlund #include <dt-bindings/clock/r8a77970-cpg-mssr.h> 293905fc6b1SNiklas Söderlund #include <dt-bindings/interrupt-controller/arm-gic.h> 294905fc6b1SNiklas Söderlund #include <dt-bindings/power/r8a77970-sysc.h> 295905fc6b1SNiklas Söderlund 296905fc6b1SNiklas Söderlund vin2: video@e6ef2000 { 297905fc6b1SNiklas Söderlund compatible = "renesas,vin-r8a77970"; 298fba56184SRob Herring reg = <0xe6ef2000 0x1000>; 299905fc6b1SNiklas Söderlund interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 300905fc6b1SNiklas Söderlund clocks = <&cpg CPG_MOD 809>; 301905fc6b1SNiklas Söderlund power-domains = <&sysc R8A77970_PD_ALWAYS_ON>; 302905fc6b1SNiklas Söderlund resets = <&cpg 809>; 303905fc6b1SNiklas Söderlund renesas,id = <2>; 304905fc6b1SNiklas Söderlund 305905fc6b1SNiklas Söderlund ports { 306905fc6b1SNiklas Söderlund #address-cells = <1>; 307905fc6b1SNiklas Söderlund #size-cells = <0>; 308905fc6b1SNiklas Söderlund 309905fc6b1SNiklas Söderlund port@0 { 310905fc6b1SNiklas Söderlund reg = <0>; 311905fc6b1SNiklas Söderlund 312905fc6b1SNiklas Söderlund vin2_in: endpoint { 313905fc6b1SNiklas Söderlund remote-endpoint = <&adv7612_out>; 314905fc6b1SNiklas Söderlund hsync-active = <0>; 315905fc6b1SNiklas Söderlund vsync-active = <0>; 316905fc6b1SNiklas Söderlund }; 317905fc6b1SNiklas Söderlund }; 318905fc6b1SNiklas Söderlund 319905fc6b1SNiklas Söderlund port@1 { 320905fc6b1SNiklas Söderlund #address-cells = <1>; 321905fc6b1SNiklas Söderlund #size-cells = <0>; 322905fc6b1SNiklas Söderlund 323905fc6b1SNiklas Söderlund reg = <1>; 324905fc6b1SNiklas Söderlund 325905fc6b1SNiklas Söderlund vin2csi40: endpoint@2 { 326905fc6b1SNiklas Söderlund reg = <2>; 327905fc6b1SNiklas Söderlund remote-endpoint = <&csi40vin2>; 328905fc6b1SNiklas Söderlund }; 329905fc6b1SNiklas Söderlund }; 330905fc6b1SNiklas Söderlund }; 331905fc6b1SNiklas Söderlund }; 332