1*b610b592SLad, Prabhakar* Texas Instruments TVP514x video decoder 2*b610b592SLad, Prabhakar 3*b610b592SLad, PrabhakarThe TVP5146/TVP5146m2/TVP5147/TVP5147m1 device is high quality, single-chip 4*b610b592SLad, Prabhakardigital video decoder that digitizes and decodes all popular baseband analog 5*b610b592SLad, Prabhakarvideo formats into digital video component. The tvp514x decoder supports analog- 6*b610b592SLad, Prabhakarto-digital (A/D) conversion of component RGB and YPbPr signals as well as A/D 7*b610b592SLad, Prabhakarconversion and decoding of NTSC, PAL and SECAM composite and S-video into 8*b610b592SLad, Prabhakarcomponent YCbCr. 9*b610b592SLad, Prabhakar 10*b610b592SLad, PrabhakarRequired Properties : 11*b610b592SLad, Prabhakar- compatible : value should be either one among the following 12*b610b592SLad, Prabhakar (a) "ti,tvp5146" for tvp5146 decoder. 13*b610b592SLad, Prabhakar (b) "ti,tvp5146m2" for tvp5146m2 decoder. 14*b610b592SLad, Prabhakar (c) "ti,tvp5147" for tvp5147 decoder. 15*b610b592SLad, Prabhakar (d) "ti,tvp5147m1" for tvp5147m1 decoder. 16*b610b592SLad, Prabhakar 17*b610b592SLad, Prabhakar- hsync-active: HSYNC Polarity configuration for endpoint. 18*b610b592SLad, Prabhakar 19*b610b592SLad, Prabhakar- vsync-active: VSYNC Polarity configuration for endpoint. 20*b610b592SLad, Prabhakar 21*b610b592SLad, Prabhakar- pclk-sample: Clock polarity of the endpoint. 22*b610b592SLad, Prabhakar 23*b610b592SLad, PrabhakarFor further reading on port node refer to Documentation/devicetree/bindings/ 24*b610b592SLad, Prabhakarmedia/video-interfaces.txt. 25*b610b592SLad, Prabhakar 26*b610b592SLad, PrabhakarExample: 27*b610b592SLad, Prabhakar 28*b610b592SLad, Prabhakar i2c0@1c22000 { 29*b610b592SLad, Prabhakar ... 30*b610b592SLad, Prabhakar ... 31*b610b592SLad, Prabhakar tvp514x@5c { 32*b610b592SLad, Prabhakar compatible = "ti,tvp5146"; 33*b610b592SLad, Prabhakar reg = <0x5c>; 34*b610b592SLad, Prabhakar 35*b610b592SLad, Prabhakar port { 36*b610b592SLad, Prabhakar tvp514x_1: endpoint { 37*b610b592SLad, Prabhakar hsync-active = <1>; 38*b610b592SLad, Prabhakar vsync-active = <1>; 39*b610b592SLad, Prabhakar pclk-sample = <0>; 40*b610b592SLad, Prabhakar }; 41*b610b592SLad, Prabhakar }; 42*b610b592SLad, Prabhakar }; 43*b610b592SLad, Prabhakar ... 44*b610b592SLad, Prabhakar }; 45