1*187d42d6SLad, Prabhakar* Analog Devices adv7343 video encoder 2*187d42d6SLad, Prabhakar 3*187d42d6SLad, PrabhakarThe ADV7343 are high speed, digital-to-analog video encoders in a 64-lead LQFP 4*187d42d6SLad, Prabhakarpackage. Six high speed, 3.3 V, 11-bit video DACs provide support for composite 5*187d42d6SLad, Prabhakar(CVBS), S-Video (Y-C), and component (YPrPb/RGB) analog outputs in standard 6*187d42d6SLad, Prabhakardefinition (SD), enhanced definition (ED), or high definition (HD) video 7*187d42d6SLad, Prabhakarformats. 8*187d42d6SLad, Prabhakar 9*187d42d6SLad, PrabhakarRequired Properties : 10*187d42d6SLad, Prabhakar- compatible: Must be "adi,adv7343" 11*187d42d6SLad, Prabhakar 12*187d42d6SLad, PrabhakarOptional Properties : 13*187d42d6SLad, Prabhakar- adi,power-mode-sleep-mode: on enable the current consumption is reduced to 14*187d42d6SLad, Prabhakar micro ampere level. All DACs and the internal PLL 15*187d42d6SLad, Prabhakar circuit are disabled. 16*187d42d6SLad, Prabhakar- adi,power-mode-pll-ctrl: PLL and oversampling control. This control allows 17*187d42d6SLad, Prabhakar internal PLL 1 circuit to be powered down and the 18*187d42d6SLad, Prabhakar oversampling to be switched off. 19*187d42d6SLad, Prabhakar- ad,adv7343-power-mode-dac: array configuring the power on/off DAC's 1..6, 20*187d42d6SLad, Prabhakar 0 = OFF and 1 = ON, Default value when this 21*187d42d6SLad, Prabhakar property is not specified is <0 0 0 0 0 0>. 22*187d42d6SLad, Prabhakar- ad,adv7343-sd-config-dac-out: array configure SD DAC Output's 1 and 2, 0 = OFF 23*187d42d6SLad, Prabhakar and 1 = ON, Default value when this property is 24*187d42d6SLad, Prabhakar not specified is <0 0>. 25*187d42d6SLad, Prabhakar 26*187d42d6SLad, PrabhakarExample: 27*187d42d6SLad, Prabhakar 28*187d42d6SLad, Prabhakari2c0@1c22000 { 29*187d42d6SLad, Prabhakar ... 30*187d42d6SLad, Prabhakar ... 31*187d42d6SLad, Prabhakar 32*187d42d6SLad, Prabhakar adv7343@2a { 33*187d42d6SLad, Prabhakar compatible = "adi,adv7343"; 34*187d42d6SLad, Prabhakar reg = <0x2a>; 35*187d42d6SLad, Prabhakar 36*187d42d6SLad, Prabhakar port { 37*187d42d6SLad, Prabhakar adv7343_1: endpoint { 38*187d42d6SLad, Prabhakar adi,power-mode-sleep-mode; 39*187d42d6SLad, Prabhakar adi,power-mode-pll-ctrl; 40*187d42d6SLad, Prabhakar /* Use DAC1..3, DAC6 */ 41*187d42d6SLad, Prabhakar adi,dac-enable = <1 1 1 0 0 1>; 42*187d42d6SLad, Prabhakar /* Use SD DAC output 1 */ 43*187d42d6SLad, Prabhakar adi,sd-dac-enable = <1 0>; 44*187d42d6SLad, Prabhakar }; 45*187d42d6SLad, Prabhakar }; 46*187d42d6SLad, Prabhakar }; 47*187d42d6SLad, Prabhakar ... 48*187d42d6SLad, Prabhakar}; 49