xref: /openbmc/linux/Documentation/devicetree/bindings/interrupt-controller/jcore,aic.txt (revision 999dcbe2414e15e19cdc1f91497d01f262c6e1cf)
1 J-Core Advanced Interrupt Controller
2 
3 Required properties:
4 
5 - compatible: Should be "jcore,aic1" for the (obsolete) first-generation aic
6   with 8 interrupt lines with programmable priorities, or "jcore,aic2" for
7   the "aic2" core with 64 interrupts.
8 
9 - reg: Memory region(s) for configuration. For SMP, there should be one
10   region per cpu, indexed by the sequential, zero-based hardware cpu
11   number.
12 
13 - interrupt-controller: Identifies the node as an interrupt controller
14 
15 - #interrupt-cells: Specifies the number of cells needed to encode an
16   interrupt source. The value shall be 1.
17 
18 
19 Example:
20 
21 aic: interrupt-controller@200 {
22 	compatible = "jcore,aic2";
23 	reg = < 0x200 0x30 0x500 0x30 >;
24 	interrupt-controller;
25 	#interrupt-cells = <1>;
26 };
27