153cafb93SAlexandre CourbotNVIDIA Tegra Graphics Processing Units 22b372f56SAlexandre Courbot 32b372f56SAlexandre CourbotRequired properties: 435815801SAlexandre Courbot- compatible: "nvidia,<gpu>" 52b372f56SAlexandre Courbot Currently recognized values: 635815801SAlexandre Courbot - nvidia,gk20a 753cafb93SAlexandre Courbot - nvidia,gm20b 8bf594a89SAlexandre Courbot - nvidia,gp10b 990a09178SThierry Reding - nvidia,gv11b 102b372f56SAlexandre Courbot- reg: Physical base address and length of the controller's registers. 112b372f56SAlexandre Courbot Must contain two entries: 122b372f56SAlexandre Courbot - first entry for bar0 132b372f56SAlexandre Courbot - second entry for bar1 142b372f56SAlexandre Courbot- interrupts: Must contain an entry for each entry in interrupt-names. 152b372f56SAlexandre Courbot See ../interrupt-controller/interrupts.txt for details. 162b372f56SAlexandre Courbot- interrupt-names: Must include the following entries: 172b372f56SAlexandre Courbot - stall 182b372f56SAlexandre Courbot - nonstall 19bf594a89SAlexandre Courbot- vdd-supply: regulator for supply voltage. Only required for GPUs not using 20bf594a89SAlexandre Courbot power domains. 212b372f56SAlexandre Courbot- clocks: Must contain an entry for each entry in clock-names. 222b372f56SAlexandre Courbot See ../clocks/clock-bindings.txt for details. 232b372f56SAlexandre Courbot- clock-names: Must include the following entries: 242b372f56SAlexandre Courbot - gpu 252b372f56SAlexandre Courbot - pwr 2653cafb93SAlexandre CourbotIf the compatible string is "nvidia,gm20b", then the following clock 2753cafb93SAlexandre Courbotis also required: 2853cafb93SAlexandre Courbot - ref 2990a09178SThierry RedingIf the compatible string is "nvidia,gv11b", then the following clock is also 3090a09178SThierry Redingrequired: 3190a09178SThierry Reding - fuse 322b372f56SAlexandre Courbot- resets: Must contain an entry for each entry in reset-names. 332b372f56SAlexandre Courbot See ../reset/reset.txt for details. 342b372f56SAlexandre Courbot- reset-names: Must include the following entries: 352b372f56SAlexandre Courbot - gpu 36bf594a89SAlexandre Courbot- power-domains: GPUs that make use of power domains can define this property 37bf594a89SAlexandre Courbot instead of vdd-supply. Currently "nvidia,gp10b" makes use of this. 382b372f56SAlexandre Courbot 39375d2447SAlexandre CourbotOptional properties: 40375d2447SAlexandre Courbot- iommus: A reference to the IOMMU. See ../iommu/iommu.txt for details. 41375d2447SAlexandre Courbot 4253cafb93SAlexandre CourbotExample for GK20A: 432b372f56SAlexandre Courbot 4453cafb93SAlexandre Courbot gpu@57000000 { 452b372f56SAlexandre Courbot compatible = "nvidia,gk20a"; 462b372f56SAlexandre Courbot reg = <0x0 0x57000000 0x0 0x01000000>, 472b372f56SAlexandre Courbot <0x0 0x58000000 0x0 0x01000000>; 482b372f56SAlexandre Courbot interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>, 492b372f56SAlexandre Courbot <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 502b372f56SAlexandre Courbot interrupt-names = "stall", "nonstall"; 512b372f56SAlexandre Courbot vdd-supply = <&vdd_gpu>; 522b372f56SAlexandre Courbot clocks = <&tegra_car TEGRA124_CLK_GPU>, 532b372f56SAlexandre Courbot <&tegra_car TEGRA124_CLK_PLL_P_OUT5>; 542b372f56SAlexandre Courbot clock-names = "gpu", "pwr"; 552b372f56SAlexandre Courbot resets = <&tegra_car 184>; 562b372f56SAlexandre Courbot reset-names = "gpu"; 57375d2447SAlexandre Courbot iommus = <&mc TEGRA_SWGROUP_GPU>; 582b372f56SAlexandre Courbot }; 5953cafb93SAlexandre Courbot 6053cafb93SAlexandre CourbotExample for GM20B: 6153cafb93SAlexandre Courbot 6253cafb93SAlexandre Courbot gpu@57000000 { 6353cafb93SAlexandre Courbot compatible = "nvidia,gm20b"; 6453cafb93SAlexandre Courbot reg = <0x0 0x57000000 0x0 0x01000000>, 6553cafb93SAlexandre Courbot <0x0 0x58000000 0x0 0x01000000>; 6653cafb93SAlexandre Courbot interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>, 6753cafb93SAlexandre Courbot <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 6853cafb93SAlexandre Courbot interrupt-names = "stall", "nonstall"; 6953cafb93SAlexandre Courbot clocks = <&tegra_car TEGRA210_CLK_GPU>, 7053cafb93SAlexandre Courbot <&tegra_car TEGRA210_CLK_PLL_P_OUT5>, 7153cafb93SAlexandre Courbot <&tegra_car TEGRA210_CLK_PLL_G_REF>; 7253cafb93SAlexandre Courbot clock-names = "gpu", "pwr", "ref"; 7353cafb93SAlexandre Courbot resets = <&tegra_car 184>; 7453cafb93SAlexandre Courbot reset-names = "gpu"; 7553cafb93SAlexandre Courbot iommus = <&mc TEGRA_SWGROUP_GPU>; 7653cafb93SAlexandre Courbot }; 77bf594a89SAlexandre Courbot 78bf594a89SAlexandre CourbotExample for GP10B: 79bf594a89SAlexandre Courbot 80bf594a89SAlexandre Courbot gpu@17000000 { 81bf594a89SAlexandre Courbot compatible = "nvidia,gp10b"; 82bf594a89SAlexandre Courbot reg = <0x0 0x17000000 0x0 0x1000000>, 83bf594a89SAlexandre Courbot <0x0 0x18000000 0x0 0x1000000>; 84bf594a89SAlexandre Courbot interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH 85bf594a89SAlexandre Courbot GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 86bf594a89SAlexandre Courbot interrupt-names = "stall", "nonstall"; 87bf594a89SAlexandre Courbot clocks = <&bpmp TEGRA186_CLK_GPCCLK>, 88bf594a89SAlexandre Courbot <&bpmp TEGRA186_CLK_GPU>; 89bf594a89SAlexandre Courbot clock-names = "gpu", "pwr"; 90bf594a89SAlexandre Courbot resets = <&bpmp TEGRA186_RESET_GPU>; 91bf594a89SAlexandre Courbot reset-names = "gpu"; 92bf594a89SAlexandre Courbot power-domains = <&bpmp TEGRA186_POWER_DOMAIN_GPU>; 93bf594a89SAlexandre Courbot iommus = <&smmu TEGRA186_SID_GPU>; 94bf594a89SAlexandre Courbot }; 9590a09178SThierry Reding 9690a09178SThierry RedingExample for GV11B: 9790a09178SThierry Reding 9890a09178SThierry Reding gpu@17000000 { 9990a09178SThierry Reding compatible = "nvidia,gv11b"; 100*d89886ebSJon Hunter reg = <0x17000000 0x1000000>, 101*d89886ebSJon Hunter <0x18000000 0x1000000>; 10290a09178SThierry Reding interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>, 10390a09178SThierry Reding <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 10490a09178SThierry Reding interrupt-names = "stall", "nonstall"; 10590a09178SThierry Reding clocks = <&bpmp TEGRA194_CLK_GPCCLK>, 10690a09178SThierry Reding <&bpmp TEGRA194_CLK_GPU_PWR>, 10790a09178SThierry Reding <&bpmp TEGRA194_CLK_FUSE>; 10890a09178SThierry Reding clock-names = "gpu", "pwr", "fuse"; 10990a09178SThierry Reding resets = <&bpmp TEGRA194_RESET_GPU>; 11090a09178SThierry Reding reset-names = "gpu"; 11190a09178SThierry Reding dma-coherent; 11290a09178SThierry Reding 11390a09178SThierry Reding power-domains = <&bpmp TEGRA194_POWER_DOMAIN_GPU>; 11490a09178SThierry Reding iommus = <&smmu TEGRA194_SID_GPU>; 11590a09178SThierry Reding }; 116